Andrey/ds18b20-MODBUS
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This commit is contained in:
andrey 2025-11-15 16:10:18 +03:00
parent e1bb35e6b6
commit 69ae4f8cf2
35 changed files with 4412 additions and 777 deletions
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6
john103C6T6/Core/Inc/main.h
View File

@ -75,9 +75,9 @@ typedef struct
uint16_t count; uint16_t count;
}TEMP_TypeDef; }TEMP_TypeDef;
typedef struct { typedef struct {
uint32_t init_tsens : 1; // Update Interrupt Flag (бит 0) — флаг переполнения/обновления uint32_t init_tsens : 1; // Update Interrupt Flag (бит 0) — флаг переполнения/обновления
// ... (другие биты могут быть зарезервированы или использоваться в расширенных таймерах) // ... (другие биты могут быть зарезервированы или использоваться в расширенных таймерах)
} Flags_TypeDef; } Flags_TypeDef;
@ -101,7 +101,7 @@ extern void handle_command(char* cmd);
typedef void (*FunctionPointer)(void); typedef void (*FunctionPointer)(void);
uint16_t handle_valves(TEMP_TypeDef* temp_sense[MAX_SENSE]); uint16_t handle_valves(TEMP_TypeDef* temp_sense[MAX_SENSE]);
void init_setpoint_all_T_sense(TEMP_TypeDef* temp_sense[MAX_SENSE]); void init_setpoint_all_T_sense(TEMP_TypeDef* temp_sense, int size_array);
void iwdg_refresh(void); void iwdg_refresh(void);
void led_blink(GPIO_TypeDef *GPIOx,uint16_t GPIO_Pin,uint8_t iter,uint16_t delay); void led_blink(GPIO_TypeDef *GPIOx,uint16_t GPIO_Pin,uint8_t iter,uint16_t delay);
FuncStat Field_modbus(MB_DataStructureTypeDef* MB_DATA, Flags_TypeDef* flag); FuncStat Field_modbus(MB_DataStructureTypeDef* MB_DATA, Flags_TypeDef* flag);

145
john103C6T6/Core/Src/main.c
View File

@ -43,6 +43,8 @@
#include "modbus.h" #include "modbus.h"
#include "eeprom_emul.h" #include "eeprom_emul.h"
#include "stdio.h" #include "stdio.h"
#include "flash_ring.h"
#include "string.h"
@ -51,17 +53,13 @@
/* Private typedef -----------------------------------------------------------*/ /* Private typedef -----------------------------------------------------------*/
/* USER CODE BEGIN PTD */ /* USER CODE BEGIN PTD */
int fputc(int ch, FILE *f)
{
HAL_UART_Transmit(&huart1, (uint8_t *)&ch, 1, HAL_MAX_DELAY);
return ch;
}
/* USER CODE END PTD */ /* USER CODE END PTD */
/* Private define ------------------------------------------------------------*/ /* Private define ------------------------------------------------------------*/
/* USER CODE BEGIN PD */ /* USER CODE BEGIN PD */
uint16_t iter, cnt = 5; uint16_t iter, cnt = 5;
uint8_t init_retries = 5;
uint8_t ralay_5v_on_var = 0; uint8_t ralay_5v_on_var = 0;
/* USER CODE END PD */ /* USER CODE END PD */
@ -81,6 +79,8 @@ uint8_t ralay_5v_on_var=0;
uint8_t first_in = 1; uint8_t first_in = 1;
DALLAS_SensorHandleTypeDef sens[30]; DALLAS_SensorHandleTypeDef sens[30];
int init_sens = 0; int init_sens = 0;
FlashRecord_t* record;
uint8_t flash_buff[RECORD_SIZE - 4];
/* USER CODE END PM */ /* USER CODE END PM */
@ -88,6 +88,7 @@ uint8_t ralay_5v_on_var=0;
/* Private variables ---------------------------------------------------------*/ /* Private variables ---------------------------------------------------------*/
/* USER CODE BEGIN PV */ /* USER CODE BEGIN PV */
int last_page_addr = LAST_PAGE_ADDR;
/* USER CODE END PV */ /* USER CODE END PV */
@ -142,65 +143,66 @@ int main(void)
MX_SPI1_Init(); MX_SPI1_Init();
/* USER CODE BEGIN 2 */ /* USER CODE BEGIN 2 */
led_blink(GPIOC, 13, rest_iter, reset_blink_delay); led_blink(GPIOC, 13, rest_iter, reset_blink_delay);
MODBUS_FirstInit(&hmodbus1, &mb_huart, &mb_htim); MODBUS_FirstInit(&hmodbus1, &mb_huart, &mb_htim);
MODBUS_Config(&hmodbus1, MODBUS_DEVICE_ID, MODBUS_TIMEOUT, MODBUS_MODE_SLAVE); MODBUS_Config(&hmodbus1, MODBUS_DEVICE_ID, MODBUS_TIMEOUT, MODBUS_MODE_SLAVE);
// Запуск приема Modbus // Запуск приема Modbus
MODBUS_SlaveStart(&hmodbus1, NULL); MODBUS_SlaveStart(&hmodbus1, NULL);
uint8_t uart_byte = 0; uint8_t uart_byte = 0;
Dallas_BusFirstInit(&htim1); Dallas_BusFirstInit(&htim1);
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> (<28><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>) // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> (<28><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>)
reinit_t_sens(); reinit_t_sens();
init_setpoint_all_T_sense(temp_sense, hdallas.onewire->RomCnt);
MB_DATA.InRegs.num_Tsens = hdallas.onewire->RomCnt; MB_DATA.InRegs.num_Tsens = hdallas.onewire->RomCnt;
// BufferState_t buffer_state = buffer_init();
for(int i=0;i<RECORD_SIZE;i++)
{
flash_buff[i]=i;
}
/* USER CODE END 2 */ /* USER CODE END 2 */
/* Infinite loop */ /* Infinite loop */
/* USER CODE BEGIN WHILE */ /* USER CODE BEGIN WHILE */
while (1) while (1)
{ {
// if (MB_DATA.Coils.relay_struct[0].state_val_bit.Temp11_relay_isOn)
// {
// MB_DATA.Coils.relay_struct[0].state_val_bit.Temp11_relay_isOn = 0;
// BufferState_t state = buffer_init();
// uint32_t idx = (state.write_index ) % RECORDS_PER_PAGE;
// FlashRecord_t* record = buffer_read_record(idx);
// }
// if (MB_DATA.Coils.relay_struct[0].state_val_bit.Temp10_relay_isOn)
// {
// MB_DATA.Coils.relay_struct[0].state_val_bit.Temp10_relay_isOn = 0;
// FlashRecord_t new_record;
// new_record.timestamp = HAL_GetTick();
// memcpy(new_record.data, flash_buff, sizeof(new_record.data));
// HAL_StatusTypeDef status = buffer_write_record(&new_record, &buffer_state);
// if (status == HAL_OK)
// {
// // printf("Record written successfully\n");
// GPIOC->ODR |= 1 << 13;
// }
// }
temp_sense[0].t_close = 1;
Field_modbus(&MB_DATA, &flag); Field_modbus(&MB_DATA, &flag);
if( hmodbus1.pMessagePtr->FuncCode&FC_ERR_VALUES_START)
{
static int pause_Alarm_led;
while (1)
{
if (pause_Alarm_led>36000000)
{
GPIOC->ODR^=1<<13;
pause_Alarm_led=0;
}
pause_Alarm_led++;
}
}
Check_Tconnect(&MB_DATA, &flag, &hdallas, 0); Check_Tconnect(&MB_DATA, &flag, &hdallas, 0);
value_control(); value_control();
handle_valves(temp_sense[]); init_setpoint_all_T_sense(temp_sense, hdallas.onewire->RomCnt);
// handle_valves(temp_sense[]);
if (_debug_init||MB_DATA.Coils.init_param)
{
_debug_init=0;
MB_DATA.Coils.init_param=0;
for(int i=0;i<hdallas.onewire->RomCnt;i++)
{
sens[i].set_temp=MB_DATA.HoldRegs.set_Temp[i];
sens[i].hyst=MB_DATA.HoldRegs.set_hyst[i];
}
}
Dallas_StartConvertTAll(&hdallas, DALLAS_WAIT_BUS, 0); Dallas_StartConvertTAll(&hdallas, DALLAS_WAIT_BUS, 0);
for(int i = 0; i < hdallas.onewire->RomCnt; i++) for(int i = 0; i < hdallas.onewire->RomCnt; i++)
{ {
if(sens[i].isLost) if(sens[i].isLost)
@ -208,12 +210,8 @@ int main(void)
sens[i].lost_cnt ++; sens[i].lost_cnt ++;
} }
Dallas_ReadTemperature(&sens[i]); Dallas_ReadTemperature(&sens[i]);
sens[i].set_temp = MB_DATA.HoldRegs.set_Temp[i];
MB_DATA.InRegs.sens_Temp[i] = sens[i].temperature * 10; MB_DATA.InRegs.sens_Temp[i] = sens[i].temperature * 10;
/////////////////////////заменить на define ralay_5v_on_var GPIOA->ODR|=1<<10; /////////////////////////заменить на define ralay_5v_on_var GPIOA->ODR|=1<<10;
ralay_5v_on_var = MB_DATA.Coils.coils[1].state_val_bit.state_val_05; ralay_5v_on_var = MB_DATA.Coils.coils[1].state_val_bit.state_val_05;
if (ralay_5v_on_var) if (ralay_5v_on_var)
{ {
@ -223,7 +221,7 @@ int main(void)
{ {
GPIOA->ODR &= ~(1 << 10); GPIOA->ODR &= ~(1 << 10);
} }
//value_control();
} }
@ -407,7 +405,20 @@ FuncStat Field_modbus(MB_DataStructureTypeDef* MB_DATA, Flags_TypeDef* flag)
MB_DATA->InRegs.ID = *hdallas.ds_devices; MB_DATA->InRegs.ID = *hdallas.ds_devices;
flag->init_tsens = MB_DATA->Coils.init_Tsens; flag->init_tsens = MB_DATA->Coils.init_Tsens;
packStruct(MB_DATA, MAX_SENSE / 16); packStruct(MB_DATA, MAX_SENSE / 16);
if (_debug_init || MB_DATA->Coils.init_param)
{
_debug_init = 0;
MB_DATA->Coils.init_param = 0;
for(int i = 0; i < hdallas.onewire->RomCnt; i++)
{
sens[i].set_temp = MB_DATA->HoldRegs.set_Temp[i];
sens[i].hyst = MB_DATA->HoldRegs.set_hyst[i];
}
}
return FuncOK; return FuncOK;
}; };
@ -416,13 +427,15 @@ FuncStat Field_modbus(MB_DataStructureTypeDef* MB_DATA, Flags_TypeDef* flag)
FuncStat value_control(void ) FuncStat value_control(void )
{ {
for(int i=0;i<10;i++) for(int i = 0; i < hdallas.onewire->RomCnt; i++)
{ {
if (sens[i].temperature < sens[i].set_temp - sens[i].hyst) if (sens[i].temperature < sens[i].set_temp - sens[i].hyst)
{ {
MB_DATA.Coils.coils[0].all |= 1 << i; MB_DATA.Coils.coils[0].all |= 1 << i;
MB_DATA.Coils.coils[1].all &= ~(1 << i);
} }
@ -432,20 +445,15 @@ FuncStat value_control(void )
{ {
MB_DATA.Coils.coils[0].all &= ~(1 << i); MB_DATA.Coils.coils[0].all &= ~(1 << i);
MB_DATA.Coils.coils[1].all |= 1 << i;
}
if(GPIOB11_valve)
{
GPIOB->ODR|=1<<11;
}
else
{
GPIOB->ODR&=~(1<<11);
} }
} }
return FuncOK; return FuncOK;
} }
@ -457,8 +465,7 @@ uint16_t handle_valves(TEMP_TypeDef* temp_sense[MAX_SENSE] )
{ {
GPIOC->ODR |= 1 << 14; GPIOC->ODR |= 1 << 14;
} }
else else if (temp_sense[0]->state == STATE_CLOSE_VALVE)
if (temp_sense[0]->state==STATE_CLOSE_VALVE)
{ {
GPIOC->ODR &= ~(1 << 14); GPIOC->ODR &= ~(1 << 14);
} }
@ -467,18 +474,18 @@ uint16_t handle_valves(TEMP_TypeDef* temp_sense[MAX_SENSE] )
} }
void init_setpoint_all_T_sense(TEMP_TypeDef* temp_sense[MAX_SENSE]) void init_setpoint_all_T_sense(TEMP_TypeDef* temp_sense, int size_array)
{ {
//ds_search_devices(); //ds_search_devices();
for(int i=0;i<hdallas.onewire->RomCnt;i++) for(int i = 0; i < size_array ; i++)
{ {
temp_sense[i]->id[0]=roms[i][0]<<0|roms[i][1]<<8|roms[i][2]<<16|roms[i][3]<<24; temp_sense[i].id[0] = roms[i][0] << 0 | roms[i][1] << 8 | roms[i][2] << 16 | roms[i][3] << 24;
temp_sense[i]->id[1]=roms[i][4]<<0|roms[i][5]<<8|roms[i][6]<<16|roms[i][7]<<24; temp_sense[i].id[1] = roms[i][4] << 0 | roms[i][5] << 8 | roms[i][6] << 16 | roms[i][7] << 24;
temp_sense[i]->count =i+1; temp_sense[i].count = i + 1;
temp_sense[i]->location=1; temp_sense[i].location = 1;
temp_sense[i]->t_open=22; temp_sense[i].t_open = 22;
temp_sense[i]->t_close=18; temp_sense[i].t_close = 18;
temp_sense[i]->status_T_sense=1; temp_sense[i].status_T_sense = 1;
} }
} }
/* USER CODE END 4 */ /* USER CODE END 4 */

540
john103C6T6/Core/Src/main.c.orig Normal file
View File

@ -0,0 +1,540 @@
/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file : main.c
* @brief : Main program body
******************************************************************************
* @attention
*
* Copyright (c) 2025 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Includes ------------------------------------------------------------------*/
#include "main.h"
#include "adc.h"
#include "can.h"
#include "i2c.h"
#include "rtc.h"
#include "spi.h"
#include "tim.h"
#include "usart.h"
#include "gpio.h"
/* Private includes ----------------------------------------------------------*/
/* USER CODE BEGIN Includes */
#include "dallas_tools.h"
#include "def.h"
#include <stdio.h>
#include "modbus.h"
#include "eeprom_emul.h"
#include "stdio.h"
#include "flash_ring.h"
#include "string.h"
/* USER CODE END Includes */
/* Private typedef -----------------------------------------------------------*/
/* USER CODE BEGIN PTD */
/* USER CODE END PTD */
/* Private define ------------------------------------------------------------*/
/* USER CODE BEGIN PD */
uint16_t iter, cnt = 5;
uint8_t init_retries = 5;
uint8_t ralay_5v_on_var = 0;
/* USER CODE END PD */
/* Private macro -------------------------------------------------------------*/
/* USER CODE BEGIN PM */
float temperature;
uint8_t roms[MAX_DEVICES][8];
Flags_TypeDef flag;
//extern uint8_t devices_found ;
uint8_t _debug_init = 0;
TEMP_TypeDef temp_sense[30];
float set_temp_old[30];
char rx_buffer[64];
uint8_t rx_index = 0;
char command_ready = 0;
uint8_t uart_byte = 0;
uint8_t first_in = 1;
DALLAS_SensorHandleTypeDef sens[30];
int init_sens = 0;
FlashRecord_t* record;
uint8_t flash_buff[RECORD_SIZE-4];
/* USER CODE END PM */
/* Private variables ---------------------------------------------------------*/
/* USER CODE BEGIN PV */
int last_page_addr=LAST_PAGE_ADDR;
/* USER CODE END PV */
/* Private function prototypes -----------------------------------------------*/
void SystemClock_Config(void);
/* USER CODE BEGIN PFP */
/* USER CODE END PFP */
/* Private user code ---------------------------------------------------------*/
/* USER CODE BEGIN 0 */
/* USER CODE END 0 */
/**
* @brief The application entry point.
* @retval int
*/
int main(void)
{
/* USER CODE BEGIN 1 */
/* USER CODE END 1 */
/* MCU Configuration--------------------------------------------------------*/
/* Reset of all peripherals, Initializes the Flash interface and the Systick. */
HAL_Init();
/* USER CODE BEGIN Init */
/* USER CODE END Init */
/* Configure the system clock */
SystemClock_Config();
/* USER CODE BEGIN SysInit */
/* USER CODE END SysInit */
/* Initialize all configured peripherals */
MX_GPIO_Init();
MX_TIM1_Init();
MX_USART1_UART_Init();
MX_TIM2_Init();
MX_ADC1_Init();
MX_CAN_Init();
MX_I2C1_Init();
MX_RTC_Init();
MX_SPI1_Init();
/* USER CODE BEGIN 2 */
led_blink(GPIOC, 13, rest_iter, reset_blink_delay);
MODBUS_FirstInit(&hmodbus1, &mb_huart, &mb_htim);
MODBUS_Config(&hmodbus1, MODBUS_DEVICE_ID, MODBUS_TIMEOUT, MODBUS_MODE_SLAVE);
// Запуск приема Modbus
MODBUS_SlaveStart(&hmodbus1, NULL);
uint8_t uart_byte = 0;
Dallas_BusFirstInit(&htim1);
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> (<28><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>)
reinit_t_sens();
init_setpoint_all_T_sense(temp_sense, hdallas.onewire->RomCnt);
MB_DATA.InRegs.num_Tsens = hdallas.onewire->RomCnt;
BufferState_t buffer_state = buffer_init();
/* USER CODE END 2 */
/* Infinite loop */
/* USER CODE BEGIN WHILE */
while (1)
{
if (MB_DATA.Coils.relay_struct[0].state_val_bit.Temp11_relay_isOn)
{
MB_DATA.Coils.relay_struct[0].state_val_bit.Temp11_relay_isOn=0;
BufferState_t state = buffer_init();
uint32_t idx = (state.write_index ) % RECORDS_PER_PAGE;
FlashRecord_t* record = buffer_read_record(idx);
}
if (MB_DATA.Coils.relay_struct[0].state_val_bit.Temp10_relay_isOn)
{
MB_DATA.Coils.relay_struct[0].state_val_bit.Temp10_relay_isOn = 0;
FlashRecord_t new_record;
new_record.timestamp = HAL_GetTick();
memset(new_record.data, (uint8_t)*flash_buff, sizeof(new_record.data));
HAL_StatusTypeDef status = buffer_write_record(&new_record, &buffer_state);
if (status == HAL_OK)
{
// printf("Record written successfully\n");
GPIOC->ODR|=1<<13;
}
}
temp_sense[0].t_close = 1;
Field_modbus(&MB_DATA, &flag);
Check_Tconnect(&MB_DATA, &flag, &hdallas, 0);
value_control();
init_setpoint_all_T_sense(temp_sense, hdallas.onewire->RomCnt);
// handle_valves(temp_sense[]);
Dallas_StartConvertTAll(&hdallas, DALLAS_WAIT_BUS, 0);
for(int i = 0; i < hdallas.onewire->RomCnt; i++)
{
if(sens[i].isLost)
{
sens[i].lost_cnt ++;
}
Dallas_ReadTemperature(&sens[i]);
MB_DATA.InRegs.sens_Temp[i] = sens[i].temperature * 10;
/////////////////////////заменить на define ralay_5v_on_var GPIOA->ODR|=1<<10;
ralay_5v_on_var = MB_DATA.Coils.coils[1].state_val_bit.state_val_05;
if (ralay_5v_on_var)
{
GPIOA->ODR |= 1 << 10;
}
else
{
GPIOA->ODR &= ~(1 << 10);
}
}
/* USER CODE END WHILE */
/* USER CODE BEGIN 3 */
//iwdg_refresh();
//HAL_Delay(200);
}
/* USER CODE END 3 */
}
/**
* @brief System Clock Configuration
* @retval None
*/
void SystemClock_Config(void)
{
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
/** Initializes the RCC Oscillators according to the specified parameters
* in the RCC_OscInitTypeDef structure.
*/
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI | RCC_OSCILLATORTYPE_HSE;
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1;
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
RCC_OscInitStruct.LSIState = RCC_LSI_ON;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL9;
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
{
Error_Handler();
}
/** Initializes the CPU, AHB and APB buses clocks
*/
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
| RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)
{
Error_Handler();
}
PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_RTC | RCC_PERIPHCLK_ADC;
PeriphClkInit.RTCClockSelection = RCC_RTCCLKSOURCE_LSI;
PeriphClkInit.AdcClockSelection = RCC_ADCPCLK2_DIV6;
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
{
Error_Handler();
}
}
/* USER CODE BEGIN 4 */
void iwdg_refresh(void)
{
IWDG->KR = 0xAAAA; // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
}
void led_blink(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin, uint8_t iter, uint16_t delay)
{
for(int i = 0; i < iter; i++)
{
GPIOx->ODR ^= (1 << GPIO_Pin);
HAL_Delay(delay);
}
}
void Check_Tconnect(MB_DataStructureTypeDef* MB_DATA, Flags_TypeDef* flag, DALLAS_HandleTypeDef* hdallas, int a[0])
{
for(int i = 0; i < hdallas->onewire->RomCnt; i++)
{
if(sens[i].isLost)
{
//init_sens=1;
}
}
if (init_sens || flag->init_tsens)
{
init_sens = 0;
flag->init_tsens = 0;
//Dallas_BusFirstInit(&htim1);
DS18B20_Search(&DS, &OW) ;
reinit_t_sens();
MB_DATA->InRegs.num_Tsens = hdallas->onewire->RomCnt;
}
}
void reinit_t_sens(void)
{
for ( int i = 0; i < hdallas.onewire->RomCnt; i++)
{
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><> ROM-<2D><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
//sens[i].Init.init_func = &Dallas_SensorInitByROM;
// sens[i].Init.InitParam.ROM = rom_address;
sens[i].Init.InitParam.Ind = i;
sens[i].Init.init_func = &Dallas_SensorInitByInd;
sens[i].Init.Resolution = DALLAS_CONFIG_9_BITS;
MB_DATA.HoldRegs.set_Temp[i] = sens[i].set_temp = 20.;
MB_DATA.HoldRegs.set_hyst[i] = sens[i].hyst = 1;
Dallas_AddNewSensors(&hdallas, &sens[i]);
}
}
FuncStat packStruct(MB_DataStructureTypeDef* MB_DATA, int sizeARR)
{
for(int i = 0; i < sizeARR; i++)
{
for(int sens_num = 0; sens_num < hdallas.onewire->RomCnt; sens_num++)
{
switch(sens_num)
{
case 0:
MB_DATA->Coils.status_tSens[i].state_val_bit.Temp1_isConnected = sens[i * 16 + sens_num ].isConnected;
break;
case 1:
MB_DATA->Coils.status_tSens[i].state_val_bit.Temp2_isConnected = sens[i * 16 + sens_num ].isConnected;
break;
case 2:
MB_DATA->Coils.status_tSens[i].state_val_bit.Temp3_isConnected = sens[i * 16 + sens_num ].isConnected;
break;
case 3:
MB_DATA->Coils.status_tSens[i].state_val_bit.Temp4_isConnected = sens[i * 16 + sens_num ].isConnected;
break;
case 4:
MB_DATA->Coils.status_tSens[i].state_val_bit.Temp5_isConnected = sens[i * 16 + sens_num ].isConnected;
break;
case 5:
MB_DATA->Coils.status_tSens[i].state_val_bit.Temp6_isConnected = sens[i * 16 + sens_num ].isConnected;
break;
case 6:
MB_DATA->Coils.status_tSens[i].state_val_bit.Temp7_isConnected = sens[i * 16 + sens_num ].isConnected;
break;
case 7:
MB_DATA->Coils.status_tSens[i].state_val_bit.Temp8_isConnected = sens[i * 16 + sens_num ].isConnected;
break;
case 8:
MB_DATA->Coils.status_tSens[i].state_val_bit.Temp9_isConnected = sens[i * 16 + sens_num ].isConnected;
break;
case 9:
MB_DATA->Coils.status_tSens[i].state_val_bit.Temp10_isConnected = sens[i * 16 + sens_num ].isConnected;
break;
case 10:
MB_DATA->Coils.status_tSens[i].state_val_bit.Temp11_isConnected = sens[i * 16 + sens_num ].isConnected;
break;
case 11:
MB_DATA->Coils.status_tSens[i].state_val_bit.Temp12_isConnected = sens[i * 16 + sens_num ].isConnected;
break;
case 12:
MB_DATA->Coils.status_tSens[i].state_val_bit.Temp13_isConnected = sens[i * 16 + sens_num ].isConnected;
break;
case 13:
MB_DATA->Coils.status_tSens[i].state_val_bit.Temp14_isConnected = sens[i * 16 + sens_num ].isConnected;
break;
case 14:
MB_DATA->Coils.status_tSens[i].state_val_bit.Temp15_isConnected = sens[i * 16 + sens_num ].isConnected;
break;
case 15:
MB_DATA->Coils.status_tSens[i].state_val_bit.Temp16_isConnected = sens[i * 16 + sens_num ].isConnected;
break;
}
}
}
return FuncOK;
}
FuncStat Field_modbus(MB_DataStructureTypeDef* MB_DATA, Flags_TypeDef* flag)
{
MB_DATA->InRegs.ID = *hdallas.ds_devices;
flag->init_tsens = MB_DATA->Coils.init_Tsens;
packStruct(MB_DATA, MAX_SENSE / 16);
if (_debug_init || MB_DATA->Coils.init_param)
{
_debug_init = 0;
MB_DATA->Coils.init_param = 0;
for(int i = 0; i < hdallas.onewire->RomCnt; i++)
{
sens[i].set_temp = MB_DATA->HoldRegs.set_Temp[i];
sens[i].hyst = MB_DATA->HoldRegs.set_hyst[i];
}
}
return FuncOK;
};
FuncStat value_control(void )
{
for(int i = 0; i < hdallas.onewire->RomCnt; i++)
{
if (sens[i].temperature < sens[i].set_temp - sens[i].hyst)
{
MB_DATA.Coils.coils[0].all |= 1 << i;
MB_DATA.Coils.coils[1].all &= ~(1 << i);
}
else
if (sens[i].temperature > sens[i].set_temp + sens[i].hyst)
{
MB_DATA.Coils.coils[0].all &= ~(1 << i);
MB_DATA.Coils.coils[1].all |= 1 << i;
}
}
return FuncOK;
}
uint16_t handle_valves(TEMP_TypeDef* temp_sense[MAX_SENSE] )
{
if (temp_sense[0]->state == STATE_OPEN_VALVE)
{
GPIOC->ODR |= 1 << 14;
}
else if (temp_sense[0]->state == STATE_CLOSE_VALVE)
{
GPIOC->ODR &= ~(1 << 14);
}
return 1;
}
void init_setpoint_all_T_sense(TEMP_TypeDef* temp_sense, int size_array)
{
//ds_search_devices();
for(int i = 0; i < size_array ; i++)
{
temp_sense[i].id[0] = roms[i][0] << 0 | roms[i][1] << 8 | roms[i][2] << 16 | roms[i][3] << 24;
temp_sense[i].id[1] = roms[i][4] << 0 | roms[i][5] << 8 | roms[i][6] << 16 | roms[i][7] << 24;
temp_sense[i].count = i + 1;
temp_sense[i].location = 1;
temp_sense[i].t_open = 22;
temp_sense[i].t_close = 18;
temp_sense[i].status_T_sense = 1;
}
}
/* USER CODE END 4 */
/**
* @brief Period elapsed callback in non blocking mode
* @note This function is called when TIM3 interrupt took place, inside
* HAL_TIM_IRQHandler(). It makes a direct call to HAL_IncTick() to increment
* a global variable "uwTick" used as application time base.
* @param htim : TIM handle
* @retval None
*/
void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
{
/* USER CODE BEGIN Callback 0 */
/* USER CODE END Callback 0 */
if (htim->Instance == TIM3)
{
HAL_IncTick();
}
/* USER CODE BEGIN Callback 1 */
/* USER CODE END Callback 1 */
}
/**
* @brief This function is executed in case of error occurrence.
* @retval None
*/
void Error_Handler(void)
{
/* USER CODE BEGIN Error_Handler_Debug */
/* User can add his own implementation to report the HAL error return state */
__disable_irq();
while (1)
{
}
/* USER CODE END Error_Handler_Debug */
}
#ifdef USE_FULL_ASSERT
/**
* @brief Reports the name of the source file and the source line number
* where the assert_param error has occurred.
* @param file: pointer to the source file name
* @param line: assert_param error line source number
* @retval None
*/
void assert_failed(uint8_t *file, uint32_t line)
{
/* USER CODE BEGIN 6 */
/* User can add his own implementation to report the file name and line number,
ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
/* USER CODE END 6 */
}
#endif /* USE_FULL_ASSERT */

229
john103C6T6/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103x6.h → john103C6T6/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xb.h
View File

@ -1,6 +1,6 @@
/** /**
****************************************************************************** ******************************************************************************
* @file stm32f103x6.h * @file stm32f103xb.h
* @author MCD Application Team * @author MCD Application Team
* @brief CMSIS Cortex-M3 Device Peripheral Access Layer Header File. * @brief CMSIS Cortex-M3 Device Peripheral Access Layer Header File.
* This file contains all the peripheral register's definitions, bits * This file contains all the peripheral register's definitions, bits
@ -29,12 +29,12 @@
* @{ * @{
*/ */
/** @addtogroup stm32f103x6 /** @addtogroup stm32f103xb
* @{ * @{
*/ */
#ifndef __STM32F103x6_H #ifndef __STM32F103xB_H
#define __STM32F103x6_H #define __STM32F103xB_H
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
@ -109,11 +109,16 @@ typedef enum
TIM1_CC_IRQn = 27, /*!< TIM1 Capture Compare Interrupt */ TIM1_CC_IRQn = 27, /*!< TIM1 Capture Compare Interrupt */
TIM2_IRQn = 28, /*!< TIM2 global Interrupt */ TIM2_IRQn = 28, /*!< TIM2 global Interrupt */
TIM3_IRQn = 29, /*!< TIM3 global Interrupt */ TIM3_IRQn = 29, /*!< TIM3 global Interrupt */
TIM4_IRQn = 30, /*!< TIM4 global Interrupt */
I2C1_EV_IRQn = 31, /*!< I2C1 Event Interrupt */ I2C1_EV_IRQn = 31, /*!< I2C1 Event Interrupt */
I2C1_ER_IRQn = 32, /*!< I2C1 Error Interrupt */ I2C1_ER_IRQn = 32, /*!< I2C1 Error Interrupt */
I2C2_EV_IRQn = 33, /*!< I2C2 Event Interrupt */
I2C2_ER_IRQn = 34, /*!< I2C2 Error Interrupt */
SPI1_IRQn = 35, /*!< SPI1 global Interrupt */ SPI1_IRQn = 35, /*!< SPI1 global Interrupt */
SPI2_IRQn = 36, /*!< SPI2 global Interrupt */
USART1_IRQn = 37, /*!< USART1 global Interrupt */ USART1_IRQn = 37, /*!< USART1 global Interrupt */
USART2_IRQn = 38, /*!< USART2 global Interrupt */ USART2_IRQn = 38, /*!< USART2 global Interrupt */
USART3_IRQn = 39, /*!< USART3 global Interrupt */
EXTI15_10_IRQn = 40, /*!< External Line[15:10] Interrupts */ EXTI15_10_IRQn = 40, /*!< External Line[15:10] Interrupts */
RTC_Alarm_IRQn = 41, /*!< RTC Alarm through EXTI Line Interrupt */ RTC_Alarm_IRQn = 41, /*!< RTC Alarm through EXTI Line Interrupt */
USBWakeUp_IRQn = 42, /*!< USB Device WakeUp from suspend through EXTI Line Interrupt */ USBWakeUp_IRQn = 42, /*!< USB Device WakeUp from suspend through EXTI Line Interrupt */
@ -565,7 +570,7 @@ typedef struct
#define FLASH_BASE 0x08000000UL /*!< FLASH base address in the alias region */ #define FLASH_BASE 0x08000000UL /*!< FLASH base address in the alias region */
#define FLASH_BANK1_END 0x08007FFFUL /*!< FLASH END address of bank1 */ #define FLASH_BANK1_END 0x0801FFFFUL /*!< FLASH END address of bank1 */
#define SRAM_BASE 0x20000000UL /*!< SRAM base address in the alias region */ #define SRAM_BASE 0x20000000UL /*!< SRAM base address in the alias region */
#define PERIPH_BASE 0x40000000UL /*!< Peripheral base address in the alias region */ #define PERIPH_BASE 0x40000000UL /*!< Peripheral base address in the alias region */
@ -580,11 +585,15 @@ typedef struct
#define TIM2_BASE (APB1PERIPH_BASE + 0x00000000UL) #define TIM2_BASE (APB1PERIPH_BASE + 0x00000000UL)
#define TIM3_BASE (APB1PERIPH_BASE + 0x00000400UL) #define TIM3_BASE (APB1PERIPH_BASE + 0x00000400UL)
#define TIM4_BASE (APB1PERIPH_BASE + 0x00000800UL)
#define RTC_BASE (APB1PERIPH_BASE + 0x00002800UL) #define RTC_BASE (APB1PERIPH_BASE + 0x00002800UL)
#define WWDG_BASE (APB1PERIPH_BASE + 0x00002C00UL) #define WWDG_BASE (APB1PERIPH_BASE + 0x00002C00UL)
#define IWDG_BASE (APB1PERIPH_BASE + 0x00003000UL) #define IWDG_BASE (APB1PERIPH_BASE + 0x00003000UL)
#define SPI2_BASE (APB1PERIPH_BASE + 0x00003800UL)
#define USART2_BASE (APB1PERIPH_BASE + 0x00004400UL) #define USART2_BASE (APB1PERIPH_BASE + 0x00004400UL)
#define USART3_BASE (APB1PERIPH_BASE + 0x00004800UL)
#define I2C1_BASE (APB1PERIPH_BASE + 0x00005400UL) #define I2C1_BASE (APB1PERIPH_BASE + 0x00005400UL)
#define I2C2_BASE (APB1PERIPH_BASE + 0x00005800UL)
#define CAN1_BASE (APB1PERIPH_BASE + 0x00006400UL) #define CAN1_BASE (APB1PERIPH_BASE + 0x00006400UL)
#define BKP_BASE (APB1PERIPH_BASE + 0x00006C00UL) #define BKP_BASE (APB1PERIPH_BASE + 0x00006C00UL)
#define PWR_BASE (APB1PERIPH_BASE + 0x00007000UL) #define PWR_BASE (APB1PERIPH_BASE + 0x00007000UL)
@ -594,6 +603,7 @@ typedef struct
#define GPIOB_BASE (APB2PERIPH_BASE + 0x00000C00UL) #define GPIOB_BASE (APB2PERIPH_BASE + 0x00000C00UL)
#define GPIOC_BASE (APB2PERIPH_BASE + 0x00001000UL) #define GPIOC_BASE (APB2PERIPH_BASE + 0x00001000UL)
#define GPIOD_BASE (APB2PERIPH_BASE + 0x00001400UL) #define GPIOD_BASE (APB2PERIPH_BASE + 0x00001400UL)
#define GPIOE_BASE (APB2PERIPH_BASE + 0x00001800UL)
#define ADC1_BASE (APB2PERIPH_BASE + 0x00002400UL) #define ADC1_BASE (APB2PERIPH_BASE + 0x00002400UL)
#define ADC2_BASE (APB2PERIPH_BASE + 0x00002800UL) #define ADC2_BASE (APB2PERIPH_BASE + 0x00002800UL)
#define TIM1_BASE (APB2PERIPH_BASE + 0x00002C00UL) #define TIM1_BASE (APB2PERIPH_BASE + 0x00002C00UL)
@ -636,11 +646,15 @@ typedef struct
#define TIM2 ((TIM_TypeDef *)TIM2_BASE) #define TIM2 ((TIM_TypeDef *)TIM2_BASE)
#define TIM3 ((TIM_TypeDef *)TIM3_BASE) #define TIM3 ((TIM_TypeDef *)TIM3_BASE)
#define TIM4 ((TIM_TypeDef *)TIM4_BASE)
#define RTC ((RTC_TypeDef *)RTC_BASE) #define RTC ((RTC_TypeDef *)RTC_BASE)
#define WWDG ((WWDG_TypeDef *)WWDG_BASE) #define WWDG ((WWDG_TypeDef *)WWDG_BASE)
#define IWDG ((IWDG_TypeDef *)IWDG_BASE) #define IWDG ((IWDG_TypeDef *)IWDG_BASE)
#define SPI2 ((SPI_TypeDef *)SPI2_BASE)
#define USART2 ((USART_TypeDef *)USART2_BASE) #define USART2 ((USART_TypeDef *)USART2_BASE)
#define USART3 ((USART_TypeDef *)USART3_BASE)
#define I2C1 ((I2C_TypeDef *)I2C1_BASE) #define I2C1 ((I2C_TypeDef *)I2C1_BASE)
#define I2C2 ((I2C_TypeDef *)I2C2_BASE)
#define USB ((USB_TypeDef *)USB_BASE) #define USB ((USB_TypeDef *)USB_BASE)
#define CAN1 ((CAN_TypeDef *)CAN1_BASE) #define CAN1 ((CAN_TypeDef *)CAN1_BASE)
#define BKP ((BKP_TypeDef *)BKP_BASE) #define BKP ((BKP_TypeDef *)BKP_BASE)
@ -651,6 +665,7 @@ typedef struct
#define GPIOB ((GPIO_TypeDef *)GPIOB_BASE) #define GPIOB ((GPIO_TypeDef *)GPIOB_BASE)
#define GPIOC ((GPIO_TypeDef *)GPIOC_BASE) #define GPIOC ((GPIO_TypeDef *)GPIOC_BASE)
#define GPIOD ((GPIO_TypeDef *)GPIOD_BASE) #define GPIOD ((GPIO_TypeDef *)GPIOD_BASE)
#define GPIOE ((GPIO_TypeDef *)GPIOE_BASE)
#define ADC1 ((ADC_TypeDef *)ADC1_BASE) #define ADC1 ((ADC_TypeDef *)ADC1_BASE)
#define ADC2 ((ADC_TypeDef *)ADC2_BASE) #define ADC2 ((ADC_TypeDef *)ADC2_BASE)
#define ADC12_COMMON ((ADC_Common_TypeDef *)ADC1_BASE) #define ADC12_COMMON ((ADC_Common_TypeDef *)ADC1_BASE)
@ -1185,6 +1200,9 @@ typedef struct
#define RCC_APB2RSTR_USART1RST RCC_APB2RSTR_USART1RST_Msk /*!< USART1 reset */ #define RCC_APB2RSTR_USART1RST RCC_APB2RSTR_USART1RST_Msk /*!< USART1 reset */
#define RCC_APB2RSTR_IOPERST_Pos (6U)
#define RCC_APB2RSTR_IOPERST_Msk (0x1UL << RCC_APB2RSTR_IOPERST_Pos) /*!< 0x00000040 */
#define RCC_APB2RSTR_IOPERST RCC_APB2RSTR_IOPERST_Msk /*!< I/O port E reset */
@ -1217,6 +1235,18 @@ typedef struct
#define RCC_APB1RSTR_PWRRST_Msk (0x1UL << RCC_APB1RSTR_PWRRST_Pos) /*!< 0x10000000 */ #define RCC_APB1RSTR_PWRRST_Msk (0x1UL << RCC_APB1RSTR_PWRRST_Pos) /*!< 0x10000000 */
#define RCC_APB1RSTR_PWRRST RCC_APB1RSTR_PWRRST_Msk /*!< Power interface reset */ #define RCC_APB1RSTR_PWRRST RCC_APB1RSTR_PWRRST_Msk /*!< Power interface reset */
#define RCC_APB1RSTR_TIM4RST_Pos (2U)
#define RCC_APB1RSTR_TIM4RST_Msk (0x1UL << RCC_APB1RSTR_TIM4RST_Pos) /*!< 0x00000004 */
#define RCC_APB1RSTR_TIM4RST RCC_APB1RSTR_TIM4RST_Msk /*!< Timer 4 reset */
#define RCC_APB1RSTR_SPI2RST_Pos (14U)
#define RCC_APB1RSTR_SPI2RST_Msk (0x1UL << RCC_APB1RSTR_SPI2RST_Pos) /*!< 0x00004000 */
#define RCC_APB1RSTR_SPI2RST RCC_APB1RSTR_SPI2RST_Msk /*!< SPI 2 reset */
#define RCC_APB1RSTR_USART3RST_Pos (18U)
#define RCC_APB1RSTR_USART3RST_Msk (0x1UL << RCC_APB1RSTR_USART3RST_Pos) /*!< 0x00040000 */
#define RCC_APB1RSTR_USART3RST RCC_APB1RSTR_USART3RST_Msk /*!< USART 3 reset */
#define RCC_APB1RSTR_I2C2RST_Pos (22U)
#define RCC_APB1RSTR_I2C2RST_Msk (0x1UL << RCC_APB1RSTR_I2C2RST_Pos) /*!< 0x00400000 */
#define RCC_APB1RSTR_I2C2RST RCC_APB1RSTR_I2C2RST_Msk /*!< I2C 2 reset */
#define RCC_APB1RSTR_USBRST_Pos (23U) #define RCC_APB1RSTR_USBRST_Pos (23U)
#define RCC_APB1RSTR_USBRST_Msk (0x1UL << RCC_APB1RSTR_USBRST_Pos) /*!< 0x00800000 */ #define RCC_APB1RSTR_USBRST_Msk (0x1UL << RCC_APB1RSTR_USBRST_Pos) /*!< 0x00800000 */
@ -1279,6 +1309,9 @@ typedef struct
#define RCC_APB2ENR_USART1EN RCC_APB2ENR_USART1EN_Msk /*!< USART1 clock enable */ #define RCC_APB2ENR_USART1EN RCC_APB2ENR_USART1EN_Msk /*!< USART1 clock enable */
#define RCC_APB2ENR_IOPEEN_Pos (6U)
#define RCC_APB2ENR_IOPEEN_Msk (0x1UL << RCC_APB2ENR_IOPEEN_Pos) /*!< 0x00000040 */
#define RCC_APB2ENR_IOPEEN RCC_APB2ENR_IOPEEN_Msk /*!< I/O port E clock enable */
@ -1311,6 +1344,18 @@ typedef struct
#define RCC_APB1ENR_PWREN_Msk (0x1UL << RCC_APB1ENR_PWREN_Pos) /*!< 0x10000000 */ #define RCC_APB1ENR_PWREN_Msk (0x1UL << RCC_APB1ENR_PWREN_Pos) /*!< 0x10000000 */
#define RCC_APB1ENR_PWREN RCC_APB1ENR_PWREN_Msk /*!< Power interface clock enable */ #define RCC_APB1ENR_PWREN RCC_APB1ENR_PWREN_Msk /*!< Power interface clock enable */
#define RCC_APB1ENR_TIM4EN_Pos (2U)
#define RCC_APB1ENR_TIM4EN_Msk (0x1UL << RCC_APB1ENR_TIM4EN_Pos) /*!< 0x00000004 */
#define RCC_APB1ENR_TIM4EN RCC_APB1ENR_TIM4EN_Msk /*!< Timer 4 clock enable */
#define RCC_APB1ENR_SPI2EN_Pos (14U)
#define RCC_APB1ENR_SPI2EN_Msk (0x1UL << RCC_APB1ENR_SPI2EN_Pos) /*!< 0x00004000 */
#define RCC_APB1ENR_SPI2EN RCC_APB1ENR_SPI2EN_Msk /*!< SPI 2 clock enable */
#define RCC_APB1ENR_USART3EN_Pos (18U)
#define RCC_APB1ENR_USART3EN_Msk (0x1UL << RCC_APB1ENR_USART3EN_Pos) /*!< 0x00040000 */
#define RCC_APB1ENR_USART3EN RCC_APB1ENR_USART3EN_Msk /*!< USART 3 clock enable */
#define RCC_APB1ENR_I2C2EN_Pos (22U)
#define RCC_APB1ENR_I2C2EN_Msk (0x1UL << RCC_APB1ENR_I2C2EN_Pos) /*!< 0x00400000 */
#define RCC_APB1ENR_I2C2EN RCC_APB1ENR_I2C2EN_Msk /*!< I2C 2 clock enable */
#define RCC_APB1ENR_USBEN_Pos (23U) #define RCC_APB1ENR_USBEN_Pos (23U)
#define RCC_APB1ENR_USBEN_Msk (0x1UL << RCC_APB1ENR_USBEN_Pos) /*!< 0x00800000 */ #define RCC_APB1ENR_USBEN_Msk (0x1UL << RCC_APB1ENR_USBEN_Pos) /*!< 0x00800000 */
@ -1999,6 +2044,20 @@ typedef struct
#define AFIO_MAPR_USART2_REMAP_Msk (0x1UL << AFIO_MAPR_USART2_REMAP_Pos) /*!< 0x00000008 */ #define AFIO_MAPR_USART2_REMAP_Msk (0x1UL << AFIO_MAPR_USART2_REMAP_Pos) /*!< 0x00000008 */
#define AFIO_MAPR_USART2_REMAP AFIO_MAPR_USART2_REMAP_Msk /*!< USART2 remapping */ #define AFIO_MAPR_USART2_REMAP AFIO_MAPR_USART2_REMAP_Msk /*!< USART2 remapping */
#define AFIO_MAPR_USART3_REMAP_Pos (4U)
#define AFIO_MAPR_USART3_REMAP_Msk (0x3UL << AFIO_MAPR_USART3_REMAP_Pos) /*!< 0x00000030 */
#define AFIO_MAPR_USART3_REMAP AFIO_MAPR_USART3_REMAP_Msk /*!< USART3_REMAP[1:0] bits (USART3 remapping) */
#define AFIO_MAPR_USART3_REMAP_0 (0x1UL << AFIO_MAPR_USART3_REMAP_Pos) /*!< 0x00000010 */
#define AFIO_MAPR_USART3_REMAP_1 (0x2UL << AFIO_MAPR_USART3_REMAP_Pos) /*!< 0x00000020 */
/* USART3_REMAP configuration */
#define AFIO_MAPR_USART3_REMAP_NOREMAP 0x00000000U /*!< No remap (TX/PB10, RX/PB11, CK/PB12, CTS/PB13, RTS/PB14) */
#define AFIO_MAPR_USART3_REMAP_PARTIALREMAP_Pos (4U)
#define AFIO_MAPR_USART3_REMAP_PARTIALREMAP_Msk (0x1UL << AFIO_MAPR_USART3_REMAP_PARTIALREMAP_Pos) /*!< 0x00000010 */
#define AFIO_MAPR_USART3_REMAP_PARTIALREMAP AFIO_MAPR_USART3_REMAP_PARTIALREMAP_Msk /*!< Partial remap (TX/PC10, RX/PC11, CK/PC12, CTS/PB13, RTS/PB14) */
#define AFIO_MAPR_USART3_REMAP_FULLREMAP_Pos (4U)
#define AFIO_MAPR_USART3_REMAP_FULLREMAP_Msk (0x3UL << AFIO_MAPR_USART3_REMAP_FULLREMAP_Pos) /*!< 0x00000030 */
#define AFIO_MAPR_USART3_REMAP_FULLREMAP AFIO_MAPR_USART3_REMAP_FULLREMAP_Msk /*!< Full remap (TX/PD8, RX/PD9, CK/PD10, CTS/PD11, RTS/PD12) */
#define AFIO_MAPR_TIM1_REMAP_Pos (6U) #define AFIO_MAPR_TIM1_REMAP_Pos (6U)
#define AFIO_MAPR_TIM1_REMAP_Msk (0x3UL << AFIO_MAPR_TIM1_REMAP_Pos) /*!< 0x000000C0 */ #define AFIO_MAPR_TIM1_REMAP_Msk (0x3UL << AFIO_MAPR_TIM1_REMAP_Pos) /*!< 0x000000C0 */
@ -2048,6 +2107,9 @@ typedef struct
#define AFIO_MAPR_TIM3_REMAP_FULLREMAP_Msk (0x3UL << AFIO_MAPR_TIM3_REMAP_FULLREMAP_Pos) /*!< 0x00000C00 */ #define AFIO_MAPR_TIM3_REMAP_FULLREMAP_Msk (0x3UL << AFIO_MAPR_TIM3_REMAP_FULLREMAP_Pos) /*!< 0x00000C00 */
#define AFIO_MAPR_TIM3_REMAP_FULLREMAP AFIO_MAPR_TIM3_REMAP_FULLREMAP_Msk /*!< Full remap (CH1/PC6, CH2/PC7, CH3/PC8, CH4/PC9) */ #define AFIO_MAPR_TIM3_REMAP_FULLREMAP AFIO_MAPR_TIM3_REMAP_FULLREMAP_Msk /*!< Full remap (CH1/PC6, CH2/PC7, CH3/PC8, CH4/PC9) */
#define AFIO_MAPR_TIM4_REMAP_Pos (12U)
#define AFIO_MAPR_TIM4_REMAP_Msk (0x1UL << AFIO_MAPR_TIM4_REMAP_Pos) /*!< 0x00001000 */
#define AFIO_MAPR_TIM4_REMAP AFIO_MAPR_TIM4_REMAP_Msk /*!< TIM4_REMAP bit (TIM4 remapping) */
#define AFIO_MAPR_CAN_REMAP_Pos (13U) #define AFIO_MAPR_CAN_REMAP_Pos (13U)
#define AFIO_MAPR_CAN_REMAP_Msk (0x3UL << AFIO_MAPR_CAN_REMAP_Pos) /*!< 0x00006000 */ #define AFIO_MAPR_CAN_REMAP_Msk (0x3UL << AFIO_MAPR_CAN_REMAP_Pos) /*!< 0x00006000 */
@ -9600,12 +9662,18 @@ typedef struct
#define DBGMCU_CR_DBG_TIM3_STOP_Pos (12U) #define DBGMCU_CR_DBG_TIM3_STOP_Pos (12U)
#define DBGMCU_CR_DBG_TIM3_STOP_Msk (0x1UL << DBGMCU_CR_DBG_TIM3_STOP_Pos) /*!< 0x00001000 */ #define DBGMCU_CR_DBG_TIM3_STOP_Msk (0x1UL << DBGMCU_CR_DBG_TIM3_STOP_Pos) /*!< 0x00001000 */
#define DBGMCU_CR_DBG_TIM3_STOP DBGMCU_CR_DBG_TIM3_STOP_Msk /*!< TIM3 counter stopped when core is halted */ #define DBGMCU_CR_DBG_TIM3_STOP DBGMCU_CR_DBG_TIM3_STOP_Msk /*!< TIM3 counter stopped when core is halted */
#define DBGMCU_CR_DBG_TIM4_STOP_Pos (13U)
#define DBGMCU_CR_DBG_TIM4_STOP_Msk (0x1UL << DBGMCU_CR_DBG_TIM4_STOP_Pos) /*!< 0x00002000 */
#define DBGMCU_CR_DBG_TIM4_STOP DBGMCU_CR_DBG_TIM4_STOP_Msk /*!< TIM4 counter stopped when core is halted */
#define DBGMCU_CR_DBG_CAN1_STOP_Pos (14U) #define DBGMCU_CR_DBG_CAN1_STOP_Pos (14U)
#define DBGMCU_CR_DBG_CAN1_STOP_Msk (0x1UL << DBGMCU_CR_DBG_CAN1_STOP_Pos) /*!< 0x00004000 */ #define DBGMCU_CR_DBG_CAN1_STOP_Msk (0x1UL << DBGMCU_CR_DBG_CAN1_STOP_Pos) /*!< 0x00004000 */
#define DBGMCU_CR_DBG_CAN1_STOP DBGMCU_CR_DBG_CAN1_STOP_Msk /*!< Debug CAN1 stopped when Core is halted */ #define DBGMCU_CR_DBG_CAN1_STOP DBGMCU_CR_DBG_CAN1_STOP_Msk /*!< Debug CAN1 stopped when Core is halted */
#define DBGMCU_CR_DBG_I2C1_SMBUS_TIMEOUT_Pos (15U) #define DBGMCU_CR_DBG_I2C1_SMBUS_TIMEOUT_Pos (15U)
#define DBGMCU_CR_DBG_I2C1_SMBUS_TIMEOUT_Msk (0x1UL << DBGMCU_CR_DBG_I2C1_SMBUS_TIMEOUT_Pos) /*!< 0x00008000 */ #define DBGMCU_CR_DBG_I2C1_SMBUS_TIMEOUT_Msk (0x1UL << DBGMCU_CR_DBG_I2C1_SMBUS_TIMEOUT_Pos) /*!< 0x00008000 */
#define DBGMCU_CR_DBG_I2C1_SMBUS_TIMEOUT DBGMCU_CR_DBG_I2C1_SMBUS_TIMEOUT_Msk /*!< SMBUS timeout mode stopped when Core is halted */ #define DBGMCU_CR_DBG_I2C1_SMBUS_TIMEOUT DBGMCU_CR_DBG_I2C1_SMBUS_TIMEOUT_Msk /*!< SMBUS timeout mode stopped when Core is halted */
#define DBGMCU_CR_DBG_I2C2_SMBUS_TIMEOUT_Pos (16U)
#define DBGMCU_CR_DBG_I2C2_SMBUS_TIMEOUT_Msk (0x1UL << DBGMCU_CR_DBG_I2C2_SMBUS_TIMEOUT_Pos) /*!< 0x00010000 */
#define DBGMCU_CR_DBG_I2C2_SMBUS_TIMEOUT DBGMCU_CR_DBG_I2C2_SMBUS_TIMEOUT_Msk /*!< SMBUS timeout mode stopped when Core is halted */
/******************************************************************************/ /******************************************************************************/
/* */ /* */
@ -9778,6 +9846,30 @@ typedef struct
#define FLASH_WRP0_nWRP0_Msk (0xFFUL << FLASH_WRP0_nWRP0_Pos) /*!< 0x0000FF00 */ #define FLASH_WRP0_nWRP0_Msk (0xFFUL << FLASH_WRP0_nWRP0_Pos) /*!< 0x0000FF00 */
#define FLASH_WRP0_nWRP0 FLASH_WRP0_nWRP0_Msk /*!< Flash memory write protection complemented option bytes */ #define FLASH_WRP0_nWRP0 FLASH_WRP0_nWRP0_Msk /*!< Flash memory write protection complemented option bytes */
/****************** Bit definition for FLASH_WRP1 register ******************/
#define FLASH_WRP1_WRP1_Pos (16U)
#define FLASH_WRP1_WRP1_Msk (0xFFUL << FLASH_WRP1_WRP1_Pos) /*!< 0x00FF0000 */
#define FLASH_WRP1_WRP1 FLASH_WRP1_WRP1_Msk /*!< Flash memory write protection option bytes */
#define FLASH_WRP1_nWRP1_Pos (24U)
#define FLASH_WRP1_nWRP1_Msk (0xFFUL << FLASH_WRP1_nWRP1_Pos) /*!< 0xFF000000 */
#define FLASH_WRP1_nWRP1 FLASH_WRP1_nWRP1_Msk /*!< Flash memory write protection complemented option bytes */
/****************** Bit definition for FLASH_WRP2 register ******************/
#define FLASH_WRP2_WRP2_Pos (0U)
#define FLASH_WRP2_WRP2_Msk (0xFFUL << FLASH_WRP2_WRP2_Pos) /*!< 0x000000FF */
#define FLASH_WRP2_WRP2 FLASH_WRP2_WRP2_Msk /*!< Flash memory write protection option bytes */
#define FLASH_WRP2_nWRP2_Pos (8U)
#define FLASH_WRP2_nWRP2_Msk (0xFFUL << FLASH_WRP2_nWRP2_Pos) /*!< 0x0000FF00 */
#define FLASH_WRP2_nWRP2 FLASH_WRP2_nWRP2_Msk /*!< Flash memory write protection complemented option bytes */
/****************** Bit definition for FLASH_WRP3 register ******************/
#define FLASH_WRP3_WRP3_Pos (16U)
#define FLASH_WRP3_WRP3_Msk (0xFFUL << FLASH_WRP3_WRP3_Pos) /*!< 0x00FF0000 */
#define FLASH_WRP3_WRP3 FLASH_WRP3_WRP3_Msk /*!< Flash memory write protection option bytes */
#define FLASH_WRP3_nWRP3_Pos (24U)
#define FLASH_WRP3_nWRP3_Msk (0xFFUL << FLASH_WRP3_nWRP3_Pos) /*!< 0xFF000000 */
#define FLASH_WRP3_nWRP3 FLASH_WRP3_nWRP3_Msk /*!< Flash memory write protection complemented option bytes */
/** /**
@ -9823,7 +9915,8 @@ typedef struct
#define IS_GPIO_ALL_INSTANCE(INSTANCE) (((INSTANCE) == GPIOA) || \ #define IS_GPIO_ALL_INSTANCE(INSTANCE) (((INSTANCE) == GPIOA) || \
((INSTANCE) == GPIOB) || \ ((INSTANCE) == GPIOB) || \
((INSTANCE) == GPIOC) || \ ((INSTANCE) == GPIOC) || \
((INSTANCE) == GPIOD)) ((INSTANCE) == GPIOD) || \
((INSTANCE) == GPIOE))
/**************************** GPIO Alternate Function Instances ***************/ /**************************** GPIO Alternate Function Instances ***************/
#define IS_GPIO_AF_INSTANCE(INSTANCE) IS_GPIO_ALL_INSTANCE(INSTANCE) #define IS_GPIO_AF_INSTANCE(INSTANCE) IS_GPIO_ALL_INSTANCE(INSTANCE)
@ -9832,7 +9925,8 @@ typedef struct
#define IS_GPIO_LOCK_INSTANCE(INSTANCE) IS_GPIO_ALL_INSTANCE(INSTANCE) #define IS_GPIO_LOCK_INSTANCE(INSTANCE) IS_GPIO_ALL_INSTANCE(INSTANCE)
/******************************** I2C Instances *******************************/ /******************************** I2C Instances *******************************/
#define IS_I2C_ALL_INSTANCE(INSTANCE) ((INSTANCE) == I2C1) #define IS_I2C_ALL_INSTANCE(INSTANCE) (((INSTANCE) == I2C1) || \
((INSTANCE) == I2C2))
/******************************* SMBUS Instances ******************************/ /******************************* SMBUS Instances ******************************/
#define IS_SMBUS_ALL_INSTANCE IS_I2C_ALL_INSTANCE #define IS_SMBUS_ALL_INSTANCE IS_I2C_ALL_INSTANCE
@ -9841,86 +9935,102 @@ typedef struct
#define IS_IWDG_ALL_INSTANCE(INSTANCE) ((INSTANCE) == IWDG) #define IS_IWDG_ALL_INSTANCE(INSTANCE) ((INSTANCE) == IWDG)
/******************************** SPI Instances *******************************/ /******************************** SPI Instances *******************************/
#define IS_SPI_ALL_INSTANCE(INSTANCE) ((INSTANCE) == SPI1) #define IS_SPI_ALL_INSTANCE(INSTANCE) (((INSTANCE) == SPI1) || \
((INSTANCE) == SPI2))
/****************************** START TIM Instances ***************************/ /****************************** START TIM Instances ***************************/
/****************************** TIM Instances *********************************/ /****************************** TIM Instances *********************************/
#define IS_TIM_INSTANCE(INSTANCE)\ #define IS_TIM_INSTANCE(INSTANCE)\
(((INSTANCE) == TIM1) || \ (((INSTANCE) == TIM1) || \
((INSTANCE) == TIM2) || \ ((INSTANCE) == TIM2) || \
((INSTANCE) == TIM3)) ((INSTANCE) == TIM3) || \
((INSTANCE) == TIM4))
#define IS_TIM_ADVANCED_INSTANCE(INSTANCE) ((INSTANCE) == TIM1) #define IS_TIM_ADVANCED_INSTANCE(INSTANCE) ((INSTANCE) == TIM1)
#define IS_TIM_CC1_INSTANCE(INSTANCE)\ #define IS_TIM_CC1_INSTANCE(INSTANCE)\
(((INSTANCE) == TIM1) || \ (((INSTANCE) == TIM1) || \
((INSTANCE) == TIM2) || \ ((INSTANCE) == TIM2) || \
((INSTANCE) == TIM3)) ((INSTANCE) == TIM3) || \
((INSTANCE) == TIM4))
#define IS_TIM_CC2_INSTANCE(INSTANCE)\ #define IS_TIM_CC2_INSTANCE(INSTANCE)\
(((INSTANCE) == TIM1) || \ (((INSTANCE) == TIM1) || \
((INSTANCE) == TIM2) || \ ((INSTANCE) == TIM2) || \
((INSTANCE) == TIM3)) ((INSTANCE) == TIM3) || \
((INSTANCE) == TIM4))
#define IS_TIM_CC3_INSTANCE(INSTANCE)\ #define IS_TIM_CC3_INSTANCE(INSTANCE)\
(((INSTANCE) == TIM1) || \ (((INSTANCE) == TIM1) || \
((INSTANCE) == TIM2) || \ ((INSTANCE) == TIM2) || \
((INSTANCE) == TIM3)) ((INSTANCE) == TIM3) || \
((INSTANCE) == TIM4))
#define IS_TIM_CC4_INSTANCE(INSTANCE)\ #define IS_TIM_CC4_INSTANCE(INSTANCE)\
(((INSTANCE) == TIM1) || \ (((INSTANCE) == TIM1) || \
((INSTANCE) == TIM2) || \ ((INSTANCE) == TIM2) || \
((INSTANCE) == TIM3)) ((INSTANCE) == TIM3) || \
((INSTANCE) == TIM4))
#define IS_TIM_CLOCKSOURCE_ETRMODE1_INSTANCE(INSTANCE)\ #define IS_TIM_CLOCKSOURCE_ETRMODE1_INSTANCE(INSTANCE)\
(((INSTANCE) == TIM1) || \ (((INSTANCE) == TIM1) || \
((INSTANCE) == TIM2) || \ ((INSTANCE) == TIM2) || \
((INSTANCE) == TIM3)) ((INSTANCE) == TIM3) || \
((INSTANCE) == TIM4))
#define IS_TIM_CLOCKSOURCE_ETRMODE2_INSTANCE(INSTANCE)\ #define IS_TIM_CLOCKSOURCE_ETRMODE2_INSTANCE(INSTANCE)\
(((INSTANCE) == TIM1) || \ (((INSTANCE) == TIM1) || \
((INSTANCE) == TIM2) || \ ((INSTANCE) == TIM2) || \
((INSTANCE) == TIM3)) ((INSTANCE) == TIM3) || \
((INSTANCE) == TIM4))
#define IS_TIM_CLOCKSOURCE_TIX_INSTANCE(INSTANCE)\ #define IS_TIM_CLOCKSOURCE_TIX_INSTANCE(INSTANCE)\
(((INSTANCE) == TIM1) || \ (((INSTANCE) == TIM1) || \
((INSTANCE) == TIM2) || \ ((INSTANCE) == TIM2) || \
((INSTANCE) == TIM3)) ((INSTANCE) == TIM3) || \
((INSTANCE) == TIM4))
#define IS_TIM_CLOCKSOURCE_ITRX_INSTANCE(INSTANCE)\ #define IS_TIM_CLOCKSOURCE_ITRX_INSTANCE(INSTANCE)\
(((INSTANCE) == TIM1) || \ (((INSTANCE) == TIM1) || \
((INSTANCE) == TIM2) || \ ((INSTANCE) == TIM2) || \
((INSTANCE) == TIM3)) ((INSTANCE) == TIM3) || \
((INSTANCE) == TIM4))
#define IS_TIM_OCXREF_CLEAR_INSTANCE(INSTANCE)\ #define IS_TIM_OCXREF_CLEAR_INSTANCE(INSTANCE)\
(((INSTANCE) == TIM1) || \ (((INSTANCE) == TIM1) || \
((INSTANCE) == TIM2) || \ ((INSTANCE) == TIM2) || \
((INSTANCE) == TIM3)) ((INSTANCE) == TIM3) || \
((INSTANCE) == TIM4))
#define IS_TIM_ENCODER_INTERFACE_INSTANCE(INSTANCE)\ #define IS_TIM_ENCODER_INTERFACE_INSTANCE(INSTANCE)\
(((INSTANCE) == TIM1) || \ (((INSTANCE) == TIM1) || \
((INSTANCE) == TIM2) || \ ((INSTANCE) == TIM2) || \
((INSTANCE) == TIM3)) ((INSTANCE) == TIM3) || \
((INSTANCE) == TIM4))
#define IS_TIM_XOR_INSTANCE(INSTANCE)\ #define IS_TIM_XOR_INSTANCE(INSTANCE)\
(((INSTANCE) == TIM1) || \ (((INSTANCE) == TIM1) || \
((INSTANCE) == TIM2) || \ ((INSTANCE) == TIM2) || \
((INSTANCE) == TIM3)) ((INSTANCE) == TIM3) || \
((INSTANCE) == TIM4))
#define IS_TIM_MASTER_INSTANCE(INSTANCE)\ #define IS_TIM_MASTER_INSTANCE(INSTANCE)\
(((INSTANCE) == TIM1) || \ (((INSTANCE) == TIM1) || \
((INSTANCE) == TIM2) || \ ((INSTANCE) == TIM2) || \
((INSTANCE) == TIM3)) ((INSTANCE) == TIM3) || \
((INSTANCE) == TIM4))
#define IS_TIM_SLAVE_INSTANCE(INSTANCE)\ #define IS_TIM_SLAVE_INSTANCE(INSTANCE)\
(((INSTANCE) == TIM1) || \ (((INSTANCE) == TIM1) || \
((INSTANCE) == TIM2) || \ ((INSTANCE) == TIM2) || \
((INSTANCE) == TIM3)) ((INSTANCE) == TIM3) || \
((INSTANCE) == TIM4))
#define IS_TIM_DMABURST_INSTANCE(INSTANCE)\ #define IS_TIM_DMABURST_INSTANCE(INSTANCE)\
(((INSTANCE) == TIM1) || \ (((INSTANCE) == TIM1) || \
((INSTANCE) == TIM2) || \ ((INSTANCE) == TIM2) || \
((INSTANCE) == TIM3)) ((INSTANCE) == TIM3) || \
((INSTANCE) == TIM4))
#define IS_TIM_BREAK_INSTANCE(INSTANCE)\ #define IS_TIM_BREAK_INSTANCE(INSTANCE)\
((INSTANCE) == TIM1) ((INSTANCE) == TIM1)
@ -9939,6 +10049,12 @@ typedef struct
((CHANNEL) == TIM_CHANNEL_4))) \ ((CHANNEL) == TIM_CHANNEL_4))) \
|| \ || \
(((INSTANCE) == TIM3) && \ (((INSTANCE) == TIM3) && \
(((CHANNEL) == TIM_CHANNEL_1) || \
((CHANNEL) == TIM_CHANNEL_2) || \
((CHANNEL) == TIM_CHANNEL_3) || \
((CHANNEL) == TIM_CHANNEL_4))) \
|| \
(((INSTANCE) == TIM4) && \
(((CHANNEL) == TIM_CHANNEL_1) || \ (((CHANNEL) == TIM_CHANNEL_1) || \
((CHANNEL) == TIM_CHANNEL_2) || \ ((CHANNEL) == TIM_CHANNEL_2) || \
((CHANNEL) == TIM_CHANNEL_3) || \ ((CHANNEL) == TIM_CHANNEL_3) || \
@ -9953,7 +10069,8 @@ typedef struct
#define IS_TIM_COUNTER_MODE_SELECT_INSTANCE(INSTANCE)\ #define IS_TIM_COUNTER_MODE_SELECT_INSTANCE(INSTANCE)\
(((INSTANCE) == TIM1) || \ (((INSTANCE) == TIM1) || \
((INSTANCE) == TIM2) || \ ((INSTANCE) == TIM2) || \
((INSTANCE) == TIM3)) ((INSTANCE) == TIM3) || \
((INSTANCE) == TIM4))
#define IS_TIM_REPETITION_COUNTER_INSTANCE(INSTANCE)\ #define IS_TIM_REPETITION_COUNTER_INSTANCE(INSTANCE)\
((INSTANCE) == TIM1) ((INSTANCE) == TIM1)
@ -9961,28 +10078,33 @@ typedef struct
#define IS_TIM_CLOCK_DIVISION_INSTANCE(INSTANCE)\ #define IS_TIM_CLOCK_DIVISION_INSTANCE(INSTANCE)\
(((INSTANCE) == TIM1) || \ (((INSTANCE) == TIM1) || \
((INSTANCE) == TIM2) || \ ((INSTANCE) == TIM2) || \
((INSTANCE) == TIM3)) ((INSTANCE) == TIM3) || \
((INSTANCE) == TIM4))
#define IS_TIM_DMA_INSTANCE(INSTANCE)\ #define IS_TIM_DMA_INSTANCE(INSTANCE)\
(((INSTANCE) == TIM1) || \ (((INSTANCE) == TIM1) || \
((INSTANCE) == TIM2) || \ ((INSTANCE) == TIM2) || \
((INSTANCE) == TIM3)) ((INSTANCE) == TIM3) || \
((INSTANCE) == TIM4))
#define IS_TIM_DMA_CC_INSTANCE(INSTANCE)\ #define IS_TIM_DMA_CC_INSTANCE(INSTANCE)\
(((INSTANCE) == TIM1) || \ (((INSTANCE) == TIM1) || \
((INSTANCE) == TIM2) || \ ((INSTANCE) == TIM2) || \
((INSTANCE) == TIM3)) ((INSTANCE) == TIM3) || \
((INSTANCE) == TIM4))
#define IS_TIM_COMMUTATION_EVENT_INSTANCE(INSTANCE)\ #define IS_TIM_COMMUTATION_EVENT_INSTANCE(INSTANCE)\
((INSTANCE) == TIM1) ((INSTANCE) == TIM1)
#define IS_TIM_ETR_INSTANCE(INSTANCE) (((INSTANCE) == TIM1) || \ #define IS_TIM_ETR_INSTANCE(INSTANCE) (((INSTANCE) == TIM1) || \
((INSTANCE) == TIM2) || \ ((INSTANCE) == TIM2) || \
((INSTANCE) == TIM3)) ((INSTANCE) == TIM3) || \
((INSTANCE) == TIM4))
#define IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(INSTANCE) (((INSTANCE) == TIM1) || \ #define IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(INSTANCE) (((INSTANCE) == TIM1) || \
((INSTANCE) == TIM2) || \ ((INSTANCE) == TIM2) || \
((INSTANCE) == TIM3)) ((INSTANCE) == TIM3) || \
((INSTANCE) == TIM4))
#define IS_TIM_32B_COUNTER_INSTANCE(INSTANCE) 0U #define IS_TIM_32B_COUNTER_INSTANCE(INSTANCE) 0U
@ -9991,39 +10113,48 @@ typedef struct
/******************** USART Instances : Synchronous mode **********************/ /******************** USART Instances : Synchronous mode **********************/
#define IS_USART_INSTANCE(INSTANCE) (((INSTANCE) == USART1) || \ #define IS_USART_INSTANCE(INSTANCE) (((INSTANCE) == USART1) || \
((INSTANCE) == USART2)) ((INSTANCE) == USART2) || \
((INSTANCE) == USART3))
/******************** UART Instances : Asynchronous mode **********************/ /******************** UART Instances : Asynchronous mode **********************/
#define IS_UART_INSTANCE(INSTANCE) (((INSTANCE) == USART1) || \ #define IS_UART_INSTANCE(INSTANCE) (((INSTANCE) == USART1) || \
((INSTANCE) == USART2) ) ((INSTANCE) == USART2) || \
((INSTANCE) == USART3))
/******************** UART Instances : Half-Duplex mode **********************/ /******************** UART Instances : Half-Duplex mode **********************/
#define IS_UART_HALFDUPLEX_INSTANCE(INSTANCE) (((INSTANCE) == USART1) || \ #define IS_UART_HALFDUPLEX_INSTANCE(INSTANCE) (((INSTANCE) == USART1) || \
((INSTANCE) == USART2) ) ((INSTANCE) == USART2) || \
((INSTANCE) == USART3))
/******************** UART Instances : LIN mode **********************/ /******************** UART Instances : LIN mode **********************/
#define IS_UART_LIN_INSTANCE(INSTANCE) (((INSTANCE) == USART1) || \ #define IS_UART_LIN_INSTANCE(INSTANCE) (((INSTANCE) == USART1) || \
((INSTANCE) == USART2) ) ((INSTANCE) == USART2) || \
((INSTANCE) == USART3))
/****************** UART Instances : Hardware Flow control ********************/ /****************** UART Instances : Hardware Flow control ********************/
#define IS_UART_HWFLOW_INSTANCE(INSTANCE) (((INSTANCE) == USART1) || \ #define IS_UART_HWFLOW_INSTANCE(INSTANCE) (((INSTANCE) == USART1) || \
((INSTANCE) == USART2) ) ((INSTANCE) == USART2) || \
((INSTANCE) == USART3))
/********************* UART Instances : Smard card mode ***********************/ /********************* UART Instances : Smard card mode ***********************/
#define IS_SMARTCARD_INSTANCE(INSTANCE) (((INSTANCE) == USART1) || \ #define IS_SMARTCARD_INSTANCE(INSTANCE) (((INSTANCE) == USART1) || \
((INSTANCE) == USART2) ) ((INSTANCE) == USART2) || \
((INSTANCE) == USART3))
/*********************** UART Instances : IRDA mode ***************************/ /*********************** UART Instances : IRDA mode ***************************/
#define IS_IRDA_INSTANCE(INSTANCE) (((INSTANCE) == USART1) || \ #define IS_IRDA_INSTANCE(INSTANCE) (((INSTANCE) == USART1) || \
((INSTANCE) == USART2) ) ((INSTANCE) == USART2) || \
((INSTANCE) == USART3))
/***************** UART Instances : Multi-Processor mode **********************/ /***************** UART Instances : Multi-Processor mode **********************/
#define IS_UART_MULTIPROCESSOR_INSTANCE(INSTANCE) (((INSTANCE) == USART1) || \ #define IS_UART_MULTIPROCESSOR_INSTANCE(INSTANCE) (((INSTANCE) == USART1) || \
((INSTANCE) == USART2) ) ((INSTANCE) == USART2) || \
((INSTANCE) == USART3))
/***************** UART Instances : DMA mode available **********************/ /***************** UART Instances : DMA mode available **********************/
#define IS_UART_DMA_INSTANCE(INSTANCE) (((INSTANCE) == USART1) || \ #define IS_UART_DMA_INSTANCE(INSTANCE) (((INSTANCE) == USART1) || \
((INSTANCE) == USART2)) ((INSTANCE) == USART2) || \
((INSTANCE) == USART3))
/****************************** RTC Instances *********************************/ /****************************** RTC Instances *********************************/
#define IS_RTC_ALL_INSTANCE(INSTANCE) ((INSTANCE) == RTC) #define IS_RTC_ALL_INSTANCE(INSTANCE) ((INSTANCE) == RTC)
@ -10054,40 +10185,40 @@ typedef struct
/* Aliases for __IRQn */ /* Aliases for __IRQn */
#define ADC1_IRQn ADC1_2_IRQn #define ADC1_IRQn ADC1_2_IRQn
#define TIM9_IRQn TIM1_BRK_IRQn
#define TIM1_BRK_TIM9_IRQn TIM1_BRK_IRQn #define TIM1_BRK_TIM9_IRQn TIM1_BRK_IRQn
#define TIM1_BRK_TIM15_IRQn TIM1_BRK_IRQn #define TIM1_BRK_TIM15_IRQn TIM1_BRK_IRQn
#define TIM9_IRQn TIM1_BRK_IRQn
#define TIM1_TRG_COM_TIM11_IRQn TIM1_TRG_COM_IRQn
#define TIM1_TRG_COM_TIM17_IRQn TIM1_TRG_COM_IRQn #define TIM1_TRG_COM_TIM17_IRQn TIM1_TRG_COM_IRQn
#define TIM1_TRG_COM_TIM11_IRQn TIM1_TRG_COM_IRQn
#define TIM11_IRQn TIM1_TRG_COM_IRQn #define TIM11_IRQn TIM1_TRG_COM_IRQn
#define TIM1_UP_TIM10_IRQn TIM1_UP_IRQn
#define TIM10_IRQn TIM1_UP_IRQn #define TIM10_IRQn TIM1_UP_IRQn
#define TIM1_UP_TIM10_IRQn TIM1_UP_IRQn
#define TIM1_UP_TIM16_IRQn TIM1_UP_IRQn #define TIM1_UP_TIM16_IRQn TIM1_UP_IRQn
#define CEC_IRQn USBWakeUp_IRQn
#define OTG_FS_WKUP_IRQn USBWakeUp_IRQn #define OTG_FS_WKUP_IRQn USBWakeUp_IRQn
#define CEC_IRQn USBWakeUp_IRQn
#define USB_HP_IRQn USB_HP_CAN1_TX_IRQn #define USB_HP_IRQn USB_HP_CAN1_TX_IRQn
#define CAN1_TX_IRQn USB_HP_CAN1_TX_IRQn #define CAN1_TX_IRQn USB_HP_CAN1_TX_IRQn
#define USB_LP_IRQn USB_LP_CAN1_RX0_IRQn
#define CAN1_RX0_IRQn USB_LP_CAN1_RX0_IRQn #define CAN1_RX0_IRQn USB_LP_CAN1_RX0_IRQn
#define USB_LP_IRQn USB_LP_CAN1_RX0_IRQn
/* Aliases for __IRQHandler */ /* Aliases for __IRQHandler */
#define ADC1_IRQHandler ADC1_2_IRQHandler #define ADC1_IRQHandler ADC1_2_IRQHandler
#define TIM9_IRQHandler TIM1_BRK_IRQHandler
#define TIM1_BRK_TIM9_IRQHandler TIM1_BRK_IRQHandler #define TIM1_BRK_TIM9_IRQHandler TIM1_BRK_IRQHandler
#define TIM1_BRK_TIM15_IRQHandler TIM1_BRK_IRQHandler #define TIM1_BRK_TIM15_IRQHandler TIM1_BRK_IRQHandler
#define TIM9_IRQHandler TIM1_BRK_IRQHandler
#define TIM1_TRG_COM_TIM11_IRQHandler TIM1_TRG_COM_IRQHandler
#define TIM1_TRG_COM_TIM17_IRQHandler TIM1_TRG_COM_IRQHandler #define TIM1_TRG_COM_TIM17_IRQHandler TIM1_TRG_COM_IRQHandler
#define TIM1_TRG_COM_TIM11_IRQHandler TIM1_TRG_COM_IRQHandler
#define TIM11_IRQHandler TIM1_TRG_COM_IRQHandler #define TIM11_IRQHandler TIM1_TRG_COM_IRQHandler
#define TIM1_UP_TIM10_IRQHandler TIM1_UP_IRQHandler
#define TIM10_IRQHandler TIM1_UP_IRQHandler #define TIM10_IRQHandler TIM1_UP_IRQHandler
#define TIM1_UP_TIM10_IRQHandler TIM1_UP_IRQHandler
#define TIM1_UP_TIM16_IRQHandler TIM1_UP_IRQHandler #define TIM1_UP_TIM16_IRQHandler TIM1_UP_IRQHandler
#define CEC_IRQHandler USBWakeUp_IRQHandler
#define OTG_FS_WKUP_IRQHandler USBWakeUp_IRQHandler #define OTG_FS_WKUP_IRQHandler USBWakeUp_IRQHandler
#define CEC_IRQHandler USBWakeUp_IRQHandler
#define USB_HP_IRQHandler USB_HP_CAN1_TX_IRQHandler #define USB_HP_IRQHandler USB_HP_CAN1_TX_IRQHandler
#define CAN1_TX_IRQHandler USB_HP_CAN1_TX_IRQHandler #define CAN1_TX_IRQHandler USB_HP_CAN1_TX_IRQHandler
#define USB_LP_IRQHandler USB_LP_CAN1_RX0_IRQHandler
#define CAN1_RX0_IRQHandler USB_LP_CAN1_RX0_IRQHandler #define CAN1_RX0_IRQHandler USB_LP_CAN1_RX0_IRQHandler
#define USB_LP_IRQHandler USB_LP_CAN1_RX0_IRQHandler
/** /**
@ -10103,7 +10234,7 @@ typedef struct
} }
#endif /* __cplusplus */ #endif /* __cplusplus */
#endif /* __STM32F103x6_H */ #endif /* __STM32F103xB_H */

7
john103C6T6/EEPROM_Emul/lib/EEPROM_Emul.h
View File

@ -28,6 +28,13 @@ typedef struct {
} EEPROM_Item; } EEPROM_Item;
#pragma pack(pop) #pragma pack(pop)
typedef struct {
uint8_t data[EEPROM_SIZE]; // Массив для хранения данных
uint16_t head; // Указатель на место записи
uint16_t tail; // Указатель на место чтения
} RingBuffer_t;
// Инициализация EEPROM // Инициализация EEPROM
EEPROM_Status EEPROM_Init(void); EEPROM_Status EEPROM_Init(void);

31
john103C6T6/EEPROM_Emul/lib/flash_ring.h Normal file
View File

@ -0,0 +1,31 @@
#ifndef FLASH_RING_H
#define FLASH_RING_H
#include "stm32f1xx_hal.h"
//#define FLASH_PAGE_SIZE 1024
#define NUM_OF_PAGE_EEPROM 2
#define FLASH_START_ADDR 0x08000000
#define FLASH_SIZE (64 * 1024) // для STM32F103C8
#define LAST_PAGE_ADDR (FLASH_START_ADDR + FLASH_SIZE - NUM_OF_PAGE_EEPROM*FLASH_PAGE_SIZE)
#define RECORD_SIZE 255
#define RECORDS_PER_PAGE NUM_OF_PAGE_EEPROM*(FLASH_PAGE_SIZE / RECORD_SIZE) // 10 записей
#pragma pack(push, 1)
typedef struct {
uint32_t timestamp;
uint8_t data[RECORD_SIZE-4]; // 200 - 4 байта timestamp
} FlashRecord_t;
#pragma pack(pop)
typedef struct {
uint32_t write_index; // индекс следующей записи (0-9)
uint8_t initialized; // флаг инициализации
} BufferState_t;
BufferState_t buffer_init(void);
HAL_StatusTypeDef buffer_write_record(FlashRecord_t* record, BufferState_t* state);
HAL_StatusTypeDef erase_flash_page(void) ;
HAL_StatusTypeDef write_flash_record(uint32_t address, FlashRecord_t* record);
FlashRecord_t* buffer_read_record(uint32_t index);
void buffer_get_all_records(FlashRecord_t* records[], uint32_t* count);
#endif // FLASH_RING_H

121
john103C6T6/EEPROM_Emul/src/EEPROM_Emul.c
View File

@ -14,8 +14,10 @@ static uint8_t EEPROM_IsPageErased(uint32_t address);
static uint32_t EEPROM_CalculateCRC(EEPROM_Item* item); static uint32_t EEPROM_CalculateCRC(EEPROM_Item* item);
// Инициализация EEPROM // Инициализация EEPROM
EEPROM_Status EEPROM_Init(void) { EEPROM_Status EEPROM_Init(void)
if (eeprom_initialized) { {
if (eeprom_initialized)
{
return EEPROM_OK; return EEPROM_OK;
} }
@ -23,9 +25,12 @@ EEPROM_Status EEPROM_Init(void) {
eeprom_current_write_address = EEPROM_FindNextWriteAddress(); eeprom_current_write_address = EEPROM_FindNextWriteAddress();
// Если вся память заполнена, выполняем сборку мусора (форматирование) // Если вся память заполнена, выполняем сборку мусора (форматирование)
if (eeprom_current_write_address >= EEPROM_START_ADDRESS + EEPROM_SIZE) { if (eeprom_current_write_address >= EEPROM_START_ADDRESS + EEPROM_SIZE)
{
EEPROM_Format(); EEPROM_Format();
} else { }
else
{
eeprom_initialized = 1; eeprom_initialized = 1;
} }
@ -33,12 +38,15 @@ EEPROM_Status EEPROM_Init(void) {
} }
// Чтение данных по виртуальному адресу // Чтение данных по виртуальному адресу
EEPROM_Status EEPROM_Read(uint16_t virt_address, uint16_t* data) { EEPROM_Status EEPROM_Read(uint16_t virt_address, uint16_t* data)
if (!eeprom_initialized) { {
if (!eeprom_initialized)
{
return EEPROM_ERROR; return EEPROM_ERROR;
} }
if (virt_address >= EEPROM_MAX_VARIABLES || data == NULL) { if (virt_address >= EEPROM_MAX_VARIABLES || data == NULL)
{
return EEPROM_INVALID; return EEPROM_INVALID;
} }
@ -46,14 +54,17 @@ EEPROM_Status EEPROM_Read(uint16_t virt_address, uint16_t* data) {
} }
// Запись данных по виртуальному адресу // Запись данных по виртуальному адресу
EEPROM_Status EEPROM_Write(uint16_t virt_address, uint16_t data) { EEPROM_Status EEPROM_Write(uint16_t virt_address, uint16_t data)
{
EEPROM_Item item; EEPROM_Item item;
if (!eeprom_initialized) { if (!eeprom_initialized)
{
return EEPROM_ERROR; return EEPROM_ERROR;
} }
if (virt_address >= EEPROM_MAX_VARIABLES) { if (virt_address >= EEPROM_MAX_VARIABLES)
{
return EEPROM_INVALID; return EEPROM_INVALID;
} }
@ -67,7 +78,8 @@ EEPROM_Status EEPROM_Write(uint16_t virt_address, uint16_t data) {
} }
// Поиск последних данных для виртуального адреса // Поиск последних данных для виртуального адреса
static EEPROM_Status EEPROM_FindLatestData(uint16_t virt_address, uint16_t* data) { static EEPROM_Status EEPROM_FindLatestData(uint16_t virt_address, uint16_t* data)
{
uint32_t address = EEPROM_START_ADDRESS; uint32_t address = EEPROM_START_ADDRESS;
EEPROM_Item current_item; EEPROM_Item current_item;
uint32_t latest_timestamp = 0; uint32_t latest_timestamp = 0;
@ -75,13 +87,16 @@ static EEPROM_Status EEPROM_FindLatestData(uint16_t virt_address, uint16_t* data
uint8_t data_found = 0; uint8_t data_found = 0;
// Сканируем всю область EEPROM // Сканируем всю область EEPROM
while (address < EEPROM_START_ADDRESS + EEPROM_SIZE) { while (address < EEPROM_START_ADDRESS + EEPROM_SIZE)
{
// Читаем элемент // Читаем элемент
memcpy(&current_item, (void*)address, sizeof(EEPROM_Item)); memcpy(&current_item, (void*)address, sizeof(EEPROM_Item));
// Проверяем, является ли это валидными данными // Проверяем, является ли это валидными данными
if (current_item.address == virt_address) { if (current_item.address == virt_address)
if (current_item.timestamp >= latest_timestamp) { {
if (current_item.timestamp >= latest_timestamp)
{
latest_timestamp = current_item.timestamp; latest_timestamp = current_item.timestamp;
latest_data = current_item.data; latest_data = current_item.data;
data_found = 1; data_found = 1;
@ -91,12 +106,14 @@ static EEPROM_Status EEPROM_FindLatestData(uint16_t virt_address, uint16_t* data
address += sizeof(EEPROM_Item); address += sizeof(EEPROM_Item);
// Проверяем конец страницы // Проверяем конец страницы
if ((address - EEPROM_START_ADDRESS) % EEPROM_PAGE_SIZE == 0) { if ((address - EEPROM_START_ADDRESS) % EEPROM_PAGE_SIZE == 0)
{
address += (EEPROM_PAGE_SIZE - (sizeof(EEPROM_Item) * 2)); address += (EEPROM_PAGE_SIZE - (sizeof(EEPROM_Item) * 2));
} }
} }
if (data_found) { if (data_found)
{
*data = latest_data; *data = latest_data;
return EEPROM_OK; return EEPROM_OK;
} }
@ -105,13 +122,17 @@ static EEPROM_Status EEPROM_FindLatestData(uint16_t virt_address, uint16_t* data
} }
// Запись элемента в EEPROM // Запись элемента в EEPROM
static EEPROM_Status EEPROM_WriteItem(EEPROM_Item* item) { static EEPROM_Status EEPROM_WriteItem(EEPROM_Item* item)
{
HAL_StatusTypeDef hal_status; HAL_StatusTypeDef hal_status;
// Проверяем, нужно ли стирать страницу // Проверяем, нужно ли стирать страницу
if ((eeprom_current_write_address - EEPROM_START_ADDRESS) % EEPROM_PAGE_SIZE == 0) { if ((eeprom_current_write_address - EEPROM_START_ADDRESS) % EEPROM_PAGE_SIZE == 0)
if (!EEPROM_IsPageErased(eeprom_current_write_address)) { {
if (EEPROM_ErasePage(eeprom_current_write_address) != EEPROM_OK) { if (!EEPROM_IsPageErased(eeprom_current_write_address))
{
if (EEPROM_ErasePage(eeprom_current_write_address) != EEPROM_OK)
{
return EEPROM_ERROR; return EEPROM_ERROR;
} }
} }
@ -123,12 +144,14 @@ static EEPROM_Status EEPROM_WriteItem(EEPROM_Item* item) {
// Записываем данные по словам (32 бита) // Записываем данные по словам (32 бита)
uint32_t* data_ptr = (uint32_t*)item; uint32_t* data_ptr = (uint32_t*)item;
for (uint8_t i = 0; i < sizeof(EEPROM_Item) / 4; i++) { for (uint8_t i = 0; i < sizeof(EEPROM_Item) / 4; i++)
{
hal_status = HAL_FLASH_Program(FLASH_TYPEPROGRAM_WORD, hal_status = HAL_FLASH_Program(FLASH_TYPEPROGRAM_WORD,
eeprom_current_write_address + (i * 4), eeprom_current_write_address + (i * 4),
data_ptr[i]); data_ptr[i]);
if (hal_status != HAL_OK) { if (hal_status != HAL_OK)
{
HAL_FLASH_Lock(); HAL_FLASH_Lock();
return EEPROM_ERROR; return EEPROM_ERROR;
} }
@ -141,7 +164,8 @@ static EEPROM_Status EEPROM_WriteItem(EEPROM_Item* item) {
eeprom_current_write_address += sizeof(EEPROM_Item); eeprom_current_write_address += sizeof(EEPROM_Item);
// Проверяем переполнение // Проверяем переполнение
if (eeprom_current_write_address >= EEPROM_START_ADDRESS + EEPROM_SIZE) { if (eeprom_current_write_address >= EEPROM_START_ADDRESS + EEPROM_SIZE)
{
// Выполняем сборку мусора (в данном случае - форматирование) // Выполняем сборку мусора (в данном случае - форматирование)
EEPROM_Format(); EEPROM_Format();
} }
@ -150,7 +174,8 @@ static EEPROM_Status EEPROM_WriteItem(EEPROM_Item* item) {
} }
// Стирание страницы Flash // Стирание страницы Flash
static EEPROM_Status EEPROM_ErasePage(uint32_t address) { static EEPROM_Status EEPROM_ErasePage(uint32_t address)
{
FLASH_EraseInitTypeDef erase; FLASH_EraseInitTypeDef erase;
uint32_t page_error; uint32_t page_error;
@ -163,7 +188,8 @@ static EEPROM_Status EEPROM_ErasePage(uint32_t address) {
erase.PageAddress = address; erase.PageAddress = address;
erase.NbPages = 1; erase.NbPages = 1;
if (HAL_FLASHEx_Erase(&erase, &page_error) != HAL_OK) { if (HAL_FLASHEx_Erase(&erase, &page_error) != HAL_OK)
{
HAL_FLASH_Lock(); HAL_FLASH_Lock();
return EEPROM_ERROR; return EEPROM_ERROR;
} }
@ -173,23 +199,27 @@ static EEPROM_Status EEPROM_ErasePage(uint32_t address) {
} }
// Поиск следующего адреса для записи // Поиск следующего адреса для записи
static uint32_t EEPROM_FindNextWriteAddress(void) { static uint32_t EEPROM_FindNextWriteAddress(void)
{
uint32_t address = EEPROM_START_ADDRESS; uint32_t address = EEPROM_START_ADDRESS;
EEPROM_Item item; EEPROM_Item item;
// Ищем первую свободную позицию // Ищем первую свободную позицию
while (address < EEPROM_START_ADDRESS + EEPROM_SIZE) { while (address < EEPROM_START_ADDRESS + EEPROM_SIZE)
{
memcpy(&item, (void*)address, sizeof(EEPROM_Item)); memcpy(&item, (void*)address, sizeof(EEPROM_Item));
// Если нашли пустой элемент (все FFFF), это свободная позиция // Если нашли пустой элемент (все FFFF), это свободная позиция
if (item.address == 0xFFFF && item.data == 0xFFFF && item.timestamp == 0xFFFFFFFF) { if (item.address == 0xFFFF && item.data == 0xFFFF && item.timestamp == 0xFFFFFFFF)
{
break; break;
} }
address += sizeof(EEPROM_Item); address += sizeof(EEPROM_Item);
// Проверяем границу страницы // Проверяем границу страницы
if ((address - EEPROM_START_ADDRESS) % EEPROM_PAGE_SIZE == 0) { if ((address - EEPROM_START_ADDRESS) % EEPROM_PAGE_SIZE == 0)
{
address += (EEPROM_PAGE_SIZE - (sizeof(EEPROM_Item) * 2)); address += (EEPROM_PAGE_SIZE - (sizeof(EEPROM_Item) * 2));
} }
} }
@ -198,12 +228,15 @@ static uint32_t EEPROM_FindNextWriteAddress(void) {
} }
// Проверка, стерта ли страница // Проверка, стерта ли страница
static uint8_t EEPROM_IsPageErased(uint32_t address) { static uint8_t EEPROM_IsPageErased(uint32_t address)
{
uint32_t* check_addr = (uint32_t*)address; uint32_t* check_addr = (uint32_t*)address;
// Проверяем первые несколько слов // Проверяем первые несколько слов
for (uint8_t i = 0; i < 8; i++) { for (uint8_t i = 0; i < 8; i++)
if (check_addr[i] != 0xFFFFFFFF) { {
if (check_addr[i] != 0xFFFFFFFF)
{
return 0; return 0;
} }
} }
@ -212,12 +245,15 @@ static uint8_t EEPROM_IsPageErased(uint32_t address) {
} }
// Полное форматирование EEPROM // Полное форматирование EEPROM
EEPROM_Status EEPROM_Format(void) { EEPROM_Status EEPROM_Format(void)
{
uint32_t address = EEPROM_START_ADDRESS; uint32_t address = EEPROM_START_ADDRESS;
// Стираем все страницы, используемые для EEPROM // Стираем все страницы, используемые для EEPROM
while (address < EEPROM_START_ADDRESS + EEPROM_SIZE) { while (address < EEPROM_START_ADDRESS + EEPROM_SIZE)
if (EEPROM_ErasePage(address) != EEPROM_OK) { {
if (EEPROM_ErasePage(address) != EEPROM_OK)
{
return EEPROM_ERROR; return EEPROM_ERROR;
} }
address += EEPROM_PAGE_SIZE; address += EEPROM_PAGE_SIZE;
@ -230,17 +266,21 @@ EEPROM_Status EEPROM_Format(void) {
} }
// Получение информации об использовании EEPROM // Получение информации об использовании EEPROM
void EEPROM_GetInfo(uint32_t* used, uint32_t* total) { void EEPROM_GetInfo(uint32_t* used, uint32_t* total)
{
uint32_t address = EEPROM_START_ADDRESS; uint32_t address = EEPROM_START_ADDRESS;
uint32_t used_bytes = 0; uint32_t used_bytes = 0;
if (used) { if (used)
{
// Подсчитываем использованные байты // Подсчитываем использованные байты
while (address < EEPROM_START_ADDRESS + EEPROM_SIZE) { while (address < EEPROM_START_ADDRESS + EEPROM_SIZE)
{
EEPROM_Item item; EEPROM_Item item;
memcpy(&item, (void*)address, sizeof(EEPROM_Item)); memcpy(&item, (void*)address, sizeof(EEPROM_Item));
if (item.address != 0xFFFF || item.data != 0xFFFF || item.timestamp != 0xFFFFFFFF) { if (item.address != 0xFFFF || item.data != 0xFFFF || item.timestamp != 0xFFFFFFFF)
{
used_bytes += sizeof(EEPROM_Item); used_bytes += sizeof(EEPROM_Item);
} }
@ -250,7 +290,8 @@ void EEPROM_GetInfo(uint32_t* used, uint32_t* total) {
*used = used_bytes; *used = used_bytes;
} }
if (total) { if (total)
{
*total = EEPROM_SIZE; *total = EEPROM_SIZE;
} }
} }

256
john103C6T6/EEPROM_Emul/src/EEPROM_Emul.c.orig Normal file
View File

@ -0,0 +1,256 @@
#include "eeprom_emul.h"
#include <string.h>
// Внутренние переменные
static uint32_t eeprom_current_write_address = EEPROM_START_ADDRESS;
static uint8_t eeprom_initialized = 0;
// Прототипы внутренних функций
static EEPROM_Status EEPROM_FindLatestData(uint16_t virt_address, uint16_t* data);
static EEPROM_Status EEPROM_WriteItem(EEPROM_Item* item);
static EEPROM_Status EEPROM_ErasePage(uint32_t address);
static uint32_t EEPROM_FindNextWriteAddress(void);
static uint8_t EEPROM_IsPageErased(uint32_t address);
static uint32_t EEPROM_CalculateCRC(EEPROM_Item* item);
// Инициализация EEPROM
EEPROM_Status EEPROM_Init(void) {
if (eeprom_initialized) {
return EEPROM_OK;
}
// Находим следующий адрес для записи
eeprom_current_write_address = EEPROM_FindNextWriteAddress();
// Если вся память заполнена, выполняем сборку мусора (форматирование)
if (eeprom_current_write_address >= EEPROM_START_ADDRESS + EEPROM_SIZE) {
EEPROM_Format();
} else {
eeprom_initialized = 1;
}
return EEPROM_OK;
}
// Чтение данных по виртуальному адресу
EEPROM_Status EEPROM_Read(uint16_t virt_address, uint16_t* data) {
if (!eeprom_initialized) {
return EEPROM_ERROR;
}
if (virt_address >= EEPROM_MAX_VARIABLES || data == NULL) {
return EEPROM_INVALID;
}
return EEPROM_FindLatestData(virt_address, data);
}
// Запись данных по виртуальному адресу
EEPROM_Status EEPROM_Write(uint16_t virt_address, uint16_t data) {
EEPROM_Item item;
if (!eeprom_initialized) {
return EEPROM_ERROR;
}
if (virt_address >= EEPROM_MAX_VARIABLES) {
return EEPROM_INVALID;
}
// Подготавливаем элемент данных
item.address = virt_address;
item.data = data;
item.timestamp = HAL_GetTick(); // Используем системный таймер
// Записываем элемент
return EEPROM_WriteItem(&item);
}
// Поиск последних данных для виртуального адреса
static EEPROM_Status EEPROM_FindLatestData(uint16_t virt_address, uint16_t* data) {
uint32_t address = EEPROM_START_ADDRESS;
EEPROM_Item current_item;
uint32_t latest_timestamp = 0;
uint16_t latest_data = 0;
uint8_t data_found = 0;
// Сканируем всю область EEPROM
while (address < EEPROM_START_ADDRESS + EEPROM_SIZE) {
// Читаем элемент
memcpy(&current_item, (void*)address, sizeof(EEPROM_Item));
// Проверяем, является ли это валидными данными
if (current_item.address == virt_address) {
if (current_item.timestamp >= latest_timestamp) {
latest_timestamp = current_item.timestamp;
latest_data = current_item.data;
data_found = 1;
}
}
address += sizeof(EEPROM_Item);
// Проверяем конец страницы
if ((address - EEPROM_START_ADDRESS) % EEPROM_PAGE_SIZE == 0) {
address += (EEPROM_PAGE_SIZE - (sizeof(EEPROM_Item) * 2));
}
}
if (data_found) {
*data = latest_data;
return EEPROM_OK;
}
return EEPROM_INVALID;
}
// Запись элемента в EEPROM
static EEPROM_Status EEPROM_WriteItem(EEPROM_Item* item) {
HAL_StatusTypeDef hal_status;
// Проверяем, нужно ли стирать страницу
if ((eeprom_current_write_address - EEPROM_START_ADDRESS) % EEPROM_PAGE_SIZE == 0) {
if (!EEPROM_IsPageErased(eeprom_current_write_address)) {
if (EEPROM_ErasePage(eeprom_current_write_address) != EEPROM_OK) {
return EEPROM_ERROR;
}
}
}
// Разблокируем Flash
HAL_FLASH_Unlock();
// Записываем данные по словам (32 бита)
uint32_t* data_ptr = (uint32_t*)item;
for (uint8_t i = 0; i < sizeof(EEPROM_Item) / 4; i++) {
hal_status = HAL_FLASH_Program(FLASH_TYPEPROGRAM_WORD,
eeprom_current_write_address + (i * 4),
data_ptr[i]);
if (hal_status != HAL_OK) {
HAL_FLASH_Lock();
return EEPROM_ERROR;
}
}
// Блокируем Flash
HAL_FLASH_Lock();
// Обновляем адрес для следующей записи
eeprom_current_write_address += sizeof(EEPROM_Item);
// Проверяем переполнение
if (eeprom_current_write_address >= EEPROM_START_ADDRESS + EEPROM_SIZE) {
// Выполняем сборку мусора (в данном случае - форматирование)
EEPROM_Format();
}
return EEPROM_OK;
}
// Стирание страницы Flash
static EEPROM_Status EEPROM_ErasePage(uint32_t address) {
FLASH_EraseInitTypeDef erase;
uint32_t page_error;
// Определяем номер страницы
uint32_t page = (address - FLASH_BASE) / EEPROM_PAGE_SIZE;
HAL_FLASH_Unlock();
erase.TypeErase = FLASH_TYPEERASE_PAGES;
erase.PageAddress = address;
erase.NbPages = 1;
if (HAL_FLASHEx_Erase(&erase, &page_error) != HAL_OK) {
HAL_FLASH_Lock();
return EEPROM_ERROR;
}
HAL_FLASH_Lock();
return EEPROM_OK;
}
// Поиск следующего адреса для записи
static uint32_t EEPROM_FindNextWriteAddress(void) {
uint32_t address = EEPROM_START_ADDRESS;
EEPROM_Item item;
// Ищем первую свободную позицию
while (address < EEPROM_START_ADDRESS + EEPROM_SIZE) {
memcpy(&item, (void*)address, sizeof(EEPROM_Item));
// Если нашли пустой элемент (все FFFF), это свободная позиция
if (item.address == 0xFFFF && item.data == 0xFFFF && item.timestamp == 0xFFFFFFFF) {
break;
}
address += sizeof(EEPROM_Item);
// Проверяем границу страницы
if ((address - EEPROM_START_ADDRESS) % EEPROM_PAGE_SIZE == 0) {
address += (EEPROM_PAGE_SIZE - (sizeof(EEPROM_Item) * 2));
}
}
return address;
}
// Проверка, стерта ли страница
static uint8_t EEPROM_IsPageErased(uint32_t address) {
uint32_t* check_addr = (uint32_t*)address;
// Проверяем первые несколько слов
for (uint8_t i = 0; i < 8; i++) {
if (check_addr[i] != 0xFFFFFFFF) {
return 0;
}
}
return 1;
}
// Полное форматирование EEPROM
EEPROM_Status EEPROM_Format(void) {
uint32_t address = EEPROM_START_ADDRESS;
// Стираем все страницы, используемые для EEPROM
while (address < EEPROM_START_ADDRESS + EEPROM_SIZE) {
if (EEPROM_ErasePage(address) != EEPROM_OK) {
return EEPROM_ERROR;
}
address += EEPROM_PAGE_SIZE;
}
eeprom_current_write_address = EEPROM_START_ADDRESS;
eeprom_initialized = 1;
return EEPROM_OK;
}
// Получение информации об использовании EEPROM
void EEPROM_GetInfo(uint32_t* used, uint32_t* total) {
uint32_t address = EEPROM_START_ADDRESS;
uint32_t used_bytes = 0;
if (used) {
// Подсчитываем использованные байты
while (address < EEPROM_START_ADDRESS + EEPROM_SIZE) {
EEPROM_Item item;
memcpy(&item, (void*)address, sizeof(EEPROM_Item));
if (item.address != 0xFFFF || item.data != 0xFFFF || item.timestamp != 0xFFFFFFFF) {
used_bytes += sizeof(EEPROM_Item);
}
address += sizeof(EEPROM_Item);
}
*used = used_bytes;
}
if (total) {
*total = EEPROM_SIZE;
}
}

123
john103C6T6/EEPROM_Emul/src/flash_ring.c Normal file
View File

@ -0,0 +1,123 @@
#include "flash_ring.h"
extern int last_page_addr;
BufferState_t buffer_init(void) {
BufferState_t state = {0};
// Ищем последнюю записанную запись
for (int i = 0; i < RECORDS_PER_PAGE; i++) {
uint32_t record_addr = LAST_PAGE_ADDR + (i * RECORD_SIZE);
FlashRecord_t* record = (FlashRecord_t*)record_addr;
// Проверяем валидность записи (не 0xFFFFFFFF)
if (record->timestamp != 0xFFFFFFFF) {
state.write_index = i + 1;
state.initialized = 1;
} else {
break;
}
}
// Если буфер заполнен, начинаем с начала
if (state.write_index >= RECORDS_PER_PAGE) {
state.write_index = 0;
}
return state;
}
HAL_StatusTypeDef buffer_write_record(FlashRecord_t* record, BufferState_t* state) {
HAL_StatusTypeDef status;
// Если нужно стереть страницу (начало нового цикла)
if (state->write_index == 0 && state->initialized) {
status = erase_flash_page();
if (status != HAL_OK) return status;
}
// Записываем данные
uint32_t record_addr = last_page_addr + (state->write_index * RECORD_SIZE);
status = write_flash_record(record_addr, record);
if (status != HAL_OK) return status;
// Обновляем индекс
state->write_index++;
if (state->write_index >= RECORDS_PER_PAGE) {
state->write_index = 0;
}
state->initialized = 1;
return HAL_OK;
}
HAL_StatusTypeDef erase_flash_page(void) {
HAL_FLASH_Unlock();
FLASH_EraseInitTypeDef EraseInit = {
.TypeErase = FLASH_TYPEERASE_PAGES,
.PageAddress = LAST_PAGE_ADDR,
.NbPages = 1
};
uint32_t page_error;
HAL_StatusTypeDef status = HAL_FLASHEx_Erase(&EraseInit, &page_error);
HAL_FLASH_Lock();
return status;
}
// Запись одной записи
HAL_StatusTypeDef write_flash_record(uint32_t address, FlashRecord_t* record) {
HAL_FLASH_Unlock();
HAL_StatusTypeDef status = HAL_OK;
// Записываем данные по 4 байта (слово)
uint32_t* data_ptr = (uint32_t*)record;
uint32_t words_to_write = (RECORD_SIZE + 3) / 4; // округление вверх
for (uint32_t i = 0; i < words_to_write; i++) {
status = HAL_FLASH_Program(FLASH_TYPEPROGRAM_WORD,
address + (i * 4),
data_ptr[i]);
if (status != HAL_OK) break;
}
HAL_FLASH_Lock();
return status;
}
// Чтение записи по индексу
FlashRecord_t* buffer_read_record(uint32_t index) {
if (index >= RECORDS_PER_PAGE) return NULL;
uint32_t record_addr = LAST_PAGE_ADDR + (index * RECORD_SIZE);
FlashRecord_t* record = (FlashRecord_t*)record_addr;
// Проверяем что запись не пустая
if (record->timestamp == 0xFFFFFFFF) {
return NULL;
}
return record;
}
// Получение всех записей в порядке от старых к новым
void buffer_get_all_records(FlashRecord_t* records[], uint32_t* count) {
*count = 0;
BufferState_t state = buffer_init();
if (!state.initialized) return;
// Начинаем с текущего write_index (самые старые данные)
for (int i = 0; i < RECORDS_PER_PAGE; i++) {
uint32_t idx = (state.write_index + i) % RECORDS_PER_PAGE;
FlashRecord_t* record = buffer_read_record(idx);
if (record) {
records[(*count)++] = record;
}
}
}

154
john103C6T6/EEPROM_Emul/src/flash_ring.c.orig Normal file
View File

@ -0,0 +1,154 @@
#include "flash_ring.h"
uint8_t current_page = 0; // текущая страница для записи
// Вычисление CRC16 (полином 0x8005)
static uint16_t calc_crc16(const uint8_t *data, uint32_t len)
{
uint16_t crc = 0xFFFF;
for (uint32_t i = 0; i < len; i++)
{
crc ^= data[i];
for (int j = 0; j < 8; j++)
{
if (crc & 1) crc = (crc >> 1) ^ 0xA001;
else crc >>= 1;
}
}
return crc;
}
// Проверка заголовка страницы
static bool is_page_valid(uint32_t addr)
{
PageHeader_t *hdr = (PageHeader_t *)addr;
return (hdr->valid_marker == 0xDEADBEEF);
}
// Инициализация: поиск актуальной страницы или очистка
bool FlashRing_Init(void)
{
for (uint8_t i = 0; i < PAGE_COUNT; i++)
{
uint32_t addr = FLASH_BASE_USER + i * FLASH_PAGE_SIZE_USER;
if (is_page_valid(addr))
{
current_page = i;
return true;
}
}
// Если ни одна страница не актуальна — стираем обе
if (FlashRing_EraseAll()!= 1) {
return false; // Ошибка стирания
}
current_page = 0;
return true;
}
uint16_t CalculateCRC16(const uint8_t *data, uint32_t len) {
uint16_t crc = 0xFFFF; // Начальное значение
for (uint32_t i = 0; i < len; i++) {
crc ^= data[i];
for (int j = 0; j < 8; j++) {
if (crc & 1) {
crc = (crc >> 1) ^ 0xA001; // 0xA001 = обратный полином 0x8005
} else {
crc >>= 1;
}
}
}
return crc;
}
// Стирание всех страниц
int FlashRing_EraseAll(void)
{
HAL_FLASH_Unlock();
FLASH_EraseInitTypeDef EraseInit =
{
.TypeErase = FLASH_TYPEERASE_PAGES,
.PageAddress = FLASH_BASE_USER,
.NbPages = PAGE_COUNT
};
uint32_t page_error;
HAL_FLASHEx_Erase(&EraseInit, &page_error);
// HAL_FLASHLock();
HAL_FLASH_Lock();
return 1;
}
// Запись уставки
bool FlashRing_Write(const Setpoint_t *sp)
{
uint32_t page_addr = FLASH_BASE_USER + current_page * FLASH_PAGE_SIZE_USER;
PageHeader_t *hdr = (PageHeader_t *)page_addr;
// Если страница не инициализирована или заполнена — переключаемся
if (!is_page_valid(page_addr) || hdr->count >= (FLASH_PAGE_SIZE_USER - sizeof(PageHeader_t)) / sizeof(Setpoint_t))
{
// Стираем следующую страницу
uint8_t next_page = (current_page + 1) % PAGE_COUNT;
uint32_t next_addr = FLASH_BASE_USER + next_page * FLASH_PAGE_SIZE_USER;
HAL_FLASH_Unlock();
FLASH_EraseInitTypeDef EraseInit =
{
.TypeErase = FLASH_TYPEERASE_PAGES,
.PageAddress = next_addr,
.NbPages = 1
};
uint32_t page_error;
HAL_FLASHEx_Erase(&EraseInit, &page_error);
current_page = next_page;
page_addr = next_addr;
HAL_FLASH_Program(FLASH_TYPEPROGRAM_WORD, (uint32_t)&hdr->valid_marker, 0xDEADBEEF);
HAL_FLASH_Program(FLASH_TYPEPROGRAM_HALFWORD, (uint32_t)&hdr->count, 0);
HAL_FLASH_Lock();
}
// Вычисляем смещение для новой уставки
uint8_t *data_start = (uint8_t *)page_addr + sizeof(PageHeader_t);
uint16_t idx = hdr->count;
Setpoint_t *dst = (Setpoint_t *)(data_start + idx * sizeof(Setpoint_t));
*dst = *sp;
hdr->count++;
// Обновляем CRC
hdr->crc = calc_crc16(data_start, hdr->count * sizeof(Setpoint_t));
return true;
}
// Чтение уставки по индексу
bool FlashRing_Read(uint16_t index, Setpoint_t *sp)
{
uint32_t page_addr = FLASH_BASE_USER + current_page * FLASH_PAGE_SIZE_USER;
if (!is_page_valid(page_addr)) return false;
PageHeader_t *hdr = (PageHeader_t *)page_addr;
if (index >= hdr->count) return false;
uint8_t *data_start = (uint8_t *)page_addr + sizeof(PageHeader_t);
*sp = *(Setpoint_t *)(data_start + index * sizeof(Setpoint_t));
return true;
}
// Получение числа записанных уставок
uint16_t FlashRing_GetCount(void)
{
uint32_t page_addr = FLASH_BASE_USER + current_page * FLASH_PAGE_SIZE_USER;
if (!is_page_valid(page_addr)) return 0;
PageHeader_t *hdr = (PageHeader_t *)page_addr;
return hdr->count;
}

36
john103C6T6/MDK-ARM/DebugConfig/john103C6T6_STM32F103CB_1.0.0.dbgconf Normal file
View File

@ -0,0 +1,36 @@
// File: STM32F101_102_103_105_107.dbgconf
// Version: 1.0.0
// Note: refer to STM32F101xx STM32F102xx STM32F103xx STM32F105xx STM32F107xx Reference manual (RM0008)
// STM32F101xx STM32F102xx STM32F103xx STM32F105xx STM32F107xx datasheets
// <<< Use Configuration Wizard in Context Menu >>>
// <h> Debug MCU configuration register (DBGMCU_CR)
// <i> Reserved bits must be kept at reset value
// <o.30> DBG_TIM11_STOP <i> TIM11 counter stopped when core is halted
// <o.29> DBG_TIM10_STOP <i> TIM10 counter stopped when core is halted
// <o.28> DBG_TIM9_STOP <i> TIM9 counter stopped when core is halted
// <o.27> DBG_TIM14_STOP <i> TIM14 counter stopped when core is halted
// <o.26> DBG_TIM13_STOP <i> TIM13 counter stopped when core is halted
// <o.25> DBG_TIM12_STOP <i> TIM12 counter stopped when core is halted
// <o.21> DBG_CAN2_STOP <i> Debug CAN2 stopped when core is halted
// <o.20> DBG_TIM7_STOP <i> TIM7 counter stopped when core is halted
// <o.19> DBG_TIM6_STOP <i> TIM6 counter stopped when core is halted
// <o.18> DBG_TIM5_STOP <i> TIM5 counter stopped when core is halted
// <o.17> DBG_TIM8_STOP <i> TIM8 counter stopped when core is halted
// <o.16> DBG_I2C2_SMBUS_TIMEOUT <i> SMBUS timeout mode stopped when core is halted
// <o.15> DBG_I2C1_SMBUS_TIMEOUT <i> SMBUS timeout mode stopped when core is halted
// <o.14> DBG_CAN1_STOP <i> Debug CAN1 stopped when Core is halted
// <o.13> DBG_TIM4_STOP <i> TIM4 counter stopped when core is halted
// <o.12> DBG_TIM3_STOP <i> TIM3 counter stopped when core is halted
// <o.11> DBG_TIM2_STOP <i> TIM2 counter stopped when core is halted
// <o.10> DBG_TIM1_STOP <i> TIM1 counter stopped when core is halted
// <o.9> DBG_WWDG_STOP <i> Debug window watchdog stopped when core is halted
// <o.8> DBG_IWDG_STOP <i> Debug independent watchdog stopped when core is halted
// <o.2> DBG_STANDBY <i> Debug standby mode
// <o.1> DBG_STOP <i> Debug stop mode
// <o.0> DBG_SLEEP <i> Debug sleep mode
// </h>
DbgMCU_CR = 0x00000007;
// <<< end of configuration section >>>

7
john103C6T6/MDK-ARM/RTE/_john103C6T6/RTE_Components.h
View File

@ -1,7 +1,6 @@
/* /*
* Auto generated Run-Time-Environment Configuration File * UVISION generated file: DO NOT EDIT!
* *** Do not modify ! *** * Generated by: uVision version 5.41.0.0
* *
* Project: 'john103C6T6' * Project: 'john103C6T6'
* Target: 'john103C6T6' * Target: 'john103C6T6'
@ -16,7 +15,7 @@
*/ */
#define CMSIS_device_header "stm32f10x.h" #define CMSIS_device_header "stm32f10x.h"
/* Keil.ARM Compiler::Compiler:I/O:STDOUT:Breakpoint:1.2.0 */ /* Keil::Compiler&ARM Compiler:I/O:STDOUT&Breakpoint@1.2.0 */
#define RTE_Compiler_IO_STDOUT /* Compiler I/O: STDOUT */ #define RTE_Compiler_IO_STDOUT /* Compiler I/O: STDOUT */
#define RTE_Compiler_IO_STDOUT_BKPT /* Compiler I/O: STDOUT Breakpoint */ #define RTE_Compiler_IO_STDOUT_BKPT /* Compiler I/O: STDOUT Breakpoint */

113
john103C6T6/MDK-ARM/john103C6T6.uvoptx
View File

@ -120,12 +120,12 @@
<SetRegEntry> <SetRegEntry>
<Number>0</Number> <Number>0</Number>
<Key>UL2CM3</Key> <Key>UL2CM3</Key>
<Name>UL2CM3(-S0 -C0 -P0 ) -FN1 -FC1000 -FD20000000 -FF0STM32F10x_128 -FL020000 -FS08000000 -FP0($$Device:STM32F103C8$Flash\STM32F10x_128.FLM)</Name> <Name>UL2CM3(-S0 -C0 -P0 ) -FN1 -FC1000 -FD20000000 -FF0STM32F10x_128 -FL020000 -FS08000000 -FP0($$Device:STM32F103CB$Flash\STM32F10x_128.FLM)</Name>
</SetRegEntry> </SetRegEntry>
<SetRegEntry> <SetRegEntry>
<Number>0</Number> <Number>0</Number>
<Key>ST-LINKIII-KEIL_SWO</Key> <Key>ST-LINKIII-KEIL_SWO</Key>
<Name>-U002400343233511639363634 -O206 -SF10000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P1 -N00("ARM CoreSight SW-DP (ARM Core") -D00(2BA01477) -L00(0) -TO131090 -TC10000000 -TT10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN1 -FF0STM32F10x_128.FLM -FS08000000 -FL020000 -FP0($$Device:STM32F103C8$Flash\STM32F10x_128.FLM) -WA0 -WE0 -WVCE4 -WS2710 -WM0 -WP2</Name> <Name>-U002400343233511639363634 -O206 -SF10000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P1 -N00("ARM CoreSight SW-DP (ARM Core") -D00(1BA01477) -L00(0) -TO131090 -TC10000000 -TT10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN1 -FF0STM32F10x_128.FLM -FS08000000 -FL020000 -FP0($$Device:STM32F103CB$Flash\STM32F10x_128.FLM) -WA0 -WE0 -WVCE4 -WS2710 -WM0 -WP2 -WK0-R0</Name>
</SetRegEntry> </SetRegEntry>
<SetRegEntry> <SetRegEntry>
<Number>0</Number> <Number>0</Number>
@ -148,70 +148,77 @@
<Name>(105=-1,-1,-1,-1,0)</Name> <Name>(105=-1,-1,-1,-1,0)</Name>
</SetRegEntry> </SetRegEntry>
</TargetDriverDllRegistry> </TargetDriverDllRegistry>
<Breakpoint> <Breakpoint/>
<Bp>
<Number>0</Number>
<Type>0</Type>
<LineNumber>193</LineNumber>
<EnabledFlag>1</EnabledFlag>
<Address>134249696</Address>
<ByteObject>0</ByteObject>
<HtxType>0</HtxType>
<ManyObjects>0</ManyObjects>
<SizeOfObject>0</SizeOfObject>
<BreakByAccess>0</BreakByAccess>
<BreakIfRCount>1</BreakIfRCount>
<Filename>../Core/Src/main.c</Filename>
<ExecCommand></ExecCommand>
<Expression>\\john103C6T6\../Core/Src/main.c\193</Expression>
</Bp>
<Bp>
<Number>1</Number>
<Type>0</Type>
<LineNumber>193</LineNumber>
<EnabledFlag>1</EnabledFlag>
<Address>134249792</Address>
<ByteObject>0</ByteObject>
<HtxType>0</HtxType>
<ManyObjects>0</ManyObjects>
<SizeOfObject>0</SizeOfObject>
<BreakByAccess>0</BreakByAccess>
<BreakIfRCount>1</BreakIfRCount>
<Filename>../Core/Src/main.c</Filename>
<ExecCommand></ExecCommand>
<Expression>\\john103C6T6\../Core/Src/main.c\193</Expression>
</Bp>
</Breakpoint>
<WatchWindow1> <WatchWindow1>
<Ww> <Ww>
<count>0</count> <count>0</count>
<WinNumber>1</WinNumber> <WinNumber>1</WinNumber>
<ItemText>hiwdg</ItemText> <ItemText>sens</ItemText>
</Ww> </Ww>
<Ww> <Ww>
<count>1</count> <count>1</count>
<WinNumber>1</WinNumber> <WinNumber>1</WinNumber>
<ItemText>DS18B20_DEVICE_AMOUNT</ItemText> <ItemText>MB_DATA,0x0A</ItemText>
</Ww> </Ww>
<Ww> <Ww>
<count>2</count> <count>2</count>
<WinNumber>1</WinNumber> <WinNumber>1</WinNumber>
<ItemText>set_temp_old</ItemText> <ItemText>temp_sense</ItemText>
</Ww> </Ww>
<Ww> <Ww>
<count>3</count> <count>3</count>
<WinNumber>1</WinNumber> <WinNumber>1</WinNumber>
<ItemText>sTime</ItemText> <ItemText>roms</ItemText>
</Ww> </Ww>
<Ww> <Ww>
<count>4</count> <count>4</count>
<WinNumber>1</WinNumber> <WinNumber>1</WinNumber>
<ItemText>sens[sens_num]</ItemText> <ItemText>state</ItemText>
</Ww> </Ww>
<Ww> <Ww>
<count>5</count> <count>5</count>
<WinNumber>1</WinNumber> <WinNumber>1</WinNumber>
<ItemText>sens</ItemText> <ItemText>last_page_addr</ItemText>
</Ww>
<Ww>
<count>6</count>
<WinNumber>1</WinNumber>
<ItemText>\\john103C6T6\../EEPROM_Emul/src/flash_ring.c\buffer_write_record\record_addr</ItemText>
</Ww>
<Ww>
<count>7</count>
<WinNumber>1</WinNumber>
<ItemText>MB_DATA.Coils.relay_struct[0].state_val_bit.Temp10_relay_isOn,0x0A</ItemText>
</Ww>
<Ww>
<count>8</count>
<WinNumber>1</WinNumber>
<ItemText>MB_DATA.Coils.relay_struct[0].state_val_bit.Temp11_relay_isOn,0x0A</ItemText>
</Ww>
<Ww>
<count>9</count>
<WinNumber>1</WinNumber>
<ItemText>record</ItemText>
</Ww>
<Ww>
<count>10</count>
<WinNumber>1</WinNumber>
<ItemText>flash_buff</ItemText>
</Ww>
<Ww>
<count>11</count>
<WinNumber>1</WinNumber>
<ItemText>new_record</ItemText>
</Ww>
<Ww>
<count>12</count>
<WinNumber>1</WinNumber>
<ItemText>state</ItemText>
</Ww>
<Ww>
<count>13</count>
<WinNumber>1</WinNumber>
<ItemText>htim</ItemText>
</Ww> </Ww>
</WatchWindow1> </WatchWindow1>
<WatchWindow2> <WatchWindow2>
@ -230,7 +237,7 @@
<Mm> <Mm>
<WinNumber>1</WinNumber> <WinNumber>1</WinNumber>
<SubType>0</SubType> <SubType>0</SubType>
<ItemText>0x08000000</ItemText> <ItemText>0x0800f800</ItemText>
<AccSizeX>0</AccSizeX> <AccSizeX>0</AccSizeX>
</Mm> </Mm>
</MemoryWindow1> </MemoryWindow1>
@ -277,6 +284,10 @@
<pSingCmdsp></pSingCmdsp> <pSingCmdsp></pSingCmdsp>
<pMultCmdsp></pMultCmdsp> <pMultCmdsp></pMultCmdsp>
<SystemViewers> <SystemViewers>
<Entry>
<Name>System Viewer\FLASH</Name>
<WinId>35904</WinId>
</Entry>
<Entry> <Entry>
<Name>System Viewer\GPIOB</Name> <Name>System Viewer\GPIOB</Name>
<WinId>35900</WinId> <WinId>35900</WinId>
@ -309,8 +320,8 @@
<tvExp>0</tvExp> <tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg> <tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2> <bDave2>0</bDave2>
<PathWithFileName>startup_stm32f103x6.s</PathWithFileName> <PathWithFileName>.\startup_stm32f10x_md.s</PathWithFileName>
<FilenameWithoutPath>startup_stm32f103x6.s</FilenameWithoutPath> <FilenameWithoutPath>startup_stm32f10x_md.s</FilenameWithoutPath>
<RteFlg>0</RteFlg> <RteFlg>0</RteFlg>
<bShared>0</bShared> <bShared>0</bShared>
</File> </File>
@ -521,8 +532,8 @@
<tvExp>0</tvExp> <tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg> <tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2> <bDave2>0</bDave2>
<PathWithFileName>..\EEPROM_Emul\src\EEPROM_Emul.c</PathWithFileName> <PathWithFileName>..\EEPROM_Emul\src\flash_ring.c</PathWithFileName>
<FilenameWithoutPath>EEPROM_Emul.c</FilenameWithoutPath> <FilenameWithoutPath>flash_ring.c</FilenameWithoutPath>
<RteFlg>0</RteFlg> <RteFlg>0</RteFlg>
<bShared>0</bShared> <bShared>0</bShared>
</File> </File>
@ -530,7 +541,7 @@
<Group> <Group>
<GroupName>Drivers/STM32F1xx_HAL_Driver</GroupName> <GroupName>Drivers/STM32F1xx_HAL_Driver</GroupName>
<tvExp>0</tvExp> <tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg> <tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel> <cbSel>0</cbSel>
<RteFlg>0</RteFlg> <RteFlg>0</RteFlg>
@ -550,7 +561,7 @@
<GroupNumber>3</GroupNumber> <GroupNumber>3</GroupNumber>
<FileNumber>20</FileNumber> <FileNumber>20</FileNumber>
<FileType>1</FileType> <FileType>1</FileType>
<tvExp>0</tvExp> <tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg> <tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2> <bDave2>0</bDave2>
<PathWithFileName>../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c</PathWithFileName> <PathWithFileName>../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c</PathWithFileName>
@ -790,7 +801,7 @@
<Group> <Group>
<GroupName>Drivers/CMSIS</GroupName> <GroupName>Drivers/CMSIS</GroupName>
<tvExp>0</tvExp> <tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg> <tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel> <cbSel>0</cbSel>
<RteFlg>0</RteFlg> <RteFlg>0</RteFlg>
@ -810,7 +821,7 @@
<Group> <Group>
<GroupName>modbus</GroupName> <GroupName>modbus</GroupName>
<tvExp>1</tvExp> <tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg> <tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel> <cbSel>0</cbSel>
<RteFlg>0</RteFlg> <RteFlg>0</RteFlg>

38
john103C6T6/MDK-ARM/john103C6T6.uvprojx
View File

@ -10,21 +10,21 @@
<TargetName>john103C6T6</TargetName> <TargetName>john103C6T6</TargetName>
<ToolsetNumber>0x4</ToolsetNumber> <ToolsetNumber>0x4</ToolsetNumber>
<ToolsetName>ARM-ADS</ToolsetName> <ToolsetName>ARM-ADS</ToolsetName>
<pArmCC>6190000::V6.19::ARMCLANG</pArmCC> <pArmCC>6220000::V6.22::ARMCLANG</pArmCC>
<pCCUsed>6190000::V6.19::ARMCLANG</pCCUsed> <pCCUsed>6220000::V6.22::ARMCLANG</pCCUsed>
<uAC6>1</uAC6> <uAC6>1</uAC6>
<TargetOption> <TargetOption>
<TargetCommonOption> <TargetCommonOption>
<Device>STM32F103C8</Device> <Device>STM32F103CB</Device>
<Vendor>STMicroelectronics</Vendor> <Vendor>STMicroelectronics</Vendor>
<PackID>Keil.STM32F1xx_DFP.2.4.0</PackID> <PackID>Keil.STM32F1xx_DFP.2.4.0</PackID>
<PackURL>http://www.keil.com/pack/</PackURL> <PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IRAM(0x20000000,0x00005000) IROM(0x08000000,0x00010000) CPUTYPE("Cortex-M3") CLOCK(12000000) ELITTLE</Cpu> <Cpu>IRAM(0x20000000,0x00005000) IROM(0x08000000,0x00020000) CPUTYPE("Cortex-M3") CLOCK(12000000) ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec> <FlashUtilSpec></FlashUtilSpec>
<StartupFile></StartupFile> <StartupFile></StartupFile>
<FlashDriverDll>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32F10x_128 -FS08000000 -FL020000 -FP0($$Device:STM32F103C8$Flash\STM32F10x_128.FLM))</FlashDriverDll> <FlashDriverDll>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32F10x_128 -FS08000000 -FL020000 -FP0($$Device:STM32F103CB$Flash\STM32F10x_128.FLM))</FlashDriverDll>
<DeviceId>0</DeviceId> <DeviceId>0</DeviceId>
<RegisterFile>$$Device:STM32F103C8$Device\Include\stm32f10x.h</RegisterFile> <RegisterFile>$$Device:STM32F103CB$Device\Include\stm32f10x.h</RegisterFile>
<MemoryEnv></MemoryEnv> <MemoryEnv></MemoryEnv>
<Cmp></Cmp> <Cmp></Cmp>
<Asm></Asm> <Asm></Asm>
@ -34,7 +34,7 @@
<SLE66CMisc></SLE66CMisc> <SLE66CMisc></SLE66CMisc>
<SLE66AMisc></SLE66AMisc> <SLE66AMisc></SLE66AMisc>
<SLE66LinkerMisc></SLE66LinkerMisc> <SLE66LinkerMisc></SLE66LinkerMisc>
<SFDFile>$$Device:STM32F103C8$SVD\STM32F103xx.svd</SFDFile> <SFDFile>$$Device:STM32F103CB$SVD\STM32F103xx.svd</SFDFile>
<bCustSvd>0</bCustSvd> <bCustSvd>0</bCustSvd>
<UseEnv>0</UseEnv> <UseEnv>0</UseEnv>
<BinPath></BinPath> <BinPath></BinPath>
@ -139,7 +139,7 @@
</Flash1> </Flash1>
<bUseTDR>1</bUseTDR> <bUseTDR>1</bUseTDR>
<Flash2>BIN\UL2CM3.DLL</Flash2> <Flash2>BIN\UL2CM3.DLL</Flash2>
<Flash3>"" ()</Flash3> <Flash3></Flash3>
<Flash4></Flash4> <Flash4></Flash4>
<pFcarmOut></pFcarmOut> <pFcarmOut></pFcarmOut>
<pFcarmGrp></pFcarmGrp> <pFcarmGrp></pFcarmGrp>
@ -160,7 +160,7 @@
<ldmm>1</ldmm> <ldmm>1</ldmm>
<ldXref>1</ldXref> <ldXref>1</ldXref>
<BigEnd>0</BigEnd> <BigEnd>0</BigEnd>
<AdsALst>1</AdsALst> <AdsALst>0</AdsALst>
<AdsACrf>1</AdsACrf> <AdsACrf>1</AdsACrf>
<AdsANop>0</AdsANop> <AdsANop>0</AdsANop>
<AdsANot>0</AdsANot> <AdsANot>0</AdsANot>
@ -253,7 +253,7 @@
<IROM> <IROM>
<Type>1</Type> <Type>1</Type>
<StartAddress>0x8000000</StartAddress> <StartAddress>0x8000000</StartAddress>
<Size>0x10000</Size> <Size>0x20000</Size>
</IROM> </IROM>
<XRAM> <XRAM>
<Type>0</Type> <Type>0</Type>
@ -278,7 +278,7 @@
<OCR_RVCT4> <OCR_RVCT4>
<Type>1</Type> <Type>1</Type>
<StartAddress>0x8000000</StartAddress> <StartAddress>0x8000000</StartAddress>
<Size>0x10000</Size> <Size>0x20000</Size>
</OCR_RVCT4> </OCR_RVCT4>
<OCR_RVCT5> <OCR_RVCT5>
<Type>1</Type> <Type>1</Type>
@ -339,9 +339,9 @@
<v6Rtti>0</v6Rtti> <v6Rtti>0</v6Rtti>
<VariousControls> <VariousControls>
<MiscControls></MiscControls> <MiscControls></MiscControls>
<Define>USE_HAL_DRIVER,STM32F103x6</Define> <Define>USE_HAL_DRIVER,STM32F103xB</Define>
<Undefine></Undefine> <Undefine></Undefine>
<IncludePath>../Core/Inc;../Drivers/STM32F1xx_HAL_Driver/Inc;../Drivers/STM32F1xx_HAL_Driver/Inc/Legacy;../Drivers/CMSIS/Device/ST/STM32F1xx/Include;../Drivers/CMSIS/Include;../Modbus;..\EEPROM_Emul\lib;..\..\core\STM32_Modbus\Inc</IncludePath> <IncludePath>../Core/Inc;../Drivers/STM32F1xx_HAL_Driver/Inc;../Drivers/STM32F1xx_HAL_Driver/Inc/Legacy;../Drivers/CMSIS/Device/ST/STM32F1xx/Include;../Drivers/CMSIS/Include;../Modbus;..\EEPROM_Emul\lib;..\..\core\STM32_Modbus\Inc;..\EEPROM_Emul\lib</IncludePath>
</VariousControls> </VariousControls>
</Cads> </Cads>
<Aads> <Aads>
@ -386,9 +386,9 @@
<GroupName>Application/MDK-ARM</GroupName> <GroupName>Application/MDK-ARM</GroupName>
<Files> <Files>
<File> <File>
<FileName>startup_stm32f103x6.s</FileName> <FileName>startup_stm32f10x_md.s</FileName>
<FileType>2</FileType> <FileType>2</FileType>
<FilePath>startup_stm32f103x6.s</FilePath> <FilePath>.\startup_stm32f10x_md.s</FilePath>
</File> </File>
</Files> </Files>
</Group> </Group>
@ -731,9 +731,9 @@
<FilePath>../Core/Src/stm32f1xx_hal_timebase_tim.c</FilePath> <FilePath>../Core/Src/stm32f1xx_hal_timebase_tim.c</FilePath>
</File> </File>
<File> <File>
<FileName>EEPROM_Emul.c</FileName> <FileName>flash_ring.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>..\EEPROM_Emul\src\EEPROM_Emul.c</FilePath> <FilePath>..\EEPROM_Emul\src\flash_ring.c</FilePath>
</File> </File>
</Files> </Files>
</Group> </Group>
@ -1313,8 +1313,8 @@
<targetInfo name="john103C6T6"/> <targetInfo name="john103C6T6"/>
</targetInfos> </targetInfos>
</component> </component>
<component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="5.6.0" condition="ARMv6_7_8-M Device"> <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="6.1.0" condition="ARMv6_7_8-M Device">
<package name="CMSIS" schemaVersion="1.7.7" url="http://www.keil.com/pack/" vendor="ARM" version="5.9.0"/> <package name="CMSIS" schemaVersion="1.7.36" url="https://www.keil.com/pack/" vendor="ARM" version="6.1.0"/>
<targetInfos> <targetInfos>
<targetInfo name="john103C6T6"/> <targetInfo name="john103C6T6"/>
</targetInfos> </targetInfos>

1341
john103C6T6/MDK-ARM/john103C6T6.uvprojx.orig Normal file
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File diff suppressed because it is too large Load Diff

4
john103C6T6/MDK-ARM/john103C6T6/john103C6T6.sct
View File

@ -2,8 +2,8 @@
; *** Scatter-Loading Description File generated by uVision *** ; *** Scatter-Loading Description File generated by uVision ***
; ************************************************************* ; *************************************************************
LR_IROM1 0x08000000 0x00010000 { ; load region size_region LR_IROM1 0x08000000 0x00020000 { ; load region size_region
ER_IROM1 0x08000000 0x00010000 { ; load address = execution address ER_IROM1 0x08000000 0x00020000 { ; load address = execution address
*.o (RESET, +First) *.o (RESET, +First)
*(InRoot$$Sections) *(InRoot$$Sections)
.ANY (+RO) .ANY (+RO)

53
john103C6T6/MDK-ARM/startup_stm32f103x6.s → john103C6T6/MDK-ARM/startup_stm32f10x_md.s
View File

@ -1,7 +1,10 @@
;******************** (C) COPYRIGHT 2017 STMicroelectronics ******************** ;******************** (C) COPYRIGHT 2011 STMicroelectronics ********************
;* File Name : startup_stm32f103x6.s ;* File Name : startup_stm32f10x_md.s
;* Author : MCD Application Team ;* Author : MCD Application Team
;* Description : STM32F103x6 Devices vector table for MDK-ARM toolchain. ;* Version : V3.5.1
;* Date : 08-September-2021
;* Description : STM32F10x Medium Density Devices vector table for MDK-ARM
;* toolchain.
;* This module performs: ;* This module performs:
;* - Set the initial SP ;* - Set the initial SP
;* - Set the initial PC == Reset_Handler ;* - Set the initial PC == Reset_Handler
@ -9,19 +12,19 @@
;* - Configure the clock system ;* - Configure the clock system
;* - Branches to __main in the C library (which eventually ;* - Branches to __main in the C library (which eventually
;* calls main()). ;* calls main()).
;* After Reset the Cortex-M3 processor is in Thread mode, ;* After Reset the CortexM3 processor is in Thread mode,
;* priority is Privileged, and the Stack is set to Main. ;* priority is Privileged, and the Stack is set to Main.
;****************************************************************************** ;* <<< Use Configuration Wizard in Context Menu >>>
;* @attention ;*******************************************************************************
;* ;*
;* Copyright (c) 2017-2021 STMicroelectronics. ;* Copyright (c) 2011 STMicroelectronics.
;* All rights reserved. ;* All rights reserved.
;* ;*
;* This software is licensed under terms that can be found in the LICENSE file ;* This software is licensed under terms that can be found in the LICENSE file
;* in the root directory of this software component. ;* in the root directory of this software component.
;* If no LICENSE file comes with this software, it is provided AS-IS. ;* If no LICENSE file comes with this software, it is provided AS-IS.
;* ;
;****************************************************************************** ;*******************************************************************************
; Amount of memory (in bytes) allocated for Stack ; Amount of memory (in bytes) allocated for Stack
; Tailor this value to your application needs ; Tailor this value to your application needs
@ -29,7 +32,7 @@
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> ; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
; </h> ; </h>
Stack_Size EQU 0x400 Stack_Size EQU 0x00000400
AREA STACK, NOINIT, READWRITE, ALIGN=3 AREA STACK, NOINIT, READWRITE, ALIGN=3
Stack_Mem SPACE Stack_Size Stack_Mem SPACE Stack_Size
@ -40,7 +43,7 @@ __initial_sp
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> ; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
; </h> ; </h>
Heap_Size EQU 0x400 Heap_Size EQU 0x00000200
AREA HEAP, NOINIT, READWRITE, ALIGN=3 AREA HEAP, NOINIT, READWRITE, ALIGN=3
__heap_base __heap_base
@ -105,18 +108,18 @@ __Vectors DCD __initial_sp ; Top of Stack
DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
DCD TIM2_IRQHandler ; TIM2 DCD TIM2_IRQHandler ; TIM2
DCD TIM3_IRQHandler ; TIM3 DCD TIM3_IRQHandler ; TIM3
DCD 0 ; Reserved DCD TIM4_IRQHandler ; TIM4
DCD I2C1_EV_IRQHandler ; I2C1 Event DCD I2C1_EV_IRQHandler ; I2C1 Event
DCD I2C1_ER_IRQHandler ; I2C1 Error DCD I2C1_ER_IRQHandler ; I2C1 Error
DCD 0 ; Reserved DCD I2C2_EV_IRQHandler ; I2C2 Event
DCD 0 ; Reserved DCD I2C2_ER_IRQHandler ; I2C2 Error
DCD SPI1_IRQHandler ; SPI1 DCD SPI1_IRQHandler ; SPI1
DCD 0 ; Reserved DCD SPI2_IRQHandler ; SPI2
DCD USART1_IRQHandler ; USART1 DCD USART1_IRQHandler ; USART1
DCD USART2_IRQHandler ; USART2 DCD USART2_IRQHandler ; USART2
DCD 0 ; Reserved DCD USART3_IRQHandler ; USART3
DCD EXTI15_10_IRQHandler ; EXTI Line 15..10 DCD EXTI15_10_IRQHandler ; EXTI Line 15..10
DCD RTC_Alarm_IRQHandler ; RTC Alarm through EXTI Line DCD RTCAlarm_IRQHandler ; RTC Alarm through EXTI Line
DCD USBWakeUp_IRQHandler ; USB Wakeup from suspend DCD USBWakeUp_IRQHandler ; USB Wakeup from suspend
__Vectors_End __Vectors_End
@ -124,7 +127,7 @@ __Vectors_Size EQU __Vectors_End - __Vectors
AREA |.text|, CODE, READONLY AREA |.text|, CODE, READONLY
; Reset handler routine ; Reset handler
Reset_Handler PROC Reset_Handler PROC
EXPORT Reset_Handler [WEAK] EXPORT Reset_Handler [WEAK]
IMPORT __main IMPORT __main
@ -211,13 +214,18 @@ Default_Handler PROC
EXPORT TIM1_CC_IRQHandler [WEAK] EXPORT TIM1_CC_IRQHandler [WEAK]
EXPORT TIM2_IRQHandler [WEAK] EXPORT TIM2_IRQHandler [WEAK]
EXPORT TIM3_IRQHandler [WEAK] EXPORT TIM3_IRQHandler [WEAK]
EXPORT TIM4_IRQHandler [WEAK]
EXPORT I2C1_EV_IRQHandler [WEAK] EXPORT I2C1_EV_IRQHandler [WEAK]
EXPORT I2C1_ER_IRQHandler [WEAK] EXPORT I2C1_ER_IRQHandler [WEAK]
EXPORT I2C2_EV_IRQHandler [WEAK]
EXPORT I2C2_ER_IRQHandler [WEAK]
EXPORT SPI1_IRQHandler [WEAK] EXPORT SPI1_IRQHandler [WEAK]
EXPORT SPI2_IRQHandler [WEAK]
EXPORT USART1_IRQHandler [WEAK] EXPORT USART1_IRQHandler [WEAK]
EXPORT USART2_IRQHandler [WEAK] EXPORT USART2_IRQHandler [WEAK]
EXPORT USART3_IRQHandler [WEAK]
EXPORT EXTI15_10_IRQHandler [WEAK] EXPORT EXTI15_10_IRQHandler [WEAK]
EXPORT RTC_Alarm_IRQHandler [WEAK] EXPORT RTCAlarm_IRQHandler [WEAK]
EXPORT USBWakeUp_IRQHandler [WEAK] EXPORT USBWakeUp_IRQHandler [WEAK]
WWDG_IRQHandler WWDG_IRQHandler
@ -250,13 +258,18 @@ TIM1_TRG_COM_IRQHandler
TIM1_CC_IRQHandler TIM1_CC_IRQHandler
TIM2_IRQHandler TIM2_IRQHandler
TIM3_IRQHandler TIM3_IRQHandler
TIM4_IRQHandler
I2C1_EV_IRQHandler I2C1_EV_IRQHandler
I2C1_ER_IRQHandler I2C1_ER_IRQHandler
I2C2_EV_IRQHandler
I2C2_ER_IRQHandler
SPI1_IRQHandler SPI1_IRQHandler
SPI2_IRQHandler
USART1_IRQHandler USART1_IRQHandler
USART2_IRQHandler USART2_IRQHandler
USART3_IRQHandler
EXTI15_10_IRQHandler EXTI15_10_IRQHandler
RTC_Alarm_IRQHandler RTCAlarm_IRQHandler
USBWakeUp_IRQHandler USBWakeUp_IRQHandler
B . B .

2
john103C6T6/Modbus/modbus_data.h
View File

@ -86,9 +86,7 @@ typedef __PACKED_STRUCT//MB_DataInRegsTypeDef
{ {
uint16_t sens_Temp[MAX_SENSE]; uint16_t sens_Temp[MAX_SENSE];
uint16_t reserve[mb_fill_rsv(1000, uint16_t[MAX_SENSE])]; uint16_t reserve[mb_fill_rsv(1000, uint16_t[MAX_SENSE])];
DS18B20_Drv_t ID; DS18B20_Drv_t ID;
uint16_t reserve1[mb_fill_rsv(200, DS18B20_Drv_t)]; uint16_t reserve1[mb_fill_rsv(200, DS18B20_Drv_t)];
uint16_t num_Tsens; uint16_t num_Tsens;

283
john103C6T6/Modbus/modbus_data.h.orig Normal file
View File

@ -0,0 +1,283 @@
/**
**************************************************************************
* @file modbus_data.h
* @brief Заголовочный файл с описанием даты MODBUS.
* @details Данный файл необходимо подключается в rs_message.h. После rs_message.h
* подключается к основному проекту.
*
* @defgroup MODBUS_DATA
* @ingroup MODBUS
* @brief Modbus data description
*
*************************************************************************/
#ifndef _MODBUS_DATA_H_
#define _MODBUS_DATA_H_
// DEFINES FOR INPUT REGISTERS ARRAYS
#define R_INPUT_ADDR 0
#define R_INPUT_QNT 2000
// DEFINES FOR HOLDING REGISTERS ARRAYS
#define R_HOLDING_ADDR 0
#define R_HOLDING_QNT 2000
// DEFINES FOR COIL ARRAYS
#define C_CONTROL_ADDR 0
#define C_CONTROL_QNT 1000
#include "stdint.h"
#include "ds18b20_driver.h"
#include "PROJ_setup.h"
//--------------DEFINES FOR REGISTERS---------------
// DEFINES FOR ARRAYS
/**
* @addtogroup MODBUS_DATA_RERISTERS_DEFINES
* @ingroup MODBUS_DATA
* @brief Defines for registers
Структура дефайна адресов
@verbatim
Для массивов регистров:
R_<NAME_ARRAY>_ADDR - модбас адресс первого регистра в массиве
R_<NAME_ARRAY>_QNT - количество регистров в массиве
При добавлении новых массивов регистров, необходимо их добавить в функцию MB_DefineRegistersAddress
if(MB_Check_Address_For_Arr(Addr, Qnt, R_<NEW_ARRAY>_ADDR, R_<NEW_ARRAY>_QNT) == NO_ERRORS)
{
*pRegs = MB_Set_Register_Ptr(&<NEW_ARRAY>, Addr); // начало регистров хранения/входных
}
@endverbatim
* @{
*/
/**
* @brief Регистры хранения
*/
/**
* @brief Определить размер структуры в регистрах модбас (16-бит слова)
*/
#define mb_sizeof(_struct_) (sizeof(_struct_)/sizeof(uint16_t))
/**
* @brief Определить количество резервных байт для выравнивания
* @details Выравнивает так, чтобы количество регистров в _struct_ и reserved равнялось _align_.
*
*/
#define mb_fill_rsv(_align_, _struct_) ((_align_ > mb_sizeof(_struct_)) ? (_align_ - mb_sizeof(_struct_)) : 0)
typedef __PACKED_STRUCT//MB_DataInRegsTypeDef
{
uint16_t sens_Temp[MAX_SENSE];
uint16_t reserve[mb_fill_rsv(1000, uint16_t[MAX_SENSE])];
DS18B20_Drv_t ID;
uint16_t reserve1[mb_fill_rsv(200, DS18B20_Drv_t)];
uint16_t num_Tsens;
} MB_DataInRegsTypeDef;
/**
* @brief Входные регистры
*/
typedef __PACKED_STRUCT //MB_DataInRegsTypeDef
{
uint16_t set_Temp[MAX_SENSE];
uint16_t reserve[mb_fill_rsv(100, uint16_t[MAX_SENSE])];
uint16_t set_hyst[MAX_SENSE];
uint16_t reserve1[mb_fill_rsv(100, uint16_t[MAX_SENSE])];
} MB_DataHoldRegsTypeDef;
/** MODBUS_DATA_RERISTERS_DEFINES
* @}
*/
//----------------DEFINES FOR COILS-----------------
/**
* @addtogroup MODBUS_DATA_COILS_DEFINES
* @ingroup MODBUS_DATA
* @brief Defines for coils
@verbatim
Структура дефайна
Для массивов коилов:
C_<NAME_ARRAY>_ADDR - модбас адресс первого коила в массиве
C_<NAME_ARRAY>_QNT - количество коилов в массиве (минимум 16)
При добавлении новых массивов коилов, необходимо их добавить в функцию MB_DefineCoilsAddress
if(MB_Check_Address_For_Arr(Addr, Qnt, C_<NEW_ARRAY>_ADDR, C_<NEW_ARRAY>_QNT) == NO_ERRORS)
{
*pCoils = MB_Set_Coil_Reg_Ptr(&<NEW_ARRAY>, Addr);
}
@endverbatim
* @{
*/
/**
* @brief Коилы
* @details Желательно с помощью reserved делать стркутуру кратной 16-битам
*/
typedef union
{
__PACKED_STRUCT
{
unsigned state_val_01: 1;
unsigned state_val_02: 1;
unsigned state_val_03: 1;
unsigned state_val_04: 1;
unsigned state_val_05: 1;
unsigned state_val_06: 1;
unsigned state_val_07: 1;
unsigned state_val_08: 1;
unsigned state_val_09: 1;
unsigned state_val_10: 1;
unsigned state_val_11: 1;
unsigned state_val_12: 1;
unsigned state_val_13: 1;
unsigned state_val_14: 1;
unsigned state_val_15: 1;
unsigned state_val_16: 1;
} state_val_bit;
uint16_t all;
} word;
typedef union
{
__PACKED_STRUCT
{
unsigned Temp1_relay_isOn : 1;
unsigned Temp2_relay_isOn : 1;
unsigned Temp3_relay_isOn : 1;
unsigned Temp4_relay_isOn : 1;
unsigned Temp5_relay_isOn : 1;
unsigned Temp6_relay_isOn : 1;
unsigned Temp7_relay_isOn : 1;
unsigned Temp8_relay_isOn : 1;
unsigned Temp9_relay_isOn : 1;
unsigned Temp10_relay_isOn : 1;
unsigned Temp11_relay_isOn : 1;
unsigned Temp12_relay_isOn : 1;
unsigned Temp13_relay_isOn : 1;
unsigned Temp14_relay_isOn : 1;
unsigned Temp15_relay_isOn : 1;
unsigned Temp16_relay_isOn : 1;
} state_val_bit;
uint16_t all;
} RELAY_Struct;
typedef union
{
__PACKED_STRUCT
{
unsigned Temp1_isConnected : 1;
unsigned Temp2_isConnected : 1;
unsigned Temp3_isConnected : 1;
unsigned Temp4_isConnected : 1;
unsigned Temp5_isConnected : 1;
unsigned Temp6_isConnected : 1;
unsigned Temp7_isConnected : 1;
unsigned Temp8_isConnected : 1;
unsigned Temp9_isConnected : 1;
unsigned Temp10_isConnected : 1;
unsigned Temp11_isConnected : 1;
unsigned Temp12_isConnected : 1;
unsigned Temp13_isConnected : 1;
unsigned Temp14_isConnected : 1;
unsigned Temp15_isConnected : 1;
unsigned Temp16_isConnected : 1;
} state_val_bit;
uint16_t all;
} STATUS_TSENS;
typedef __PACKED_STRUCT
{
int temp ;
unsigned Temp_relay_on : 1;
unsigned Temp_relay_off : 1;
unsigned is_connect: 1;
} Temp_sens;
extern Temp_sens temp_sens ;
typedef __PACKED_STRUCT
{
word coils[3]; //48
uint16_t reserve1[mb_fill_rsv(128 / 16, word[3])];
STATUS_TSENS status_tSens[MAX_SENSE / 16]; //32
uint16_t reserve2[mb_fill_rsv(128 / 16, STATUS_TSENS[MAX_SENSE / 16])];
RELAY_Struct relay_struct[MAX_SENSE / 16 * 2]; //16 2 реле на 1 датчик
uint16_t reserve3[mb_fill_rsv(128 / 16, RELAY_Struct[MAX_SENSE / 16 * 2])];
unsigned init_param: 1; //384
unsigned init_Tsens: 1; //385
unsigned Save_Param_to_Flash: 1; //386
unsigned reserved2: 13;
} MB_DataCoilsTypeDef;
/** MODBUS_DATA_COILS_DEFINES
* @}
*/
//-----------MODBUS DEVICE DATA SETTING-------------
// MODBUS DATA STRUCTTURE
/**
* @brief Структура со всеми регистрами и коилами модбас
* @ingroup MODBUS_DATA
*/
typedef struct // tester modbus data
{
MB_DataInRegsTypeDef InRegs; ///< Modbus input registers @ref MB_DataInRegsTypeDef
MB_DataCoilsTypeDef Coils; ///< Modbus coils @ref MB_DataCoilsTypeDef
MB_DataHoldRegsTypeDef HoldRegs; ///< Modbus holding registers @ref MB_DataHoldRegsTypeDef
} MB_DataStructureTypeDef;
extern MB_DataStructureTypeDef MB_DATA;
#endif //_MODBUS_DATA_H_
/////////////////////////////////////////////////////////////
///////////////////////TEMP/OUTDATE/OTHER////////////////////

431
john103C6T6/logs/backup.lvm Normal file
View File

@ -0,0 +1,431 @@
LabVIEW Measurement
Writer_Version 2
Reader_Version 2
Separator Tab
Decimal_Separator ,
Multi_Headings Yes
X_Columns One
Time_Pref Absolute
Operator z
Date 2025/11/13
Time 15:16:08,040531158447265625
***End_of_Header***
Channels 1
Samples 1
Date 2025/11/13
Time 15:16:08,040531158447265625
X_Dimension Time
X0 0,0000000000000000E+0
Delta_X 1,000000
***End_of_Header***
X_Value Untitled Comment
0,000000 28,000000 temp1
Channels 1
Samples 1
Date 2025/11/13
Time 15:16:08,151824951171875
X_Dimension Time
X0 1,1129379272460937E-1
Delta_X 1,000000
***End_of_Header***
X_Value Untitled Comment
0,111294 28,000000 temp1
Channels 1
Samples 1
Date 2025/11/13
Time 15:16:09,1365952491760253906
X_Dimension Time
X0 1,0960640907287598E+0
Delta_X 1,000000
***End_of_Header***
X_Value Untitled Comment
1,096064 28,000000 temp1
Channels 1
Samples 1
Date 2025/11/13
Time 15:16:10,1405615806579589844
X_Dimension Time
X0 2,1000304222106934E+0
Delta_X 1,000000
***End_of_Header***
X_Value Untitled Comment
2,100030 28,000000 temp1
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