обмен перенес на usart2
на новой плате изолированный 485 передатчик на uart2 . на type-c сидит uart1
This commit is contained in:
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/*------------------------------------------------------------------------------
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* MDK - Component ::Event Recorder
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* Copyright (c) 2016 ARM Germany GmbH. All rights reserved.
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*------------------------------------------------------------------------------
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* Name: EventRecorderConf.h
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* Purpose: Event Recorder Configuration
|
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* Rev.: V1.0.0
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*----------------------------------------------------------------------------*/
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//-------- <<< Use Configuration Wizard in Context Menu >>> --------------------
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// <h>Event Recorder
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// <o>Number of Records
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// <8=>8 <16=>16 <32=>32 <64=>64 <128=>128 <256=>256 <512=>512 <1024=>1024
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// <2048=>2048 <4096=>4096 <8192=>8192 <16384=>16384 <32768=>32768
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// <65536=>65536 <131072=>131072 <262144=>262144 <524288=>524288
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// <1048576=>1048576
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// <i>Configure size of Event Record Buffer (each record is 16 bytes)
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// <i>Must be 2^n (min=8, max=1048576)
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#define EVENT_RECORD_COUNT 64U
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// <o>Time Stamp Source
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// <0=> DWT Cycle Counter <1=> SysTick
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// <3=> User Timer (Normal Reset) <4=> User Timer (Power-On Reset)
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// <i>Selects source for 32-bit time stamp
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#define EVENT_TIMESTAMP_SOURCE 1
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// <h>SysTick Configuration
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// <i>Configure values when Time Stamp Source is set to SysTick
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// <o>SysTick Input Clock Frequency [Hz] <1-1000000000>
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// <i>Defines SysTick input clock (typical identical with processor clock)
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#define SYSTICK_CLOCK 100000000U
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// <o>SysTick Interrupt Period [us] <1-1000000000>
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// <i>Defines time period of the SysTick timer interrupt
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#define SYSTICK_PERIOD_US 1000U
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// </h>
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// </h>
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//------------- <<< end of configuration section >>> ---------------------------
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@@ -0,0 +1,24 @@
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/*
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* Auto generated Run-Time-Environment Component Configuration File
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* *** Do not modify ! ***
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*
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* Project: 'arm_nnexamples_cifar10'
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* Target: 'ARMCM0'
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*/
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#ifndef RTE_COMPONENTS_H
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#define RTE_COMPONENTS_H
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/*
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* Define the Device Header File:
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*/
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#define CMSIS_device_header "ARMCM0.h"
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#define RTE_Compiler_EventRecorder
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#define RTE_Compiler_EventRecorder_DAP
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#define RTE_Compiler_IO_STDOUT /* Compiler I/O: STDOUT */
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#define RTE_Compiler_IO_STDOUT_EVR /* Compiler I/O: STDOUT EVR */
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#endif /* RTE_COMPONENTS_H */
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@@ -0,0 +1,22 @@
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/*
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* Auto generated Run-Time-Environment Component Configuration File
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* *** Do not modify ! ***
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||||
*
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* Project: 'arm_nnexamples_cifar10'
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* Target: 'ARMCM3'
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*/
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#ifndef RTE_COMPONENTS_H
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#define RTE_COMPONENTS_H
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/*
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* Define the Device Header File:
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*/
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#define CMSIS_device_header "ARMCM3.h"
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#define RTE_Compiler_IO_STDOUT /* Compiler I/O: STDOUT */
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#define RTE_Compiler_IO_STDOUT_ITM /* Compiler I/O: STDOUT ITM */
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#endif /* RTE_COMPONENTS_H */
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@@ -0,0 +1,22 @@
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/*
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* Auto generated Run-Time-Environment Component Configuration File
|
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* *** Do not modify ! ***
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*
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* Project: 'arm_nnexamples_cifar10'
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* Target: 'ARMCM4_FP'
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*/
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#ifndef RTE_COMPONENTS_H
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#define RTE_COMPONENTS_H
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/*
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* Define the Device Header File:
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*/
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#define CMSIS_device_header "ARMCM4_FP.h"
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#define RTE_Compiler_IO_STDOUT /* Compiler I/O: STDOUT */
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#define RTE_Compiler_IO_STDOUT_ITM /* Compiler I/O: STDOUT ITM */
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#endif /* RTE_COMPONENTS_H */
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@@ -0,0 +1,22 @@
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/*
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* Auto generated Run-Time-Environment Component Configuration File
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* *** Do not modify ! ***
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*
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* Project: 'arm_nnexamples_cifar10'
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* Target: 'ARMCM7_SP'
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*/
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#ifndef RTE_COMPONENTS_H
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#define RTE_COMPONENTS_H
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/*
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* Define the Device Header File:
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*/
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#define CMSIS_device_header "ARMCM7_SP.h"
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#define RTE_Compiler_IO_STDOUT /* Compiler I/O: STDOUT */
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#define RTE_Compiler_IO_STDOUT_ITM /* Compiler I/O: STDOUT ITM */
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#endif /* RTE_COMPONENTS_H */
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@@ -0,0 +1,196 @@
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/* ----------------------------------------------------------------------
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* Copyright (C) 2010-2018 Arm Limited. All rights reserved.
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*
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*
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* Project: CMSIS NN Library
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* Title: arm_nnexamples_cifar10.cpp
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*
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* Description: Convolutional Neural Network Example
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*
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* Target Processor: Cortex-M4/Cortex-M7
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* - Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* - Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* - Neither the name of Arm LIMITED nor the names of its contributors
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* may be used to endorse or promote products derived from this
|
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* software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
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||||
* -------------------------------------------------------------------- */
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/**
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* @ingroup groupExamples
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*/
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/**
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* @defgroup CNNExample Convolutional Neural Network Example
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*
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* \par Description:
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* \par
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* Demonstrates a convolutional neural network (CNN) example with the use of convolution,
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* ReLU activation, pooling and fully-connected functions.
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*
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* \par Model definition:
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* \par
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* The CNN used in this example is based on CIFAR-10 example from Caffe [1].
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* The neural network consists
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* of 3 convolution layers interspersed by ReLU activation and max pooling layers, followed by a
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* fully-connected layer at the end. The input to the network is a 32x32 pixel color image, which will
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* be classified into one of the 10 output classes.
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* This example model implementation needs 32.3 KB to store weights, 40 KB for activations and
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* 3.1 KB for storing the \c im2col data.
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*
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* \image html CIFAR10_CNN.gif "Neural Network model definition"
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*
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* \par Variables Description:
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* \par
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* \li \c conv1_wt, \c conv2_wt, \c conv3_wt are convolution layer weight matrices
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* \li \c conv1_bias, \c conv2_bias, \c conv3_bias are convolution layer bias arrays
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* \li \c ip1_wt, ip1_bias point to fully-connected layer weights and biases
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* \li \c input_data points to the input image data
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* \li \c output_data points to the classification output
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* \li \c col_buffer is a buffer to store the \c im2col output
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* \li \c scratch_buffer is used to store the activation data (intermediate layer outputs)
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*
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* \par CMSIS DSP Software Library Functions Used:
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* \par
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* - arm_convolve_HWC_q7_RGB()
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* - arm_convolve_HWC_q7_fast()
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* - arm_relu_q7()
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* - arm_maxpool_q7_HWC()
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* - arm_avepool_q7_HWC()
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* - arm_fully_connected_q7_opt()
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* - arm_fully_connected_q7()
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*
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* <b> Refer </b>
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* \link arm_nnexamples_cifar10.cpp \endlink
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*
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* \par [1] https://github.com/BVLC/caffe
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*/
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#include <stdint.h>
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#include <stdio.h>
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#include "arm_math.h"
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#include "arm_nnexamples_cifar10_parameter.h"
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#include "arm_nnexamples_cifar10_weights.h"
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#include "arm_nnfunctions.h"
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#include "arm_nnexamples_cifar10_inputs.h"
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#ifdef _RTE_
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#include "RTE_Components.h"
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#ifdef RTE_Compiler_EventRecorder
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#include "EventRecorder.h"
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#endif
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#endif
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// include the input and weights
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static q7_t conv1_wt[CONV1_IM_CH * CONV1_KER_DIM * CONV1_KER_DIM * CONV1_OUT_CH] = CONV1_WT;
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static q7_t conv1_bias[CONV1_OUT_CH] = CONV1_BIAS;
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static q7_t conv2_wt[CONV2_IM_CH * CONV2_KER_DIM * CONV2_KER_DIM * CONV2_OUT_CH] = CONV2_WT;
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static q7_t conv2_bias[CONV2_OUT_CH] = CONV2_BIAS;
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static q7_t conv3_wt[CONV3_IM_CH * CONV3_KER_DIM * CONV3_KER_DIM * CONV3_OUT_CH] = CONV3_WT;
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static q7_t conv3_bias[CONV3_OUT_CH] = CONV3_BIAS;
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static q7_t ip1_wt[IP1_DIM * IP1_OUT] = IP1_WT;
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static q7_t ip1_bias[IP1_OUT] = IP1_BIAS;
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/* Here the image_data should be the raw uint8 type RGB image in [RGB, RGB, RGB ... RGB] format */
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uint8_t image_data[CONV1_IM_CH * CONV1_IM_DIM * CONV1_IM_DIM] = IMG_DATA;
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q7_t output_data[IP1_OUT];
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//vector buffer: max(im2col buffer,average pool buffer, fully connected buffer)
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q7_t col_buffer[2 * 5 * 5 * 32 * 2];
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q7_t scratch_buffer[32 * 32 * 10 * 4];
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int main()
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{
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#ifdef RTE_Compiler_EventRecorder
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EventRecorderInitialize (EventRecordAll, 1); // initialize and start Event Recorder
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#endif
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printf("start execution\n");
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/* start the execution */
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q7_t *img_buffer1 = scratch_buffer;
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q7_t *img_buffer2 = img_buffer1 + 32 * 32 * 32;
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/* input pre-processing */
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int mean_data[3] = INPUT_MEAN_SHIFT;
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unsigned int scale_data[3] = INPUT_RIGHT_SHIFT;
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for (int i=0;i<32*32*3; i+=3) {
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img_buffer2[i] = (q7_t)__SSAT( ((((int)image_data[i] - mean_data[0])<<7) + (0x1<<(scale_data[0]-1)))
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>> scale_data[0], 8);
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img_buffer2[i+1] = (q7_t)__SSAT( ((((int)image_data[i+1] - mean_data[1])<<7) + (0x1<<(scale_data[1]-1)))
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>> scale_data[1], 8);
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img_buffer2[i+2] = (q7_t)__SSAT( ((((int)image_data[i+2] - mean_data[2])<<7) + (0x1<<(scale_data[2]-1)))
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>> scale_data[2], 8);
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}
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// conv1 img_buffer2 -> img_buffer1
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arm_convolve_HWC_q7_RGB(img_buffer2, CONV1_IM_DIM, CONV1_IM_CH, conv1_wt, CONV1_OUT_CH, CONV1_KER_DIM, CONV1_PADDING,
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CONV1_STRIDE, conv1_bias, CONV1_BIAS_LSHIFT, CONV1_OUT_RSHIFT, img_buffer1, CONV1_OUT_DIM,
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(q15_t *) col_buffer, NULL);
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arm_relu_q7(img_buffer1, CONV1_OUT_DIM * CONV1_OUT_DIM * CONV1_OUT_CH);
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// pool1 img_buffer1 -> img_buffer2
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arm_maxpool_q7_HWC(img_buffer1, CONV1_OUT_DIM, CONV1_OUT_CH, POOL1_KER_DIM,
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POOL1_PADDING, POOL1_STRIDE, POOL1_OUT_DIM, NULL, img_buffer2);
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// conv2 img_buffer2 -> img_buffer1
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arm_convolve_HWC_q7_fast(img_buffer2, CONV2_IM_DIM, CONV2_IM_CH, conv2_wt, CONV2_OUT_CH, CONV2_KER_DIM,
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CONV2_PADDING, CONV2_STRIDE, conv2_bias, CONV2_BIAS_LSHIFT, CONV2_OUT_RSHIFT, img_buffer1,
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CONV2_OUT_DIM, (q15_t *) col_buffer, NULL);
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arm_relu_q7(img_buffer1, CONV2_OUT_DIM * CONV2_OUT_DIM * CONV2_OUT_CH);
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// pool2 img_buffer1 -> img_buffer2
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arm_maxpool_q7_HWC(img_buffer1, CONV2_OUT_DIM, CONV2_OUT_CH, POOL2_KER_DIM,
|
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POOL2_PADDING, POOL2_STRIDE, POOL2_OUT_DIM, col_buffer, img_buffer2);
|
||||
|
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// conv3 img_buffer2 -> img_buffer1
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arm_convolve_HWC_q7_fast(img_buffer2, CONV3_IM_DIM, CONV3_IM_CH, conv3_wt, CONV3_OUT_CH, CONV3_KER_DIM,
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CONV3_PADDING, CONV3_STRIDE, conv3_bias, CONV3_BIAS_LSHIFT, CONV3_OUT_RSHIFT, img_buffer1,
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CONV3_OUT_DIM, (q15_t *) col_buffer, NULL);
|
||||
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arm_relu_q7(img_buffer1, CONV3_OUT_DIM * CONV3_OUT_DIM * CONV3_OUT_CH);
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// pool3 img_buffer-> img_buffer2
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arm_maxpool_q7_HWC(img_buffer1, CONV3_OUT_DIM, CONV3_OUT_CH, POOL3_KER_DIM,
|
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POOL3_PADDING, POOL3_STRIDE, POOL3_OUT_DIM, col_buffer, img_buffer2);
|
||||
|
||||
arm_fully_connected_q7_opt(img_buffer2, ip1_wt, IP1_DIM, IP1_OUT, IP1_BIAS_LSHIFT, IP1_OUT_RSHIFT, ip1_bias,
|
||||
output_data, (q15_t *) img_buffer1);
|
||||
|
||||
arm_softmax_q7(output_data, 10, output_data);
|
||||
|
||||
for (int i = 0; i < 10; i++)
|
||||
{
|
||||
printf("%d: %d\n", i, output_data[i]);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
File diff suppressed because one or more lines are too long
@@ -0,0 +1,43 @@
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#define CONV1_IM_DIM 32
|
||||
#define CONV1_IM_CH 3
|
||||
#define CONV1_KER_DIM 5
|
||||
#define CONV1_PADDING 2
|
||||
#define CONV1_STRIDE 1
|
||||
#define CONV1_OUT_CH 32
|
||||
#define CONV1_OUT_DIM 32
|
||||
|
||||
#define POOL1_KER_DIM 3
|
||||
#define POOL1_STRIDE 2
|
||||
#define POOL1_PADDING 0
|
||||
#define POOL1_OUT_DIM 16
|
||||
|
||||
#define CONV2_IM_DIM 16
|
||||
#define CONV2_IM_CH 32
|
||||
#define CONV2_KER_DIM 5
|
||||
#define CONV2_PADDING 2
|
||||
#define CONV2_STRIDE 1
|
||||
#define CONV2_OUT_CH 16
|
||||
#define CONV2_OUT_DIM 16
|
||||
|
||||
#define POOL2_KER_DIM 3
|
||||
#define POOL2_STRIDE 2
|
||||
#define POOL2_PADDING 0
|
||||
#define POOL2_OUT_DIM 8
|
||||
|
||||
#define CONV3_IM_DIM 8
|
||||
#define CONV3_IM_CH 16
|
||||
#define CONV3_KER_DIM 5
|
||||
#define CONV3_PADDING 2
|
||||
#define CONV3_STRIDE 1
|
||||
#define CONV3_OUT_CH 32
|
||||
#define CONV3_OUT_DIM 8
|
||||
|
||||
#define POOL3_KER_DIM 3
|
||||
#define POOL3_STRIDE 2
|
||||
#define POOL3_PADDING 0
|
||||
#define POOL3_OUT_DIM 4
|
||||
|
||||
#define IP1_DIM 4*4*32
|
||||
#define IP1_IM_DIM 4
|
||||
#define IP1_IM_CH 32
|
||||
#define IP1_OUT 10
|
||||
File diff suppressed because one or more lines are too long
@@ -0,0 +1,4 @@
|
||||
CMSIS NN Lib example arm_nnexample_cifar10 for
|
||||
Cortex-M4 and Cortex-M7.
|
||||
|
||||
The example is configured for uVision Simulator.
|
||||
@@ -0,0 +1,44 @@
|
||||
/*------------------------------------------------------------------------------
|
||||
* MDK - Component ::Event Recorder
|
||||
* Copyright (c) 2016 ARM Germany GmbH. All rights reserved.
|
||||
*------------------------------------------------------------------------------
|
||||
* Name: EventRecorderConf.h
|
||||
* Purpose: Event Recorder Configuration
|
||||
* Rev.: V1.0.0
|
||||
*----------------------------------------------------------------------------*/
|
||||
|
||||
//-------- <<< Use Configuration Wizard in Context Menu >>> --------------------
|
||||
|
||||
// <h>Event Recorder
|
||||
|
||||
// <o>Number of Records
|
||||
// <8=>8 <16=>16 <32=>32 <64=>64 <128=>128 <256=>256 <512=>512 <1024=>1024
|
||||
// <2048=>2048 <4096=>4096 <8192=>8192 <16384=>16384 <32768=>32768
|
||||
// <65536=>65536 <131072=>131072 <262144=>262144 <524288=>524288
|
||||
// <1048576=>1048576
|
||||
// <i>Configure size of Event Record Buffer (each record is 16 bytes)
|
||||
// <i>Must be 2^n (min=8, max=1048576)
|
||||
#define EVENT_RECORD_COUNT 64U
|
||||
|
||||
// <o>Time Stamp Source
|
||||
// <0=> DWT Cycle Counter <1=> SysTick
|
||||
// <3=> User Timer (Normal Reset) <4=> User Timer (Power-On Reset)
|
||||
// <i>Selects source for 32-bit time stamp
|
||||
#define EVENT_TIMESTAMP_SOURCE 1
|
||||
|
||||
// <h>SysTick Configuration
|
||||
// <i>Configure values when Time Stamp Source is set to SysTick
|
||||
|
||||
// <o>SysTick Input Clock Frequency [Hz] <1-1000000000>
|
||||
// <i>Defines SysTick input clock (typical identical with processor clock)
|
||||
#define SYSTICK_CLOCK 100000000U
|
||||
|
||||
// <o>SysTick Interrupt Period [us] <1-1000000000>
|
||||
// <i>Defines time period of the SysTick timer interrupt
|
||||
#define SYSTICK_PERIOD_US 1000U
|
||||
|
||||
// </h>
|
||||
|
||||
// </h>
|
||||
|
||||
//------------- <<< end of configuration section >>> ---------------------------
|
||||
@@ -0,0 +1,24 @@
|
||||
|
||||
/*
|
||||
* Auto generated Run-Time-Environment Component Configuration File
|
||||
* *** Do not modify ! ***
|
||||
*
|
||||
* Project: 'arm_nnexamples_gru'
|
||||
* Target: 'ARMCM0'
|
||||
*/
|
||||
|
||||
#ifndef RTE_COMPONENTS_H
|
||||
#define RTE_COMPONENTS_H
|
||||
|
||||
|
||||
/*
|
||||
* Define the Device Header File:
|
||||
*/
|
||||
#define CMSIS_device_header "ARMCM0.h"
|
||||
|
||||
#define RTE_Compiler_EventRecorder
|
||||
#define RTE_Compiler_EventRecorder_DAP
|
||||
#define RTE_Compiler_IO_STDOUT /* Compiler I/O: STDOUT */
|
||||
#define RTE_Compiler_IO_STDOUT_EVR /* Compiler I/O: STDOUT EVR */
|
||||
|
||||
#endif /* RTE_COMPONENTS_H */
|
||||
@@ -0,0 +1,22 @@
|
||||
|
||||
/*
|
||||
* Auto generated Run-Time-Environment Component Configuration File
|
||||
* *** Do not modify ! ***
|
||||
*
|
||||
* Project: 'arm_nnexamples_gru'
|
||||
* Target: 'ARMCM3'
|
||||
*/
|
||||
|
||||
#ifndef RTE_COMPONENTS_H
|
||||
#define RTE_COMPONENTS_H
|
||||
|
||||
|
||||
/*
|
||||
* Define the Device Header File:
|
||||
*/
|
||||
#define CMSIS_device_header "ARMCM3.h"
|
||||
|
||||
#define RTE_Compiler_IO_STDOUT /* Compiler I/O: STDOUT */
|
||||
#define RTE_Compiler_IO_STDOUT_ITM /* Compiler I/O: STDOUT ITM */
|
||||
|
||||
#endif /* RTE_COMPONENTS_H */
|
||||
@@ -0,0 +1,22 @@
|
||||
|
||||
/*
|
||||
* Auto generated Run-Time-Environment Component Configuration File
|
||||
* *** Do not modify ! ***
|
||||
*
|
||||
* Project: 'arm_nnexamples_gru'
|
||||
* Target: 'ARMCM4_FP'
|
||||
*/
|
||||
|
||||
#ifndef RTE_COMPONENTS_H
|
||||
#define RTE_COMPONENTS_H
|
||||
|
||||
|
||||
/*
|
||||
* Define the Device Header File:
|
||||
*/
|
||||
#define CMSIS_device_header "ARMCM4_FP.h"
|
||||
|
||||
#define RTE_Compiler_IO_STDOUT /* Compiler I/O: STDOUT */
|
||||
#define RTE_Compiler_IO_STDOUT_ITM /* Compiler I/O: STDOUT ITM */
|
||||
|
||||
#endif /* RTE_COMPONENTS_H */
|
||||
@@ -0,0 +1,22 @@
|
||||
|
||||
/*
|
||||
* Auto generated Run-Time-Environment Component Configuration File
|
||||
* *** Do not modify ! ***
|
||||
*
|
||||
* Project: 'arm_nnexamples_gru'
|
||||
* Target: 'ARMCM7_SP'
|
||||
*/
|
||||
|
||||
#ifndef RTE_COMPONENTS_H
|
||||
#define RTE_COMPONENTS_H
|
||||
|
||||
|
||||
/*
|
||||
* Define the Device Header File:
|
||||
*/
|
||||
#define CMSIS_device_header "ARMCM7_SP.h"
|
||||
|
||||
#define RTE_Compiler_IO_STDOUT /* Compiler I/O: STDOUT */
|
||||
#define RTE_Compiler_IO_STDOUT_ITM /* Compiler I/O: STDOUT ITM */
|
||||
|
||||
#endif /* RTE_COMPONENTS_H */
|
||||
@@ -0,0 +1,221 @@
|
||||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2018 Arm Limited. All rights reserved.
|
||||
*
|
||||
*
|
||||
* Project: CMSIS NN Library
|
||||
* Title: arm_nnexamples_gru.cpp
|
||||
*
|
||||
* Description: Gated Recurrent Unit Example
|
||||
*
|
||||
* Target Processor: Cortex-M4/Cortex-M7
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* - Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* - Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* - Neither the name of Arm LIMITED nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this
|
||||
* software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* -------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @ingroup groupExamples
|
||||
*/
|
||||
|
||||
/**
|
||||
* @defgroup GRUExample Gated Recurrent Unit Example
|
||||
*
|
||||
* \par Description:
|
||||
* \par
|
||||
* Demonstrates a gated recurrent unit (GRU) example with the use of fully-connected,
|
||||
* Tanh/Sigmoid activation functions.
|
||||
*
|
||||
* \par Model definition:
|
||||
* \par
|
||||
* GRU is a type of recurrent neural network (RNN). It contains two sigmoid gates and one hidden
|
||||
* state.
|
||||
* \par
|
||||
* The computation can be summarized as:
|
||||
* <pre>z[t] = sigmoid( W_z ⋅ {h[t-1],x[t]} )
|
||||
* r[t] = sigmoid( W_r ⋅ {h[t-1],x[t]} )
|
||||
* n[t] = tanh( W_n ⋅ [r[t] × {h[t-1], x[t]} )
|
||||
* h[t] = (1 - z[t]) × h[t-1] + z[t] × n[t] </pre>
|
||||
* \image html GRU.gif "Gate Recurrent Unit Diagram"
|
||||
*
|
||||
* \par Variables Description:
|
||||
* \par
|
||||
* \li \c update_gate_weights, \c reset_gate_weights, \c hidden_state_weights are weights corresponding to update gate (W_z), reset gate (W_r), and hidden state (W_n).
|
||||
* \li \c update_gate_bias, \c reset_gate_bias, \c hidden_state_bias are layer bias arrays
|
||||
* \li \c test_input1, \c test_input2, \c test_history are the inputs and initial history
|
||||
*
|
||||
* \par
|
||||
* The buffer is allocated as:
|
||||
* \par
|
||||
* | reset | input | history | update | hidden_state |
|
||||
* \par
|
||||
* In this way, the concatination is automatically done since (reset, input) and (input, history)
|
||||
* are physically concatinated in memory.
|
||||
* \par
|
||||
* The ordering of the weight matrix should be adjusted accordingly.
|
||||
*
|
||||
*
|
||||
*
|
||||
* \par CMSIS DSP Software Library Functions Used:
|
||||
* \par
|
||||
* - arm_fully_connected_mat_q7_vec_q15_opt()
|
||||
* - arm_nn_activations_direct_q15()
|
||||
* - arm_mult_q15()
|
||||
* - arm_offset_q15()
|
||||
* - arm_sub_q15()
|
||||
* - arm_copy_q15()
|
||||
*
|
||||
* <b> Refer </b>
|
||||
* \link arm_nnexamples_gru.cpp \endlink
|
||||
*
|
||||
*/
|
||||
|
||||
#include <stdio.h>
|
||||
#include <stdlib.h>
|
||||
#include <math.h>
|
||||
#include "arm_nnexamples_gru_test_data.h"
|
||||
#include "arm_math.h"
|
||||
#include "arm_nnfunctions.h"
|
||||
|
||||
#ifdef _RTE_
|
||||
#include "RTE_Components.h"
|
||||
#ifdef RTE_Compiler_EventRecorder
|
||||
#include "EventRecorder.h"
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#define DIM_HISTORY 32
|
||||
#define DIM_INPUT 32
|
||||
#define DIM_VEC 64
|
||||
|
||||
#define USE_X4
|
||||
|
||||
#ifndef USE_X4
|
||||
static q7_t update_gate_weights[DIM_VEC * DIM_HISTORY] = UPDATE_GATE_WEIGHT_X2;
|
||||
static q7_t reset_gate_weights[DIM_VEC * DIM_HISTORY] = RESET_GATE_WEIGHT_X2;
|
||||
static q7_t hidden_state_weights[DIM_VEC * DIM_HISTORY] = HIDDEN_STATE_WEIGHT_X2;
|
||||
#else
|
||||
static q7_t update_gate_weights[DIM_VEC * DIM_HISTORY] = UPDATE_GATE_WEIGHT_X4;
|
||||
static q7_t reset_gate_weights[DIM_VEC * DIM_HISTORY] = RESET_GATE_WEIGHT_X4;
|
||||
static q7_t hidden_state_weights[DIM_VEC * DIM_HISTORY] = HIDDEN_STATE_WEIGHT_X4;
|
||||
#endif
|
||||
|
||||
static q7_t update_gate_bias[DIM_HISTORY] = UPDATE_GATE_BIAS;
|
||||
static q7_t reset_gate_bias[DIM_HISTORY] = RESET_GATE_BIAS;
|
||||
static q7_t hidden_state_bias[DIM_HISTORY] = HIDDEN_STATE_BIAS;
|
||||
|
||||
static q15_t test_input1[DIM_INPUT] = INPUT_DATA1;
|
||||
static q15_t test_input2[DIM_INPUT] = INPUT_DATA2;
|
||||
static q15_t test_history[DIM_HISTORY] = HISTORY_DATA;
|
||||
|
||||
q15_t scratch_buffer[DIM_HISTORY * 4 + DIM_INPUT];
|
||||
|
||||
void gru_example(q15_t * scratch_input, uint16_t input_size, uint16_t history_size,
|
||||
q7_t * weights_update, q7_t * weights_reset, q7_t * weights_hidden_state,
|
||||
q7_t * bias_update, q7_t * bias_reset, q7_t * bias_hidden_state)
|
||||
{
|
||||
q15_t *reset = scratch_input;
|
||||
q15_t *input = scratch_input + history_size;
|
||||
q15_t *history = scratch_input + history_size + input_size;
|
||||
q15_t *update = scratch_input + 2 * history_size + input_size;
|
||||
q15_t *hidden_state = scratch_input + 3 * history_size + input_size;
|
||||
|
||||
// reset gate calculation
|
||||
// the range of the output can be adjusted with bias_shift and output_shift
|
||||
#ifndef USE_X4
|
||||
arm_fully_connected_mat_q7_vec_q15(input, weights_reset, input_size + history_size, history_size, 0, 15, bias_reset,
|
||||
reset, NULL);
|
||||
#else
|
||||
arm_fully_connected_mat_q7_vec_q15_opt(input, weights_reset, input_size + history_size, history_size, 0, 15,
|
||||
bias_reset, reset, NULL);
|
||||
#endif
|
||||
// sigmoid function, the size of the integer bit-width should be consistent with out_shift
|
||||
arm_nn_activations_direct_q15(reset, history_size, 0, ARM_SIGMOID);
|
||||
arm_mult_q15(history, reset, reset, history_size);
|
||||
|
||||
// update gate calculation
|
||||
// the range of the output can be adjusted with bias_shift and output_shift
|
||||
#ifndef USE_X4
|
||||
arm_fully_connected_mat_q7_vec_q15(input, weights_update, input_size + history_size, history_size, 0, 15,
|
||||
bias_update, update, NULL);
|
||||
#else
|
||||
arm_fully_connected_mat_q7_vec_q15_opt(input, weights_update, input_size + history_size, history_size, 0, 15,
|
||||
bias_update, update, NULL);
|
||||
#endif
|
||||
|
||||
// sigmoid function, the size of the integer bit-width should be consistent with out_shift
|
||||
arm_nn_activations_direct_q15(update, history_size, 0, ARM_SIGMOID);
|
||||
|
||||
// hidden state calculation
|
||||
#ifndef USE_X4
|
||||
arm_fully_connected_mat_q7_vec_q15(reset, weights_hidden_state, input_size + history_size, history_size, 0, 15,
|
||||
bias_hidden_state, hidden_state, NULL);
|
||||
#else
|
||||
arm_fully_connected_mat_q7_vec_q15_opt(reset, weights_hidden_state, input_size + history_size, history_size, 0, 15,
|
||||
bias_hidden_state, hidden_state, NULL);
|
||||
#endif
|
||||
|
||||
// tanh function, the size of the integer bit-width should be consistent with out_shift
|
||||
arm_nn_activations_direct_q15(hidden_state, history_size, 0, ARM_TANH);
|
||||
arm_mult_q15(update, hidden_state, hidden_state, history_size);
|
||||
|
||||
// we calculate z - 1 here
|
||||
// so final addition becomes substraction
|
||||
arm_offset_q15(update, 0x8000, update, history_size);
|
||||
// multiply history
|
||||
arm_mult_q15(history, update, update, history_size);
|
||||
// calculate history_out
|
||||
arm_sub_q15(hidden_state, update, history, history_size);
|
||||
|
||||
return;
|
||||
}
|
||||
|
||||
int main()
|
||||
{
|
||||
#ifdef RTE_Compiler_EventRecorder
|
||||
EventRecorderInitialize (EventRecordAll, 1); // initialize and start Event Recorder
|
||||
#endif
|
||||
|
||||
printf("Start GRU execution\n");
|
||||
int input_size = DIM_INPUT;
|
||||
int history_size = DIM_HISTORY;
|
||||
|
||||
// copy over the input data
|
||||
arm_copy_q15(test_input1, scratch_buffer + history_size, input_size);
|
||||
arm_copy_q15(test_history, scratch_buffer + history_size + input_size, history_size);
|
||||
|
||||
gru_example(scratch_buffer, input_size, history_size,
|
||||
update_gate_weights, reset_gate_weights, hidden_state_weights,
|
||||
update_gate_bias, reset_gate_bias, hidden_state_bias);
|
||||
printf("Complete first iteration on GRU\n");
|
||||
|
||||
arm_copy_q15(test_input2, scratch_buffer + history_size, input_size);
|
||||
gru_example(scratch_buffer, input_size, history_size,
|
||||
update_gate_weights, reset_gate_weights, hidden_state_weights,
|
||||
update_gate_bias, reset_gate_bias, hidden_state_bias);
|
||||
printf("Complete second iteration on GRU\n");
|
||||
|
||||
return 0;
|
||||
}
|
||||
File diff suppressed because one or more lines are too long
@@ -0,0 +1,4 @@
|
||||
CMSIS NN Lib example arm_nnexample_gru0 for
|
||||
Cortex-M4 and Cortex-M7.
|
||||
|
||||
The example is configured for uVision Simulator.
|
||||
59
john103C6T6/Drivers/CMSIS/NN/Include/arm_nn_tables.h
Normal file
59
john103C6T6/Drivers/CMSIS/NN/Include/arm_nn_tables.h
Normal file
@@ -0,0 +1,59 @@
|
||||
/* ----------------------------------------------------------------------
|
||||
* Project: CMSIS NN Library
|
||||
* Title: arm_nn_tables.h
|
||||
* Description: Extern declaration for NN tables
|
||||
*
|
||||
* $Date: 17. January 2018
|
||||
* $Revision: V.1.0.0
|
||||
*
|
||||
* Target Processor: Cortex-M cores
|
||||
* -------------------------------------------------------------------- */
|
||||
/*
|
||||
* Copyright (C) 2010-2018 Arm Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#ifndef _ARM_NN_TABLES_H
|
||||
#define _ARM_NN_TABLES_H
|
||||
|
||||
#include "arm_math.h"
|
||||
|
||||
/**
|
||||
* @brief tables for various activation functions
|
||||
*
|
||||
*/
|
||||
|
||||
extern const q15_t sigmoidTable_q15[256];
|
||||
extern const q7_t sigmoidTable_q7[256];
|
||||
|
||||
extern const q7_t tanhTable_q7[256];
|
||||
extern const q15_t tanhTable_q15[256];
|
||||
|
||||
/**
|
||||
* @brief 2-way tables for various activation functions
|
||||
*
|
||||
* 2-way table, H table for value larger than 1/4
|
||||
* L table for value smaller than 1/4, H table for remaining
|
||||
* We have this only for the q15_t version. It does not make
|
||||
* sense to have it for q7_t type
|
||||
*/
|
||||
extern const q15_t sigmoidHTable_q15[192];
|
||||
extern const q15_t sigmoidLTable_q15[128];
|
||||
|
||||
extern const q15_t sigmoidLTable_q15[128];
|
||||
extern const q15_t sigmoidHTable_q15[192];
|
||||
|
||||
#endif /* ARM_NN_TABLES_H */
|
||||
1010
john103C6T6/Drivers/CMSIS/NN/Include/arm_nnfunctions.h
Normal file
1010
john103C6T6/Drivers/CMSIS/NN/Include/arm_nnfunctions.h
Normal file
@@ -0,0 +1,1010 @@
|
||||
/*
|
||||
* Copyright (C) 2010-2018 Arm Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
* Project: CMSIS NN Library
|
||||
* Title: arm_nnfunctions.h
|
||||
* Description: Public header file for CMSIS NN Library
|
||||
*
|
||||
* $Date: 13. July 2018
|
||||
* $Revision: V.1.0.0
|
||||
*
|
||||
* Target Processor: Cortex-M cores
|
||||
* -------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
\mainpage CMSIS NN Software Library
|
||||
*
|
||||
* Introduction
|
||||
* ------------
|
||||
*
|
||||
* This user manual describes the CMSIS NN software library,
|
||||
* a collection of efficient neural network kernels developed to maximize the
|
||||
* performance and minimize the memory footprint of neural networks on Cortex-M processor cores.
|
||||
*
|
||||
* The library is divided into a number of functions each covering a specific category:
|
||||
* - Neural Network Convolution Functions
|
||||
* - Neural Network Activation Functions
|
||||
* - Fully-connected Layer Functions
|
||||
* - Neural Network Pooling Functions
|
||||
* - Softmax Functions
|
||||
* - Neural Network Support Functions
|
||||
*
|
||||
* The library has separate functions for operating on different weight and activation data
|
||||
* types including 8-bit integers (q7_t) and 16-bit integers (q15_t). The descrition of the
|
||||
* kernels are included in the function description. The implementation details are also
|
||||
* described in this paper [1].
|
||||
*
|
||||
* Block Diagram
|
||||
* --------
|
||||
* \image html CMSIS-NN-OVERVIEW.PNG
|
||||
*
|
||||
* Examples
|
||||
* --------
|
||||
*
|
||||
* The library ships with a number of examples which demonstrate how to use the library functions.
|
||||
*
|
||||
* Pre-processor Macros
|
||||
* ------------
|
||||
*
|
||||
* Each library project have differant pre-processor macros.
|
||||
*
|
||||
* - ARM_MATH_DSP:
|
||||
*
|
||||
* Define macro ARM_MATH_DSP, If the silicon supports DSP instructions.
|
||||
*
|
||||
* - ARM_MATH_BIG_ENDIAN:
|
||||
*
|
||||
* Define macro ARM_MATH_BIG_ENDIAN to build the library for big endian targets. By default library builds for little endian targets.
|
||||
*
|
||||
* - ARM_NN_TRUNCATE:
|
||||
*
|
||||
* Define macro ARM_NN_TRUNCATE to use floor instead of round-to-the-nearest-int for the computation.
|
||||
*
|
||||
* Copyright Notice
|
||||
* ------------
|
||||
*
|
||||
* Copyright (C) 2010-2018 Arm Limited. All rights reserved.
|
||||
*
|
||||
* [1] CMSIS-NN: Efficient Neural Network Kernels for Arm Cortex-M CPUs https://arxiv.org/abs/1801.06601
|
||||
*/
|
||||
|
||||
/**
|
||||
* @defgroup groupNN Neural Network Functions
|
||||
* These functions perform basic operations for neural network layers.
|
||||
*/
|
||||
|
||||
#ifndef _ARM_NNFUNCTIONS_H
|
||||
#define _ARM_NNFUNCTIONS_H
|
||||
|
||||
#include "arm_nnsupportfunctions.h"
|
||||
#include "arm_nn_tables.h"
|
||||
|
||||
#define USE_INTRINSIC
|
||||
|
||||
//#define ARM_NN_TRUNCATE /* This config the rounding model to floor or round to the nearest int */
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @defgroup NNConv Neural Network Convolution Functions
|
||||
*
|
||||
* Perform convolution layer
|
||||
*
|
||||
* The convolution is implemented in 2 steps: im2col and GEMM
|
||||
*
|
||||
* im2col is a process of converting each patch of image data into
|
||||
* a column. After im2col, the convolution is computed as matrix-matrix
|
||||
* multiplication.
|
||||
*
|
||||
* To reduce the memory footprint, the im2col is performed partially.
|
||||
* Each iteration, only a few column (i.e., patches) are generated and
|
||||
* computed with GEMM kernels similar to CMSIS-DSP arm_mat_mult functions.
|
||||
*
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Basic Q7 convolution function
|
||||
* @param[in] Im_in pointer to input tensor
|
||||
* @param[in] dim_im_in input tensor dimention
|
||||
* @param[in] ch_im_in number of input tensor channels
|
||||
* @param[in] wt pointer to kernel weights
|
||||
* @param[in] ch_im_out number of filters, i.e., output tensor channels
|
||||
* @param[in] dim_kernel filter kernel size
|
||||
* @param[in] padding padding sizes
|
||||
* @param[in] stride convolution stride
|
||||
* @param[in] bias pointer to bias
|
||||
* @param[in] bias_shift amount of left-shift for bias
|
||||
* @param[in] out_shift amount of right-shift for output
|
||||
* @param[in,out] Im_out pointer to output tensor
|
||||
* @param[in] dim_im_out output tensor dimension
|
||||
* @param[in,out] bufferA pointer to buffer space for input
|
||||
* @param[in,out] bufferB pointer to buffer space for output
|
||||
* @return The function returns <code>ARM_MATH_SUCCESS</code>
|
||||
*
|
||||
*/
|
||||
|
||||
arm_status arm_convolve_HWC_q7_basic(const q7_t * Im_in,
|
||||
const uint16_t dim_im_in,
|
||||
const uint16_t ch_im_in,
|
||||
const q7_t * wt,
|
||||
const uint16_t ch_im_out,
|
||||
const uint16_t dim_kernel,
|
||||
const uint16_t padding,
|
||||
const uint16_t stride,
|
||||
const q7_t * bias,
|
||||
const uint16_t bias_shift,
|
||||
const uint16_t out_shift,
|
||||
q7_t * Im_out,
|
||||
const uint16_t dim_im_out,
|
||||
q15_t * bufferA,
|
||||
q7_t * bufferB);
|
||||
|
||||
/**
|
||||
* @brief Basic Q7 convolution function (non-sqaure shape)
|
||||
* @param[in] Im_in pointer to input tensor
|
||||
* @param[in] dim_im_in_x input tensor dimention x
|
||||
* @param[in] dim_im_in_y input tensor dimention y
|
||||
* @param[in] ch_im_in number of input tensor channels
|
||||
* @param[in] wt pointer to kernel weights
|
||||
* @param[in] ch_im_out number of filters, i.e., output tensor channels
|
||||
* @param[in] dim_kernel_x filter kernel size x
|
||||
* @param[in] dim_kernel_y filter kernel size y
|
||||
* @param[in] padding_x padding size x
|
||||
* @param[in] padding_y padding size y
|
||||
* @param[in] stride_x convolution stride x
|
||||
* @param[in] stride_y convolution stride y
|
||||
* @param[in] bias pointer to bias
|
||||
* @param[in] bias_shift amount of left-shift for bias
|
||||
* @param[in] out_shift amount of right-shift for output
|
||||
* @param[in,out] Im_out pointer to output tensor
|
||||
* @param[in] dim_im_out_x output tensor dimension x
|
||||
* @param[in] dim_im_out_y output tensor dimension y
|
||||
* @param[in,out] bufferA pointer to buffer space for input
|
||||
* @param[in,out] bufferB pointer to buffer space for output
|
||||
* @return The function returns <code>ARM_MATH_SUCCESS</code>
|
||||
*/
|
||||
|
||||
arm_status arm_convolve_HWC_q7_basic_nonsquare(const q7_t * Im_in,
|
||||
const uint16_t dim_im_in_x,
|
||||
const uint16_t dim_im_in_y,
|
||||
const uint16_t ch_im_in,
|
||||
const q7_t * wt,
|
||||
const uint16_t ch_im_out,
|
||||
const uint16_t dim_kernel_x,
|
||||
const uint16_t dim_kernel_y,
|
||||
const uint16_t padding_x,
|
||||
const uint16_t padding_y,
|
||||
const uint16_t stride_x,
|
||||
const uint16_t stride_y,
|
||||
const q7_t * bias,
|
||||
const uint16_t bias_shift,
|
||||
const uint16_t out_shift,
|
||||
q7_t * Im_out,
|
||||
const uint16_t dim_im_out_x,
|
||||
const uint16_t dim_im_out_y,
|
||||
q15_t * bufferA,
|
||||
q7_t * bufferB);
|
||||
|
||||
/**
|
||||
* @brief Basic Q15 convolution function
|
||||
* @param[in] Im_in pointer to input tensor
|
||||
* @param[in] dim_im_in input tensor dimention
|
||||
* @param[in] ch_im_in number of input tensor channels
|
||||
* @param[in] wt pointer to kernel weights
|
||||
* @param[in] ch_im_out number of filters, i.e., output tensor channels
|
||||
* @param[in] dim_kernel filter kernel size
|
||||
* @param[in] padding padding sizes
|
||||
* @param[in] stride convolution stride
|
||||
* @param[in] bias pointer to bias
|
||||
* @param[in] bias_shift amount of left-shift for bias
|
||||
* @param[in] out_shift amount of right-shift for output
|
||||
* @param[in,out] Im_out pointer to output tensor
|
||||
* @param[in] dim_im_out output tensor dimension
|
||||
* @param[in,out] bufferA pointer to buffer space for input
|
||||
* @param[in,out] bufferB pointer to buffer space for output
|
||||
* @return The function returns <code>ARM_MATH_SUCCESS</code>
|
||||
*
|
||||
*/
|
||||
|
||||
arm_status arm_convolve_HWC_q15_basic(const q15_t * Im_in,
|
||||
const uint16_t dim_im_in,
|
||||
const uint16_t ch_im_in,
|
||||
const q15_t * wt,
|
||||
const uint16_t ch_im_out,
|
||||
const uint16_t dim_kernel,
|
||||
const uint16_t padding,
|
||||
const uint16_t stride,
|
||||
const q15_t * bias,
|
||||
const uint16_t bias_shift,
|
||||
const uint16_t out_shift,
|
||||
q15_t * Im_out,
|
||||
const uint16_t dim_im_out,
|
||||
q15_t * bufferA,
|
||||
q7_t * bufferB);
|
||||
|
||||
/**
|
||||
* @brief Fast Q7 convolution function
|
||||
* @param[in] Im_in pointer to input tensor
|
||||
* @param[in] dim_im_in input tensor dimention
|
||||
* @param[in] ch_im_in number of input tensor channels
|
||||
* @param[in] wt pointer to kernel weights
|
||||
* @param[in] ch_im_out number of filters, i.e., output tensor channels
|
||||
* @param[in] dim_kernel filter kernel size
|
||||
* @param[in] padding padding sizes
|
||||
* @param[in] stride convolution stride
|
||||
* @param[in] bias pointer to bias
|
||||
* @param[in] bias_shift amount of left-shift for bias
|
||||
* @param[in] out_shift amount of right-shift for output
|
||||
* @param[in,out] Im_out pointer to output tensor
|
||||
* @param[in] dim_im_out output tensor dimension
|
||||
* @param[in,out] bufferA pointer to buffer space for input
|
||||
* @param[in,out] bufferB pointer to buffer space for output
|
||||
* @return The function returns either
|
||||
* <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
|
||||
*
|
||||
* This function is the version with full list of optimization tricks, but with
|
||||
* some contraints:
|
||||
* ch_im_in is multiple of 4
|
||||
* ch_im_out is multiple of 2
|
||||
*/
|
||||
|
||||
arm_status arm_convolve_HWC_q7_fast(const q7_t * Im_in,
|
||||
const uint16_t dim_im_in,
|
||||
const uint16_t ch_im_in,
|
||||
const q7_t * wt,
|
||||
const uint16_t ch_im_out,
|
||||
const uint16_t dim_kernel,
|
||||
const uint16_t padding,
|
||||
const uint16_t stride,
|
||||
const q7_t * bias,
|
||||
const uint16_t bias_shift,
|
||||
const uint16_t out_shift,
|
||||
q7_t * Im_out,
|
||||
const uint16_t dim_im_out,
|
||||
q15_t * bufferA,
|
||||
q7_t * bufferB);
|
||||
|
||||
/**
|
||||
* @brief Fast Q7 convolution function (non-sqaure shape)
|
||||
* @param[in] Im_in pointer to input tensor
|
||||
* @param[in] dim_im_in_x input tensor dimention x
|
||||
* @param[in] dim_im_in_y input tensor dimention y
|
||||
* @param[in] ch_im_in number of input tensor channels
|
||||
* @param[in] wt pointer to kernel weights
|
||||
* @param[in] ch_im_out number of filters, i.e., output tensor channels
|
||||
* @param[in] dim_kernel_x filter kernel size x
|
||||
* @param[in] dim_kernel_y filter kernel size y
|
||||
* @param[in] padding_x padding size x
|
||||
* @param[in] padding_y padding size y
|
||||
* @param[in] stride_x convolution stride x
|
||||
* @param[in] stride_y convolution stride y
|
||||
* @param[in] bias pointer to bias
|
||||
* @param[in] bias_shift amount of left-shift for bias
|
||||
* @param[in] out_shift amount of right-shift for output
|
||||
* @param[in,out] Im_out pointer to output tensor
|
||||
* @param[in] dim_im_out_x output tensor dimension x
|
||||
* @param[in] dim_im_out_y output tensor dimension y
|
||||
* @param[in,out] bufferA pointer to buffer space for input
|
||||
* @param[in,out] bufferB pointer to buffer space for output
|
||||
* @return The function returns either
|
||||
* <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
|
||||
*
|
||||
* This function is the version with full list of optimization tricks, but with
|
||||
* some contraints:
|
||||
* ch_im_in is multiple of 4
|
||||
* ch_im_out is multiple of 2
|
||||
*/
|
||||
|
||||
arm_status arm_convolve_HWC_q7_fast_nonsquare(const q7_t * Im_in,
|
||||
const uint16_t dim_im_in_x,
|
||||
const uint16_t dim_im_in_y,
|
||||
const uint16_t ch_im_in,
|
||||
const q7_t * wt,
|
||||
const uint16_t ch_im_out,
|
||||
const uint16_t dim_kernel_x,
|
||||
const uint16_t dim_kernel_y,
|
||||
const uint16_t padding_x,
|
||||
const uint16_t padding_y,
|
||||
const uint16_t stride_x,
|
||||
const uint16_t stride_y,
|
||||
const q7_t * bias,
|
||||
const uint16_t bias_shift,
|
||||
const uint16_t out_shift,
|
||||
q7_t * Im_out,
|
||||
const uint16_t dim_im_out_x,
|
||||
const uint16_t dim_im_out_y,
|
||||
q15_t * bufferA,
|
||||
q7_t * bufferB);
|
||||
|
||||
/**
|
||||
* @brief Fast Q7 version of 1x1 convolution (non-sqaure shape)
|
||||
* @param[in] Im_in pointer to input tensor
|
||||
* @param[in] dim_im_in_x input tensor dimention x
|
||||
* @param[in] dim_im_in_y input tensor dimention y
|
||||
* @param[in] ch_im_in number of input tensor channels
|
||||
* @param[in] wt pointer to kernel weights
|
||||
* @param[in] ch_im_out number of filters, i.e., output tensor channels
|
||||
* @param[in] dim_kernel_x filter kernel size x
|
||||
* @param[in] dim_kernel_y filter kernel size y
|
||||
* @param[in] padding_x padding size x
|
||||
* @param[in] padding_y padding size y
|
||||
* @param[in] stride_x convolution stride x
|
||||
* @param[in] stride_y convolution stride y
|
||||
* @param[in] bias pointer to bias
|
||||
* @param[in] bias_shift amount of left-shift for bias
|
||||
* @param[in] out_shift amount of right-shift for output
|
||||
* @param[in,out] Im_out pointer to output tensor
|
||||
* @param[in] dim_im_out_x output tensor dimension x
|
||||
* @param[in] dim_im_out_y output tensor dimension y
|
||||
* @param[in,out] bufferA pointer to buffer space for input
|
||||
* @param[in,out] bufferB pointer to buffer space for output
|
||||
* @return The function returns either
|
||||
* <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
|
||||
*
|
||||
* This function implement convolution with 1x1 kernel size (i.e., dim_kernel_x=1
|
||||
* and dim_kernel_y=1). It can be used for
|
||||
* second half of MobileNets after depthwise separable convolution.
|
||||
*
|
||||
* This function is the version with full list of optimization tricks, but with
|
||||
* some contraints:
|
||||
* ch_im_in is multiple of 4
|
||||
* ch_im_out is multiple of 2
|
||||
*/
|
||||
arm_status arm_convolve_1x1_HWC_q7_fast_nonsquare(const q7_t * Im_in,
|
||||
const uint16_t dim_im_in_x,
|
||||
const uint16_t dim_im_in_y,
|
||||
const uint16_t ch_im_in,
|
||||
const q7_t * wt,
|
||||
const uint16_t ch_im_out,
|
||||
const uint16_t dim_kernel_x,
|
||||
const uint16_t dim_kernel_y,
|
||||
const uint16_t padding_x,
|
||||
const uint16_t padding_y,
|
||||
const uint16_t stride_x,
|
||||
const uint16_t stride_y,
|
||||
const q7_t * bias,
|
||||
const uint16_t bias_shift,
|
||||
const uint16_t out_shift,
|
||||
q7_t * Im_out,
|
||||
const uint16_t dim_im_out_x,
|
||||
const uint16_t dim_im_out_y,
|
||||
q15_t * bufferA,
|
||||
q7_t * bufferB);
|
||||
|
||||
/**
|
||||
* @brief Q7 version of convolution for RGB image
|
||||
* @param[in] Im_in pointer to input tensor
|
||||
* @param[in] dim_im_in input tensor dimention
|
||||
* @param[in] ch_im_in number of input tensor channels
|
||||
* @param[in] wt pointer to kernel weights
|
||||
* @param[in] ch_im_out number of filters, i.e., output tensor channels
|
||||
* @param[in] dim_kernel filter kernel size
|
||||
* @param[in] padding padding sizes
|
||||
* @param[in] stride convolution stride
|
||||
* @param[in] bias pointer to bias
|
||||
* @param[in] bias_shift amount of left-shift for bias
|
||||
* @param[in] out_shift amount of right-shift for output
|
||||
* @param[in,out] Im_out pointer to output tensor
|
||||
* @param[in] dim_im_out output tensor dimension
|
||||
* @param[in,out] bufferA pointer to buffer space for input
|
||||
* @param[in,out] bufferB pointer to buffer space for output
|
||||
* @return The function returns either
|
||||
* <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
|
||||
*
|
||||
* This kernel is written exclusively for convolution with ch_im_in
|
||||
* equals 3. This applies on the first layer of CNNs which has input
|
||||
* image with RGB format.
|
||||
*/
|
||||
|
||||
arm_status arm_convolve_HWC_q7_RGB(const q7_t * Im_in,
|
||||
const uint16_t dim_im_in,
|
||||
const uint16_t ch_im_in,
|
||||
const q7_t * wt,
|
||||
const uint16_t ch_im_out,
|
||||
const uint16_t dim_kernel,
|
||||
const uint16_t padding,
|
||||
const uint16_t stride,
|
||||
const q7_t * bias,
|
||||
const uint16_t bias_shift,
|
||||
const uint16_t out_shift,
|
||||
q7_t * Im_out,
|
||||
const uint16_t dim_im_out,
|
||||
q15_t * bufferA,
|
||||
q7_t * bufferB);
|
||||
|
||||
/**
|
||||
* @brief Fast Q15 convolution function
|
||||
* @param[in] Im_in pointer to input tensor
|
||||
* @param[in] dim_im_in input tensor dimention
|
||||
* @param[in] ch_im_in number of input tensor channels
|
||||
* @param[in] wt pointer to kernel weights
|
||||
* @param[in] ch_im_out number of filters, i.e., output tensor channels
|
||||
* @param[in] dim_kernel filter kernel size
|
||||
* @param[in] padding padding sizes
|
||||
* @param[in] stride convolution stride
|
||||
* @param[in] bias pointer to bias
|
||||
* @param[in] bias_shift amount of left-shift for bias
|
||||
* @param[in] out_shift amount of right-shift for output
|
||||
* @param[in,out] Im_out pointer to output tensor
|
||||
* @param[in] dim_im_out output tensor dimension
|
||||
* @param[in,out] bufferA pointer to buffer space for input
|
||||
* @param[in,out] bufferB pointer to buffer space for output
|
||||
* @return The function returns either
|
||||
* <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
|
||||
*
|
||||
* This function is the version with full list of optimization tricks, but with
|
||||
* some contraints:
|
||||
* ch_im_in is multiple of 2
|
||||
* ch_im_out is multiple of 2
|
||||
*/
|
||||
|
||||
arm_status arm_convolve_HWC_q15_fast(const q15_t * Im_in,
|
||||
const uint16_t dim_im_in,
|
||||
const uint16_t ch_im_in,
|
||||
const q15_t * wt,
|
||||
const uint16_t ch_im_out,
|
||||
const uint16_t dim_kernel,
|
||||
const uint16_t padding,
|
||||
const uint16_t stride,
|
||||
const q15_t * bias,
|
||||
const uint16_t bias_shift,
|
||||
const uint16_t out_shift,
|
||||
q15_t * Im_out,
|
||||
const uint16_t dim_im_out,
|
||||
q15_t * bufferA,
|
||||
q7_t * bufferB);
|
||||
|
||||
/**
|
||||
* @brief Fast Q15 convolution function (non-sqaure shape)
|
||||
* @param[in] Im_in pointer to input tensor
|
||||
* @param[in] dim_im_in_x input tensor dimention x
|
||||
* @param[in] dim_im_in_y input tensor dimention y
|
||||
* @param[in] ch_im_in number of input tensor channels
|
||||
* @param[in] wt pointer to kernel weights
|
||||
* @param[in] ch_im_out number of filters, i.e., output tensor channels
|
||||
* @param[in] dim_kernel_x filter kernel size x
|
||||
* @param[in] dim_kernel_y filter kernel size y
|
||||
* @param[in] padding_x padding size x
|
||||
* @param[in] padding_y padding size y
|
||||
* @param[in] stride_x convolution stride x
|
||||
* @param[in] stride_y convolution stride y
|
||||
* @param[in] bias pointer to bias
|
||||
* @param[in] bias_shift amount of left-shift for bias
|
||||
* @param[in] out_shift amount of right-shift for output
|
||||
* @param[in,out] Im_out pointer to output tensor
|
||||
* @param[in] dim_im_out_x output tensor dimension x
|
||||
* @param[in] dim_im_out_y output tensor dimension y
|
||||
* @param[in,out] bufferA pointer to buffer space for input
|
||||
* @param[in,out] bufferB pointer to buffer space for output
|
||||
* @return The function returns either
|
||||
* <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
|
||||
*
|
||||
* @details
|
||||
*
|
||||
* <b>Buffer size:</b>
|
||||
*
|
||||
* bufferA size: 2*ch_im_in*dim_kernel*dim_kernel
|
||||
*
|
||||
* bufferB size: 0
|
||||
*
|
||||
* <b>Input dimension constraints:</b>
|
||||
*
|
||||
* ch_im_in is multiple of 2
|
||||
*
|
||||
* ch_im_out is multipe of 2
|
||||
*
|
||||
*/
|
||||
|
||||
arm_status
|
||||
arm_convolve_HWC_q15_fast_nonsquare(const q15_t * Im_in,
|
||||
const uint16_t dim_im_in_x,
|
||||
const uint16_t dim_im_in_y,
|
||||
const uint16_t ch_im_in,
|
||||
const q15_t * wt,
|
||||
const uint16_t ch_im_out,
|
||||
const uint16_t dim_kernel_x,
|
||||
const uint16_t dim_kernel_y,
|
||||
const uint16_t padding_x,
|
||||
const uint16_t padding_y,
|
||||
const uint16_t stride_x,
|
||||
const uint16_t stride_y,
|
||||
const q15_t * bias,
|
||||
const uint16_t bias_shift,
|
||||
const uint16_t out_shift,
|
||||
q15_t * Im_out,
|
||||
const uint16_t dim_im_out_x,
|
||||
const uint16_t dim_im_out_y,
|
||||
q15_t * bufferA,
|
||||
q7_t * bufferB);
|
||||
|
||||
/**
|
||||
* @brief Q7 depthwise separable convolution function
|
||||
* @param[in] Im_in pointer to input tensor
|
||||
* @param[in] dim_im_in input tensor dimention
|
||||
* @param[in] ch_im_in number of input tensor channels
|
||||
* @param[in] wt pointer to kernel weights
|
||||
* @param[in] ch_im_out number of filters, i.e., output tensor channels
|
||||
* @param[in] dim_kernel filter kernel size
|
||||
* @param[in] padding padding sizes
|
||||
* @param[in] stride convolution stride
|
||||
* @param[in] bias pointer to bias
|
||||
* @param[in] bias_shift amount of left-shift for bias
|
||||
* @param[in] out_shift amount of right-shift for output
|
||||
* @param[in,out] Im_out pointer to output tensor
|
||||
* @param[in] dim_im_out output tensor dimension
|
||||
* @param[in,out] bufferA pointer to buffer space for input
|
||||
* @param[in,out] bufferB pointer to buffer space for output
|
||||
* @return The function returns either
|
||||
* <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
|
||||
*
|
||||
* This function is the version with full list of optimization tricks, but with
|
||||
* some contraints:
|
||||
* ch_im_in is multiple of 2
|
||||
* ch_im_out is multiple of 2
|
||||
*/
|
||||
|
||||
arm_status arm_depthwise_separable_conv_HWC_q7(const q7_t * Im_in,
|
||||
const uint16_t dim_im_in,
|
||||
const uint16_t ch_im_in,
|
||||
const q7_t * wt,
|
||||
const uint16_t ch_im_out,
|
||||
const uint16_t dim_kernel,
|
||||
const uint16_t padding,
|
||||
const uint16_t stride,
|
||||
const q7_t * bias,
|
||||
const uint16_t bias_shift,
|
||||
const uint16_t out_shift,
|
||||
q7_t * Im_out,
|
||||
const uint16_t dim_im_out,
|
||||
q15_t * bufferA,
|
||||
q7_t * bufferB);
|
||||
|
||||
/**
|
||||
* @brief Q7 depthwise separable convolution function (non-square shape)
|
||||
* @param[in] Im_in pointer to input tensor
|
||||
* @param[in] dim_im_in_x input tensor dimention x
|
||||
* @param[in] dim_im_in_y input tensor dimention y
|
||||
* @param[in] ch_im_in number of input tensor channels
|
||||
* @param[in] wt pointer to kernel weights
|
||||
* @param[in] ch_im_out number of filters, i.e., output tensor channels
|
||||
* @param[in] dim_kernel_x filter kernel size x
|
||||
* @param[in] dim_kernel_y filter kernel size y
|
||||
* @param[in] padding_x padding sizes x
|
||||
* @param[in] padding_y padding sizes y
|
||||
* @param[in] stride_x convolution stride x
|
||||
* @param[in] stride_y convolution stride y
|
||||
* @param[in] bias pointer to bias
|
||||
* @param[in] bias_shift amount of left-shift for bias
|
||||
* @param[in] out_shift amount of right-shift for output
|
||||
* @param[in,out] Im_out pointer to output tensor
|
||||
* @param[in] dim_im_out_x output tensor dimension x
|
||||
* @param[in] dim_im_out_y output tensor dimension y
|
||||
* @param[in,out] bufferA pointer to buffer space for input
|
||||
* @param[in,out] bufferB pointer to buffer space for output
|
||||
* @return The function returns either
|
||||
* <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
|
||||
*
|
||||
* This function is the version with full list of optimization tricks, but with
|
||||
* some contraints:
|
||||
* ch_im_in is multiple of 2
|
||||
* ch_im_out is multiple of 2
|
||||
*/
|
||||
arm_status arm_depthwise_separable_conv_HWC_q7_nonsquare(const q7_t * Im_in,
|
||||
const uint16_t dim_im_in_x,
|
||||
const uint16_t dim_im_in_y,
|
||||
const uint16_t ch_im_in,
|
||||
const q7_t * wt,
|
||||
const uint16_t ch_im_out,
|
||||
const uint16_t dim_kernel_x,
|
||||
const uint16_t dim_kernel_y,
|
||||
const uint16_t padding_x,
|
||||
const uint16_t padding_y,
|
||||
const uint16_t stride_x,
|
||||
const uint16_t stride_y,
|
||||
const q7_t * bias,
|
||||
const uint16_t bias_shift,
|
||||
const uint16_t out_shift,
|
||||
q7_t * Im_out,
|
||||
const uint16_t dim_im_out_x,
|
||||
const uint16_t dim_im_out_y,
|
||||
q15_t * bufferA,
|
||||
q7_t * bufferB);
|
||||
|
||||
|
||||
/**
|
||||
* @defgroup FC Fully-connected Layer Functions
|
||||
*
|
||||
* Perform fully-connected layer
|
||||
*
|
||||
* Fully-connected layer is basically a matrix-vector multiplication
|
||||
* with bias. The matrix is the weights and the input/output vectors
|
||||
* are the activation values. Supported {weight, activation} precisions
|
||||
* include {8-bit, 8-bit}, {16-bit, 16-bit}, and {8-bit, 16-bit}.
|
||||
*
|
||||
* Here we have two types of kernel functions. The basic function
|
||||
* implements the function using regular GEMV approach. The opt functions
|
||||
* operates with weights in interleaved formats.
|
||||
*
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Q7 basic fully-connected layer function
|
||||
* @param[in] pV pointer to input vector
|
||||
* @param[in] pM pointer to matrix weights
|
||||
* @param[in] dim_vec length of the vector
|
||||
* @param[in] num_of_rows number of rows in weight matrix
|
||||
* @param[in] bias_shift amount of left-shift for bias
|
||||
* @param[in] out_shift amount of right-shift for output
|
||||
* @param[in] bias pointer to bias
|
||||
* @param[in,out] pOut pointer to output vector
|
||||
* @param[in,out] vec_buffer pointer to buffer space for input
|
||||
* @return The function returns <code>ARM_MATH_SUCCESS</code>
|
||||
*
|
||||
*/
|
||||
|
||||
arm_status arm_fully_connected_q7(const q7_t * pV,
|
||||
const q7_t * pM,
|
||||
const uint16_t dim_vec,
|
||||
const uint16_t num_of_rows,
|
||||
const uint16_t bias_shift,
|
||||
const uint16_t out_shift,
|
||||
const q7_t * bias,
|
||||
q7_t * pOut,
|
||||
q15_t * vec_buffer);
|
||||
|
||||
/**
|
||||
* @brief Q7 opt fully-connected layer function
|
||||
* @param[in] pV pointer to input vector
|
||||
* @param[in] pM pointer to matrix weights
|
||||
* @param[in] dim_vec length of the vector
|
||||
* @param[in] num_of_rows number of rows in weight matrix
|
||||
* @param[in] bias_shift amount of left-shift for bias
|
||||
* @param[in] out_shift amount of right-shift for output
|
||||
* @param[in] bias pointer to bias
|
||||
* @param[in,out] pOut pointer to output vector
|
||||
* @param[in,out] vec_buffer pointer to buffer space for input
|
||||
* @return The function returns <code>ARM_MATH_SUCCESS</code>
|
||||
*
|
||||
*/
|
||||
|
||||
arm_status arm_fully_connected_q7_opt(const q7_t * pV,
|
||||
const q7_t * pM,
|
||||
const uint16_t dim_vec,
|
||||
const uint16_t num_of_rows,
|
||||
const uint16_t bias_shift,
|
||||
const uint16_t out_shift,
|
||||
const q7_t * bias,
|
||||
q7_t * pOut,
|
||||
q15_t * vec_buffer);
|
||||
|
||||
/**
|
||||
* @brief Q15 basic fully-connected layer function
|
||||
* @param[in] pV pointer to input vector
|
||||
* @param[in] pM pointer to matrix weights
|
||||
* @param[in] dim_vec length of the vector
|
||||
* @param[in] num_of_rows number of rows in weight matrix
|
||||
* @param[in] bias_shift amount of left-shift for bias
|
||||
* @param[in] out_shift amount of right-shift for output
|
||||
* @param[in] bias pointer to bias
|
||||
* @param[in,out] pOut pointer to output vector
|
||||
* @param[in,out] vec_buffer pointer to buffer space for input
|
||||
* @return The function returns <code>ARM_MATH_SUCCESS</code>
|
||||
*
|
||||
*/
|
||||
|
||||
arm_status arm_fully_connected_q15(const q15_t * pV,
|
||||
const q15_t * pM,
|
||||
const uint16_t dim_vec,
|
||||
const uint16_t num_of_rows,
|
||||
const uint16_t bias_shift,
|
||||
const uint16_t out_shift,
|
||||
const q15_t * bias,
|
||||
q15_t * pOut,
|
||||
q15_t * vec_buffer);
|
||||
|
||||
/**
|
||||
* @brief Q15 opt fully-connected layer function
|
||||
* @param[in] pV pointer to input vector
|
||||
* @param[in] pM pointer to matrix weights
|
||||
* @param[in] dim_vec length of the vector
|
||||
* @param[in] num_of_rows number of rows in weight matrix
|
||||
* @param[in] bias_shift amount of left-shift for bias
|
||||
* @param[in] out_shift amount of right-shift for output
|
||||
* @param[in] bias pointer to bias
|
||||
* @param[in,out] pOut pointer to output vector
|
||||
* @param[in,out] vec_buffer pointer to buffer space for input
|
||||
* @return The function returns <code>ARM_MATH_SUCCESS</code>
|
||||
*
|
||||
*/
|
||||
|
||||
arm_status arm_fully_connected_q15_opt(const q15_t * pV,
|
||||
const q15_t * pM,
|
||||
const uint16_t dim_vec,
|
||||
const uint16_t num_of_rows,
|
||||
const uint16_t bias_shift,
|
||||
const uint16_t out_shift,
|
||||
const q15_t * bias,
|
||||
q15_t * pOut,
|
||||
q15_t * vec_buffer);
|
||||
|
||||
/**
|
||||
* @brief Mixed Q15-Q7 fully-connected layer function
|
||||
* @param[in] pV pointer to input vector
|
||||
* @param[in] pM pointer to matrix weights
|
||||
* @param[in] dim_vec length of the vector
|
||||
* @param[in] num_of_rows number of rows in weight matrix
|
||||
* @param[in] bias_shift amount of left-shift for bias
|
||||
* @param[in] out_shift amount of right-shift for output
|
||||
* @param[in] bias pointer to bias
|
||||
* @param[in,out] pOut pointer to output vector
|
||||
* @param[in,out] vec_buffer pointer to buffer space for input
|
||||
* @return The function returns <code>ARM_MATH_SUCCESS</code>
|
||||
*
|
||||
*/
|
||||
|
||||
arm_status arm_fully_connected_mat_q7_vec_q15(const q15_t * pV,
|
||||
const q7_t * pM,
|
||||
const uint16_t dim_vec,
|
||||
const uint16_t num_of_rows,
|
||||
const uint16_t bias_shift,
|
||||
const uint16_t out_shift,
|
||||
const q7_t * bias,
|
||||
q15_t * pOut,
|
||||
q15_t * vec_buffer);
|
||||
|
||||
/**
|
||||
* @brief Mixed Q15-Q7 opt fully-connected layer function
|
||||
* @param[in] pV pointer to input vector
|
||||
* @param[in] pM pointer to matrix weights
|
||||
* @param[in] dim_vec length of the vector
|
||||
* @param[in] num_of_rows number of rows in weight matrix
|
||||
* @param[in] bias_shift amount of left-shift for bias
|
||||
* @param[in] out_shift amount of right-shift for output
|
||||
* @param[in] bias pointer to bias
|
||||
* @param[in,out] pOut pointer to output vector
|
||||
* @param[in,out] vec_buffer pointer to buffer space for input
|
||||
* @return The function returns <code>ARM_MATH_SUCCESS</code>
|
||||
*
|
||||
*/
|
||||
|
||||
arm_status arm_fully_connected_mat_q7_vec_q15_opt(const q15_t * pV,
|
||||
const q7_t * pM,
|
||||
const uint16_t dim_vec,
|
||||
const uint16_t num_of_rows,
|
||||
const uint16_t bias_shift,
|
||||
const uint16_t out_shift,
|
||||
const q7_t * bias,
|
||||
q15_t * pOut,
|
||||
q15_t * vec_buffer);
|
||||
|
||||
/**
|
||||
* @brief Matrix-Multiplication Kernels for Convolution
|
||||
*
|
||||
* These functions are used within convolution layer functions for
|
||||
* matrix multiplication.
|
||||
*
|
||||
* The implementation is similar to CMSIS-DSP arm_mat_mult functions
|
||||
* with one Q7 and one Q15 operands. The Q15 operand is the im2col
|
||||
* output which is always with 2 columns.
|
||||
*
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Matrix-multiplication function for convolution
|
||||
* @param[in] pA pointer to operand A
|
||||
* @param[in] pInBuffer pointer to operand B, always conssists of 2 vectors
|
||||
* @param[in] ch_im_out numRow of A
|
||||
* @param[in] numCol_A numCol of A
|
||||
* @param[in] bias_shift amount of left-shift for bias
|
||||
* @param[in] out_shift amount of right-shift for output
|
||||
* @param[in] bias the bias
|
||||
* @param[in,out] pOut pointer to output
|
||||
* @return The function returns the incremented output pointer
|
||||
*/
|
||||
|
||||
q7_t *arm_nn_mat_mult_kernel_q7_q15(const q7_t * pA,
|
||||
const q15_t * pInBuffer,
|
||||
const uint16_t ch_im_out,
|
||||
const uint16_t numCol_A,
|
||||
const uint16_t bias_shift,
|
||||
const uint16_t out_shift,
|
||||
const q7_t * bias,
|
||||
q7_t * pOut);
|
||||
|
||||
/**
|
||||
* @brief Matrix-multiplication function for convolution with reordered columns
|
||||
* @param[in] pA pointer to operand A
|
||||
* @param[in] pInBuffer pointer to operand B, always conssists of 2 vectors
|
||||
* @param[in] ch_im_out numRow of A
|
||||
* @param[in] numCol_A numCol of A
|
||||
* @param[in] bias_shift amount of left-shift for bias
|
||||
* @param[in] out_shift amount of right-shift for output
|
||||
* @param[in] bias the bias
|
||||
* @param[in,out] pOut pointer to output
|
||||
* @return The function returns the incremented output pointer
|
||||
*/
|
||||
|
||||
q7_t *arm_nn_mat_mult_kernel_q7_q15_reordered(const q7_t * pA,
|
||||
const q15_t * pInBuffer,
|
||||
const uint16_t ch_im_out,
|
||||
const uint16_t numCol_A,
|
||||
const uint16_t bias_shift,
|
||||
const uint16_t out_shift,
|
||||
const q7_t * bias,
|
||||
q7_t * pOut);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Other functions
|
||||
* These layers are typically not timing critical
|
||||
* Basic implementation is supported here
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @defgroup Acti Neural Network Activation Functions
|
||||
*
|
||||
* Perform activation layers, including ReLU (Rectified Linear Unit),
|
||||
* sigmoid and tanh
|
||||
*
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Q7 RELU function
|
||||
* @param[in,out] data pointer to input
|
||||
* @param[in] size number of elements
|
||||
* @return none.
|
||||
*/
|
||||
|
||||
void arm_relu_q7(q7_t * data, uint16_t size);
|
||||
|
||||
/**
|
||||
* @brief Q15 RELU function
|
||||
* @param[in,out] data pointer to input
|
||||
* @param[in] size number of elements
|
||||
* @return none.
|
||||
*/
|
||||
|
||||
void arm_relu_q15(q15_t * data, uint16_t size);
|
||||
|
||||
/**
|
||||
* @brief Q7 neural network activation function using direct table look-up
|
||||
* @param[in,out] data pointer to input
|
||||
* @param[in] size number of elements
|
||||
* @param[in] int_width bit-width of the integer part, assume to be smaller than 3
|
||||
* @param[in] type type of activation functions
|
||||
* @return none.
|
||||
*/
|
||||
|
||||
void arm_nn_activations_direct_q7(q7_t * data, uint16_t size, uint16_t int_width,
|
||||
arm_nn_activation_type type);
|
||||
|
||||
/**
|
||||
* @brief Q15 neural network activation function using direct table look-up
|
||||
* @param[in,out] data pointer to input
|
||||
* @param[in] size number of elements
|
||||
* @param[in] int_width bit-width of the integer part, assume to be smaller than 3
|
||||
* @param[in] type type of activation functions
|
||||
* @return none.
|
||||
*/
|
||||
|
||||
void arm_nn_activations_direct_q15(q15_t * data, uint16_t size, uint16_t int_width,
|
||||
arm_nn_activation_type type);
|
||||
|
||||
/**
|
||||
* @defgroup Pooling Neural Network Pooling Functions
|
||||
*
|
||||
* Perform pooling functions, including max pooling and average pooling
|
||||
*
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Q7 max pooling function
|
||||
* @param[in] Im_in pointer to input tensor
|
||||
* @param[in] dim_im_in input tensor dimention
|
||||
* @param[in] ch_im_in number of input tensor channels
|
||||
* @param[in] dim_kernel filter kernel size
|
||||
* @param[in] padding padding sizes
|
||||
* @param[in] stride convolution stride
|
||||
* @param[in] dim_im_out output tensor dimension
|
||||
* @param[in,out] bufferA pointer to buffer space for input
|
||||
* @param[in,out] Im_out pointer to output tensor
|
||||
* @return none.
|
||||
*
|
||||
*/
|
||||
|
||||
void arm_maxpool_q7_HWC(q7_t * Im_in,
|
||||
const uint16_t dim_im_in,
|
||||
const uint16_t ch_im_in,
|
||||
const uint16_t dim_kernel,
|
||||
const uint16_t padding,
|
||||
const uint16_t stride,
|
||||
const uint16_t dim_im_out,
|
||||
q7_t * bufferA,
|
||||
q7_t * Im_out);
|
||||
|
||||
/**
|
||||
* @brief Q7 average pooling function
|
||||
* @param[in] Im_in pointer to input tensor
|
||||
* @param[in] dim_im_in input tensor dimention
|
||||
* @param[in] ch_im_in number of input tensor channels
|
||||
* @param[in] dim_kernel filter kernel size
|
||||
* @param[in] padding padding sizes
|
||||
* @param[in] stride convolution stride
|
||||
* @param[in] dim_im_out output tensor dimension
|
||||
* @param[in,out] bufferA pointer to buffer space for input
|
||||
* @param[in,out] Im_out pointer to output tensor
|
||||
* @return none.
|
||||
*
|
||||
*/
|
||||
|
||||
void arm_avepool_q7_HWC(q7_t * Im_in,
|
||||
const uint16_t dim_im_in,
|
||||
const uint16_t ch_im_in,
|
||||
const uint16_t dim_kernel,
|
||||
const uint16_t padding,
|
||||
const uint16_t stride,
|
||||
const uint16_t dim_im_out,
|
||||
q7_t * bufferA,
|
||||
q7_t * Im_out);
|
||||
|
||||
/**
|
||||
* @defgroup Softmax Softmax Functions
|
||||
*
|
||||
* EXP(2) based softmax function
|
||||
*
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Q7 softmax function
|
||||
* @param[in] vec_in pointer to input vector
|
||||
* @param[in] dim_vec input vector dimention
|
||||
* @param[out] p_out pointer to output vector
|
||||
* @return none.
|
||||
*
|
||||
*/
|
||||
|
||||
void arm_softmax_q7(const q7_t * vec_in, const uint16_t dim_vec, q7_t * p_out);
|
||||
|
||||
/**
|
||||
* @brief Q15 softmax function
|
||||
* @param[in] vec_in pointer to input vector
|
||||
* @param[in] dim_vec input vector dimention
|
||||
* @param[out] p_out pointer to output vector
|
||||
* @return none.
|
||||
*
|
||||
*/
|
||||
|
||||
void arm_softmax_q15(const q15_t * vec_in, const uint16_t dim_vec, q15_t * p_out);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
202
john103C6T6/Drivers/CMSIS/NN/Include/arm_nnsupportfunctions.h
Normal file
202
john103C6T6/Drivers/CMSIS/NN/Include/arm_nnsupportfunctions.h
Normal file
@@ -0,0 +1,202 @@
|
||||
/*
|
||||
* Copyright (C) 2010-2018 Arm Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
* Project: CMSIS NN Library
|
||||
* Title: arm_nnsupportfunctions.h
|
||||
* Description: Public header file of support functions for CMSIS NN Library
|
||||
*
|
||||
* $Date: 13. July 2018
|
||||
* $Revision: V.1.0.0
|
||||
*
|
||||
* Target Processor: Cortex-M cores
|
||||
* -------------------------------------------------------------------- */
|
||||
|
||||
#ifndef _ARM_NNSUPPORTFUNCTIONS_H_
|
||||
#define _ARM_NNSUPPORTFUNCTIONS_H_
|
||||
|
||||
#include "arm_math.h"
|
||||
#include "arm_common_tables.h"
|
||||
//#include <cstring>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Union for SIMD access of Q31/Q15/Q7 types
|
||||
*/
|
||||
union arm_nnword
|
||||
{
|
||||
q31_t word;
|
||||
/**< Q31 type */
|
||||
q15_t half_words[2];
|
||||
/**< Q15 type */
|
||||
q7_t bytes[4];
|
||||
/**< Q7 type */
|
||||
};
|
||||
|
||||
/**
|
||||
* @brief Struct for specifying activation function types
|
||||
*
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
ARM_SIGMOID = 0,
|
||||
/**< Sigmoid activation function */
|
||||
ARM_TANH = 1,
|
||||
/**< Tanh activation function */
|
||||
} arm_nn_activation_type;
|
||||
|
||||
/**
|
||||
* @defgroup nndata_convert Neural Network Data Conversion Functions
|
||||
*
|
||||
* Perform data type conversion in-between neural network operations
|
||||
*
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Converts the elements of the Q7 vector to Q15 vector without left-shift
|
||||
* @param[in] *pSrc points to the Q7 input vector
|
||||
* @param[out] *pDst points to the Q15 output vector
|
||||
* @param[in] blockSize length of the input vector
|
||||
* @return none.
|
||||
*
|
||||
*/
|
||||
|
||||
void arm_q7_to_q15_no_shift(const q7_t * pSrc, q15_t * pDst, uint32_t blockSize);
|
||||
|
||||
/**
|
||||
* @brief Converts the elements of the Q7 vector to reordered Q15 vector without left-shift
|
||||
* @param[in] *pSrc points to the Q7 input vector
|
||||
* @param[out] *pDst points to the Q15 output vector
|
||||
* @param[in] blockSize length of the input vector
|
||||
* @return none.
|
||||
*
|
||||
*/
|
||||
|
||||
void arm_q7_to_q15_reordered_no_shift(const q7_t * pSrc, q15_t * pDst, uint32_t blockSize);
|
||||
|
||||
#if defined (ARM_MATH_DSP)
|
||||
|
||||
/**
|
||||
* @brief read and expand one Q7 word into two Q15 words
|
||||
*/
|
||||
|
||||
__STATIC_FORCEINLINE void *read_and_pad(void *source, q31_t * out1, q31_t * out2)
|
||||
{
|
||||
q31_t inA = *__SIMD32(source)++;
|
||||
q31_t inAbuf1 = __SXTB16(__ROR(inA, 8));
|
||||
q31_t inAbuf2 = __SXTB16(inA);
|
||||
|
||||
#ifndef ARM_MATH_BIG_ENDIAN
|
||||
*out2 = __PKHTB(inAbuf1, inAbuf2, 16);
|
||||
*out1 = __PKHBT(inAbuf2, inAbuf1, 16);
|
||||
#else
|
||||
*out1 = __PKHTB(inAbuf1, inAbuf2, 16);
|
||||
*out2 = __PKHBT(inAbuf2, inAbuf1, 16);
|
||||
#endif
|
||||
|
||||
return source;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief read and expand one Q7 word into two Q15 words with reordering
|
||||
*/
|
||||
|
||||
__STATIC_FORCEINLINE void *read_and_pad_reordered(void *source, q31_t * out1, q31_t * out2)
|
||||
{
|
||||
q31_t inA = *__SIMD32(source)++;
|
||||
#ifndef ARM_MATH_BIG_ENDIAN
|
||||
*out2 = __SXTB16(__ROR(inA, 8));
|
||||
*out1 = __SXTB16(inA);
|
||||
#else
|
||||
*out1 = __SXTB16(__ROR(inA, 8));
|
||||
*out2 = __SXTB16(inA);
|
||||
#endif
|
||||
|
||||
return source;
|
||||
}
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @defgroup NNBasicMath Basic Math Functions for Neural Network Computation
|
||||
*
|
||||
* Basic Math Functions for Neural Network Computation
|
||||
*
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Q7 vector multiplication with variable output shifts
|
||||
* @param[in] *pSrcA pointer to the first input vector
|
||||
* @param[in] *pSrcB pointer to the second input vector
|
||||
* @param[out] *pDst pointer to the output vector
|
||||
* @param[in] out_shift amount of right-shift for output
|
||||
* @param[in] blockSize number of samples in each vector
|
||||
* @return none.
|
||||
*
|
||||
* <b>Scaling and Overflow Behavior:</b>
|
||||
* \par
|
||||
* The function uses saturating arithmetic.
|
||||
* Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated.
|
||||
*/
|
||||
|
||||
void arm_nn_mult_q15(
|
||||
q15_t * pSrcA,
|
||||
q15_t * pSrcB,
|
||||
q15_t * pDst,
|
||||
const uint16_t out_shift,
|
||||
uint32_t blockSize);
|
||||
|
||||
/**
|
||||
* @brief Q7 vector multiplication with variable output shifts
|
||||
* @param[in] *pSrcA pointer to the first input vector
|
||||
* @param[in] *pSrcB pointer to the second input vector
|
||||
* @param[out] *pDst pointer to the output vector
|
||||
* @param[in] out_shift amount of right-shift for output
|
||||
* @param[in] blockSize number of samples in each vector
|
||||
* @return none.
|
||||
*
|
||||
* <b>Scaling and Overflow Behavior:</b>
|
||||
* \par
|
||||
* The function uses saturating arithmetic.
|
||||
* Results outside of the allowable Q7 range [0x80 0x7F] will be saturated.
|
||||
*/
|
||||
|
||||
void arm_nn_mult_q7(
|
||||
q7_t * pSrcA,
|
||||
q7_t * pSrcB,
|
||||
q7_t * pDst,
|
||||
const uint16_t out_shift,
|
||||
uint32_t blockSize);
|
||||
|
||||
/**
|
||||
* @brief defition to adding rouding offset
|
||||
*/
|
||||
#ifndef ARM_NN_TRUNCATE
|
||||
#define NN_ROUND(out_shift) ( 0x1 << (out_shift - 1) )
|
||||
#else
|
||||
#define NN_ROUND(out_shift) 0
|
||||
#endif
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,20 @@
|
||||
|
||||
/*
|
||||
* Auto generated Run-Time-Environment Component Configuration File
|
||||
* *** Do not modify ! ***
|
||||
*
|
||||
* Project: 'arm_nnexamples_cifar10'
|
||||
* Target: 'ARMCM0'
|
||||
*/
|
||||
|
||||
#ifndef RTE_COMPONENTS_H
|
||||
#define RTE_COMPONENTS_H
|
||||
|
||||
|
||||
/*
|
||||
* Define the Device Header File:
|
||||
*/
|
||||
#define CMSIS_device_header "ARMCM0.h"
|
||||
|
||||
|
||||
#endif /* RTE_COMPONENTS_H */
|
||||
@@ -0,0 +1,26 @@
|
||||
|
||||
/*
|
||||
* Auto generated Run-Time-Environment Component Configuration File
|
||||
* *** Do not modify ! ***
|
||||
*
|
||||
* Project: 'arm_nnexamples_nn_test'
|
||||
* Target: 'ARMCM3'
|
||||
*/
|
||||
|
||||
#ifndef RTE_COMPONENTS_H
|
||||
#define RTE_COMPONENTS_H
|
||||
|
||||
|
||||
/*
|
||||
* Define the Device Header File:
|
||||
*/
|
||||
#define CMSIS_device_header "ARMCM3.h"
|
||||
|
||||
#define RTE_Compiler_IO_STDERR /* Compiler I/O: STDERR */
|
||||
#define RTE_Compiler_IO_STDERR_ITM /* Compiler I/O: STDERR ITM */
|
||||
#define RTE_Compiler_IO_STDOUT /* Compiler I/O: STDOUT */
|
||||
#define RTE_Compiler_IO_STDOUT_ITM /* Compiler I/O: STDOUT ITM */
|
||||
#define RTE_Compiler_IO_TTY /* Compiler I/O: TTY */
|
||||
#define RTE_Compiler_IO_TTY_ITM /* Compiler I/O: TTY ITM */
|
||||
|
||||
#endif /* RTE_COMPONENTS_H */
|
||||
@@ -0,0 +1,26 @@
|
||||
|
||||
/*
|
||||
* Auto generated Run-Time-Environment Component Configuration File
|
||||
* *** Do not modify ! ***
|
||||
*
|
||||
* Project: 'arm_nnexamples_nn_test'
|
||||
* Target: 'ARMCM4_FP'
|
||||
*/
|
||||
|
||||
#ifndef RTE_COMPONENTS_H
|
||||
#define RTE_COMPONENTS_H
|
||||
|
||||
|
||||
/*
|
||||
* Define the Device Header File:
|
||||
*/
|
||||
#define CMSIS_device_header "ARMCM4_FP.h"
|
||||
|
||||
#define RTE_Compiler_IO_STDERR /* Compiler I/O: STDERR */
|
||||
#define RTE_Compiler_IO_STDERR_ITM /* Compiler I/O: STDERR ITM */
|
||||
#define RTE_Compiler_IO_STDOUT /* Compiler I/O: STDOUT */
|
||||
#define RTE_Compiler_IO_STDOUT_ITM /* Compiler I/O: STDOUT ITM */
|
||||
#define RTE_Compiler_IO_TTY /* Compiler I/O: TTY */
|
||||
#define RTE_Compiler_IO_TTY_ITM /* Compiler I/O: TTY ITM */
|
||||
|
||||
#endif /* RTE_COMPONENTS_H */
|
||||
@@ -0,0 +1,26 @@
|
||||
|
||||
/*
|
||||
* Auto generated Run-Time-Environment Component Configuration File
|
||||
* *** Do not modify ! ***
|
||||
*
|
||||
* Project: 'arm_nnexamples_nn_test'
|
||||
* Target: 'ARMCM7_SP'
|
||||
*/
|
||||
|
||||
#ifndef RTE_COMPONENTS_H
|
||||
#define RTE_COMPONENTS_H
|
||||
|
||||
|
||||
/*
|
||||
* Define the Device Header File:
|
||||
*/
|
||||
#define CMSIS_device_header "ARMCM7_SP.h"
|
||||
|
||||
#define RTE_Compiler_IO_STDERR /* Compiler I/O: STDERR */
|
||||
#define RTE_Compiler_IO_STDERR_ITM /* Compiler I/O: STDERR ITM */
|
||||
#define RTE_Compiler_IO_STDOUT /* Compiler I/O: STDOUT */
|
||||
#define RTE_Compiler_IO_STDOUT_ITM /* Compiler I/O: STDOUT ITM */
|
||||
#define RTE_Compiler_IO_TTY /* Compiler I/O: TTY */
|
||||
#define RTE_Compiler_IO_TTY_ITM /* Compiler I/O: TTY ITM */
|
||||
|
||||
#endif /* RTE_COMPONENTS_H */
|
||||
@@ -0,0 +1,71 @@
|
||||
/*
|
||||
* Copyright (C) 2010-2018 Arm Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#include "ref_functions.h"
|
||||
|
||||
void arm_convolve_HWC_q15_ref(const q15_t * Im_in, // input image
|
||||
const uint16_t dim_im_in, // input image dimention
|
||||
const uint16_t ch_im_in, // number of input image channels
|
||||
const q15_t * wt, // kernel weights
|
||||
const uint16_t ch_im_out, // number of filters, i.e., output image channels
|
||||
const uint16_t dim_kernel, // filter kernel size
|
||||
const uint16_t padding, // padding sizes
|
||||
const uint16_t stride, // stride
|
||||
const q15_t * bias, // bias
|
||||
const uint16_t bias_shift, const uint16_t out_shift, q15_t * Im_out, // output image
|
||||
const uint16_t dim_im_out, // output image dimension
|
||||
q15_t * bufferA, //buffer space for input
|
||||
q7_t * bufferB //buffer space for output
|
||||
)
|
||||
{
|
||||
int i, j, k, l, m, n;
|
||||
int conv_out;
|
||||
int in_row, in_col;
|
||||
|
||||
for (i = 0; i < ch_im_out; i++)
|
||||
{
|
||||
for (j = 0; j < dim_im_out; j++)
|
||||
{
|
||||
for (k = 0; k < dim_im_out; k++)
|
||||
{
|
||||
#ifndef ARM_NN_TRUNCATE
|
||||
conv_out = (bias[i] << bias_shift) + (0x1 << (out_shift - 1));
|
||||
#else
|
||||
conv_out = bias[i] << bias_shift;
|
||||
#endif
|
||||
for (m = 0; m < dim_kernel; m++)
|
||||
{
|
||||
for (n = 0; n < dim_kernel; n++)
|
||||
{
|
||||
in_row = stride * j + m - padding;
|
||||
in_col = stride * k + n - padding;
|
||||
if (in_row >= 0 && in_col >= 0 && in_row < dim_im_in && in_col < dim_im_in)
|
||||
{
|
||||
for (l = 0; l < ch_im_in; l++)
|
||||
{
|
||||
conv_out += Im_in[(in_row * dim_im_in + in_col) * ch_im_in + l] *
|
||||
wt[i * ch_im_in * dim_kernel * dim_kernel + (m * dim_kernel + n) * ch_im_in + l];
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
Im_out[i + (j * dim_im_out + k) * ch_im_out] = (q15_t) __SSAT((conv_out >> out_shift), 16);
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
@@ -0,0 +1,83 @@
|
||||
/*
|
||||
* Copyright (C) 2010-2018 Arm Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#include "ref_functions.h"
|
||||
|
||||
void
|
||||
arm_convolve_HWC_q15_nonsquare_ref(const q15_t * Im_in,
|
||||
const uint16_t dim_im_in_x,
|
||||
const uint16_t dim_im_in_y,
|
||||
const uint16_t ch_im_in,
|
||||
const q15_t * wt,
|
||||
const uint16_t ch_im_out,
|
||||
const uint16_t dim_kernel_x,
|
||||
const uint16_t dim_kernel_y,
|
||||
const uint16_t padding_x,
|
||||
const uint16_t padding_y,
|
||||
const uint16_t stride_x,
|
||||
const uint16_t stride_y,
|
||||
const q15_t * bias,
|
||||
const uint16_t bias_shift,
|
||||
const uint16_t out_shift,
|
||||
q15_t * Im_out,
|
||||
const uint16_t dim_im_out_x,
|
||||
const uint16_t dim_im_out_y,
|
||||
q15_t * bufferA,
|
||||
q7_t * bufferB)
|
||||
|
||||
{
|
||||
uint16_t i, j, k, l, m, n;
|
||||
int conv_out;
|
||||
signed char in_row, in_col;
|
||||
|
||||
for (i = 0; i < ch_im_out; i++)
|
||||
{
|
||||
for (j = 0; j < dim_im_out_y; j++)
|
||||
{
|
||||
for (k = 0; k < dim_im_out_x; k++)
|
||||
{
|
||||
#ifndef ARM_NN_TRUNCATE
|
||||
conv_out = (bias[i] << bias_shift) + (0x1 << (out_shift - 1));
|
||||
#else
|
||||
conv_out = bias[i] << bias_shift;
|
||||
#endif
|
||||
for (m = 0; m < dim_kernel_y; m++)
|
||||
{
|
||||
for (n = 0; n < dim_kernel_x; n++)
|
||||
{
|
||||
in_row = stride_y * j + m - padding_y;
|
||||
in_col = stride_x * k + n - padding_x;
|
||||
if (in_row >= 0 && in_col >= 0 && in_row < dim_im_in_y && in_col < dim_im_in_x)
|
||||
{
|
||||
for (l = 0; l < ch_im_in; l++)
|
||||
{
|
||||
conv_out +=
|
||||
Im_in[(in_row * dim_im_in_x + in_col) * ch_im_in +
|
||||
l] * wt[i * ch_im_in * dim_kernel_x * dim_kernel_y + (m * dim_kernel_x +
|
||||
n) * ch_im_in + l];
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
Im_out[i + (j * dim_im_out_x + k) * ch_im_out] = (q15_t) __SSAT((conv_out >> out_shift), 16);
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
@@ -0,0 +1,72 @@
|
||||
/*
|
||||
* Copyright (C) 2010-2018 Arm Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#include "ref_functions.h"
|
||||
|
||||
void arm_convolve_HWC_q7_ref(const q7_t * Im_in, // input image
|
||||
const uint16_t dim_im_in, // input image dimention
|
||||
const uint16_t ch_im_in, // number of input image channels
|
||||
const q7_t * wt, // kernel weights
|
||||
const uint16_t ch_im_out, // number of filters, i.e., output image channels
|
||||
const uint16_t dim_kernel, // filter kernel size
|
||||
const uint16_t padding, // padding sizes
|
||||
const uint16_t stride, // stride
|
||||
const q7_t * bias, // bias
|
||||
const uint16_t bias_shift, const uint16_t out_shift, q7_t * Im_out, // output image
|
||||
const uint16_t dim_im_out, // output image dimension
|
||||
q15_t * bufferA, //buffer space for input
|
||||
q7_t * bufferB //buffer space for output
|
||||
)
|
||||
{
|
||||
int i, j, k, l, m, n;
|
||||
int conv_out;
|
||||
int in_row, in_col;
|
||||
|
||||
for (i = 0; i < ch_im_out; i++)
|
||||
{
|
||||
for (j = 0; j < dim_im_out; j++)
|
||||
{
|
||||
for (k = 0; k < dim_im_out; k++)
|
||||
{
|
||||
#ifndef ARM_NN_TRUNCATE
|
||||
conv_out = ((q31_t) (bias[i]) << bias_shift) + (0x1 << (out_shift - 1));
|
||||
#else
|
||||
conv_out = bias[i] << bias_shift;
|
||||
#endif
|
||||
for (m = 0; m < dim_kernel; m++)
|
||||
{
|
||||
for (n = 0; n < dim_kernel; n++)
|
||||
{
|
||||
// if-for implementation
|
||||
in_row = stride * j + m - padding;
|
||||
in_col = stride * k + n - padding;
|
||||
if (in_row >= 0 && in_col >= 0 && in_row < dim_im_in && in_col < dim_im_in)
|
||||
{
|
||||
for (l = 0; l < ch_im_in; l++)
|
||||
{
|
||||
conv_out += Im_in[(in_row * dim_im_in + in_col) * ch_im_in + l] *
|
||||
wt[i * ch_im_in * dim_kernel * dim_kernel + (m * dim_kernel + n) * ch_im_in + l];
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
Im_out[i + (j * dim_im_out + k) * ch_im_out] = (q7_t) __SSAT((conv_out >> out_shift), 8);
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
@@ -0,0 +1,78 @@
|
||||
/*
|
||||
* Copyright (C) 2010-2018 Arm Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#include "ref_functions.h"
|
||||
|
||||
void arm_convolve_HWC_q7_ref_nonsquare(const q7_t * Im_in, // input image
|
||||
const uint16_t dim_im_in_x, // input image dimention x
|
||||
const uint16_t dim_im_in_y, // input image dimention y
|
||||
const uint16_t ch_im_in, // number of input image channels
|
||||
const q7_t * wt, // kernel weights
|
||||
const uint16_t ch_im_out, // number of filters, i.e., output image channels
|
||||
const uint16_t dim_kernel_x, // filter kernel size x
|
||||
const uint16_t dim_kernel_y, // filter kernel size y
|
||||
const uint16_t padding_x, // padding sizes x
|
||||
const uint16_t padding_y, // padding sizes y
|
||||
const uint16_t stride_x, // stride x
|
||||
const uint16_t stride_y, // stride y
|
||||
const q7_t * bias, // bias
|
||||
const uint16_t bias_shift, const uint16_t out_shift, q7_t * Im_out, // output image
|
||||
const uint16_t dim_im_out_x, // output image dimension x
|
||||
const uint16_t dim_im_out_y, // output image dimension y
|
||||
q15_t * bufferA, //buffer space for input
|
||||
q7_t * bufferB //buffer space for output
|
||||
)
|
||||
{
|
||||
int i, j, k, l, m, n;
|
||||
int conv_out;
|
||||
int in_row, in_col;
|
||||
|
||||
for (i = 0; i < ch_im_out; i++)
|
||||
{
|
||||
for (j = 0; j < dim_im_out_y; j++)
|
||||
{
|
||||
for (k = 0; k < dim_im_out_x; k++)
|
||||
{
|
||||
#ifndef ARM_NN_TRUNCATE
|
||||
conv_out = ((q31_t) (bias[i]) << bias_shift) + (0x1 << (out_shift - 1));
|
||||
#else
|
||||
conv_out = bias[i] << bias_shift;
|
||||
#endif
|
||||
for (m = 0; m < dim_kernel_y; m++)
|
||||
{
|
||||
for (n = 0; n < dim_kernel_x; n++)
|
||||
{
|
||||
// if-for implementation
|
||||
in_row = stride_y * j + m - padding_y;
|
||||
in_col = stride_x * k + n - padding_x;
|
||||
if (in_row >= 0 && in_col >= 0 && in_row < dim_im_in_y && in_col < dim_im_in_x)
|
||||
{
|
||||
for (l = 0; l < ch_im_in; l++)
|
||||
{
|
||||
conv_out += Im_in[(in_row * dim_im_in_x + in_col) * ch_im_in + l] *
|
||||
wt[i * ch_im_in * dim_kernel_y * dim_kernel_x + (m * dim_kernel_x + n) * ch_im_in +
|
||||
l];
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
Im_out[i + (j * dim_im_out_x + k) * ch_im_out] = (q7_t) __SSAT((conv_out >> out_shift), 8);
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
@@ -0,0 +1,70 @@
|
||||
/*
|
||||
* Copyright (C) 2010-2018 Arm Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#include "ref_functions.h"
|
||||
|
||||
void arm_depthwise_separable_conv_HWC_q7_ref(const q7_t * Im_in, // input image
|
||||
const uint16_t dim_im_in, // input image dimention
|
||||
const uint16_t ch_im_in, // number of input image channels
|
||||
const q7_t * wt, // kernel weights
|
||||
const uint16_t ch_im_out, // number of filters, i.e., output image channels
|
||||
const uint16_t dim_kernel, // filter kernel size
|
||||
const uint16_t padding, // padding sizes
|
||||
const uint16_t stride, // stride
|
||||
const q7_t * bias, // bias
|
||||
const uint16_t bias_shift, // amount of left-shift for bias
|
||||
const uint16_t out_shift, // amount of right-shift for output
|
||||
q7_t * Im_out, // output image
|
||||
const uint16_t dim_im_out, // output image dimension
|
||||
q15_t * bufferA, //buffer space for input
|
||||
q7_t * bufferB //buffer space for output
|
||||
)
|
||||
{
|
||||
int i_out_y, i_out_x, i_ch_out;
|
||||
int i_ker_y, i_ker_x;
|
||||
for (i_out_y = 0; i_out_y < dim_im_out; i_out_y++)
|
||||
{
|
||||
for (i_out_x = 0; i_out_x < dim_im_out; i_out_x++)
|
||||
{
|
||||
for (i_ch_out = 0; i_ch_out < ch_im_out; i_ch_out++)
|
||||
{
|
||||
// for each output
|
||||
#ifndef ARM_NN_TRUNCATE
|
||||
int conv_out = (bias[i_ch_out] << bias_shift) + (0x1 << (out_shift - 1));
|
||||
#else
|
||||
int conv_out = bias[i_ch_out] << bias_shift;
|
||||
#endif
|
||||
for (i_ker_y = 0; i_ker_y < dim_kernel; i_ker_y++)
|
||||
{
|
||||
for (i_ker_x = 0; i_ker_x < dim_kernel; i_ker_x++)
|
||||
{
|
||||
int in_row = stride * i_out_y + i_ker_y - padding;
|
||||
int in_col = stride * i_out_x + i_ker_x - padding;
|
||||
if (in_row >= 0 && in_col >= 0 && in_row < dim_im_in && in_col < dim_im_in)
|
||||
{
|
||||
conv_out += Im_in[(in_row * dim_im_in + in_col) * ch_im_in + i_ch_out] *
|
||||
wt[(i_ker_y * dim_kernel + i_ker_x) * ch_im_out + i_ch_out];
|
||||
}
|
||||
}
|
||||
}
|
||||
Im_out[(i_out_y * dim_im_out + i_out_x) * ch_im_out + i_ch_out] =
|
||||
(q7_t) __SSAT((conv_out >> out_shift), 8);
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
@@ -0,0 +1,75 @@
|
||||
/*
|
||||
* Copyright (C) 2010-2018 Arm Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#include "ref_functions.h"
|
||||
|
||||
void arm_depthwise_separable_conv_HWC_q7_ref_nonsquare(const q7_t * Im_in, // input image
|
||||
const uint16_t dim_im_in_x, // input image dimention x
|
||||
const uint16_t dim_im_in_y, // input image dimention y
|
||||
const uint16_t ch_im_in, // number of input image channels
|
||||
const q7_t * wt, // kernel weights
|
||||
const uint16_t ch_im_out, // number of filters, i.e., output image channels
|
||||
const uint16_t dim_kernel_x, // filter kernel size x
|
||||
const uint16_t dim_kernel_y, // filter kernel size y
|
||||
const uint16_t padding_x, // padding sizes x
|
||||
const uint16_t padding_y, // padding sizes y
|
||||
const uint16_t stride_x, // stride x
|
||||
const uint16_t stride_y, // stride y
|
||||
const q7_t * bias, // bias
|
||||
const uint16_t bias_shift, // amount of left-shift for bias
|
||||
const uint16_t out_shift, // amount of right-shift for output
|
||||
q7_t * Im_out, // output image
|
||||
const uint16_t dim_im_out_x, // output image dimension x
|
||||
const uint16_t dim_im_out_y, // output image dimension y
|
||||
q15_t * bufferA, //buffer space for input
|
||||
q7_t * bufferB //buffer space for output
|
||||
)
|
||||
{
|
||||
int i_out_y, i_out_x, i_ch_out;
|
||||
int i_ker_y, i_ker_x;
|
||||
for (i_out_y = 0; i_out_y < dim_im_out_y; i_out_y++)
|
||||
{
|
||||
for (i_out_x = 0; i_out_x < dim_im_out_x; i_out_x++)
|
||||
{
|
||||
for (i_ch_out = 0; i_ch_out < ch_im_out; i_ch_out++)
|
||||
{
|
||||
// for each output
|
||||
#ifndef ARM_NN_TRUNCATE
|
||||
int conv_out = (bias[i_ch_out] << bias_shift) + (0x1 << (out_shift - 1));
|
||||
#else
|
||||
int conv_out = bias[i_ch_out] << bias_shift;
|
||||
#endif
|
||||
for (i_ker_y = 0; i_ker_y < dim_kernel_y; i_ker_y++)
|
||||
{
|
||||
for (i_ker_x = 0; i_ker_x < dim_kernel_x; i_ker_x++)
|
||||
{
|
||||
int in_row = stride_y * i_out_y + i_ker_y - padding_y;
|
||||
int in_col = stride_x * i_out_x + i_ker_x - padding_x;
|
||||
if (in_row >= 0 && in_col >= 0 && in_row < dim_im_in_y && in_col < dim_im_in_x)
|
||||
{
|
||||
conv_out += Im_in[(in_row * dim_im_in_x + in_col) * ch_im_in + i_ch_out] *
|
||||
wt[(i_ker_y * dim_kernel_x + i_ker_x) * ch_im_out + i_ch_out];
|
||||
}
|
||||
}
|
||||
}
|
||||
Im_out[(i_out_y * dim_im_out_x + i_out_x) * ch_im_out + i_ch_out] =
|
||||
(q7_t) __SSAT((conv_out >> out_shift), 8);
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
@@ -0,0 +1,120 @@
|
||||
/*
|
||||
* Copyright (C) 2010-2018 Arm Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#include "ref_functions.h"
|
||||
|
||||
void arm_fully_connected_mat_q7_vec_q15_opt_ref(const q15_t * pV, // pointer to vector
|
||||
const q7_t * pM, // pointer to matrix
|
||||
const uint16_t dim_vec, // length of the vector
|
||||
const uint16_t num_of_rows, // numCol of A
|
||||
const uint16_t bias_shift, // amount of left-shift for bias
|
||||
const uint16_t out_shift, // amount of right-shift for output
|
||||
const q7_t * bias, q15_t * pOut, // output operand
|
||||
q15_t * vec_buffer)
|
||||
{
|
||||
|
||||
uint16_t rowCnt = num_of_rows >> 2;
|
||||
const q7_t *pB = pM;
|
||||
const q15_t *pA;
|
||||
q15_t *pO = pOut;
|
||||
const q7_t *pBias = bias;
|
||||
|
||||
while (rowCnt)
|
||||
{
|
||||
pA = pV;
|
||||
#ifndef ARM_NN_TRUNCATE
|
||||
q31_t sum = (*pBias++ << bias_shift) + (0x1 << (out_shift - 1));
|
||||
q31_t sum2 = (*pBias++ << bias_shift) + (0x1 << (out_shift - 1));
|
||||
q31_t sum3 = (*pBias++ << bias_shift) + (0x1 << (out_shift - 1));
|
||||
q31_t sum4 = (*pBias++ << bias_shift) + (0x1 << (out_shift - 1));
|
||||
#else
|
||||
q31_t sum = *pBias++ << bias_shift;
|
||||
q31_t sum2 = *pBias++ << bias_shift;
|
||||
q31_t sum3 = *pBias++ << bias_shift;
|
||||
q31_t sum4 = *pBias++ << bias_shift;
|
||||
#endif
|
||||
|
||||
uint16_t colCnt = dim_vec >> 1;
|
||||
|
||||
while (colCnt)
|
||||
{
|
||||
q15_t inA1 = *pA++;
|
||||
q15_t inA2 = *pA++;
|
||||
|
||||
q7_t inB1 = *pB++;
|
||||
q7_t inB3 = *pB++;
|
||||
q7_t inB2 = *pB++;
|
||||
q7_t inB4 = *pB++;
|
||||
|
||||
sum += inA1 * inB1 + inA2 * inB2;
|
||||
sum2 += inA1 * inB3 + inA2 * inB4;
|
||||
|
||||
inB1 = *pB++;
|
||||
inB3 = *pB++;
|
||||
inB2 = *pB++;
|
||||
inB4 = *pB++;
|
||||
|
||||
sum3 += inA1 * inB1 + inA2 * inB2;
|
||||
sum4 += inA1 * inB3 + inA2 * inB4;
|
||||
|
||||
colCnt--;
|
||||
}
|
||||
colCnt = dim_vec & 0x1;
|
||||
while (colCnt)
|
||||
{
|
||||
q15_t inA = *pA++;
|
||||
q7_t inB = *pB++;
|
||||
sum += inA * inB;
|
||||
inB = *pB++;
|
||||
sum2 += inA * inB;
|
||||
inB = *pB++;
|
||||
sum3 += inA * inB;
|
||||
inB = *pB++;
|
||||
sum4 += inA * inB;
|
||||
|
||||
colCnt--;
|
||||
}
|
||||
*pO++ = (q15_t) __SSAT((sum >> out_shift), 16);
|
||||
*pO++ = (q15_t) __SSAT((sum2 >> out_shift), 16);
|
||||
*pO++ = (q15_t) __SSAT((sum3 >> out_shift), 16);
|
||||
*pO++ = (q15_t) __SSAT((sum4 >> out_shift), 16);
|
||||
|
||||
rowCnt--;
|
||||
}
|
||||
|
||||
rowCnt = num_of_rows & 0x3;
|
||||
|
||||
while (rowCnt)
|
||||
{
|
||||
pA = pV;
|
||||
#ifndef ARM_NN_TRUNCATE
|
||||
int ip_out = (*pBias++ << bias_shift) + (0x1 << (out_shift - 1));
|
||||
#else
|
||||
int ip_out = *pBias++ << bias_shift;
|
||||
#endif
|
||||
for (int j = 0; j < dim_vec; j++)
|
||||
{
|
||||
q15_t inA = *pA++;
|
||||
q7_t inB = *pB++;
|
||||
ip_out += inA * inB;
|
||||
}
|
||||
*pO++ = (q15_t) __SSAT((ip_out >> out_shift), 16);
|
||||
|
||||
rowCnt--;
|
||||
}
|
||||
}
|
||||
@@ -0,0 +1,43 @@
|
||||
/*
|
||||
* Copyright (C) 2010-2018 Arm Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#include "ref_functions.h"
|
||||
|
||||
void arm_fully_connected_mat_q7_vec_q15_ref(const q15_t * pV, // pointer to vector
|
||||
const q7_t * pM, // pointer to matrix
|
||||
const uint16_t dim_vec, // length of the vector
|
||||
const uint16_t num_of_rows, // numCol of A
|
||||
const uint16_t bias_shift, // amount of left-shift for bias
|
||||
const uint16_t out_shift, // amount of right-shift for output
|
||||
const q7_t * bias, q15_t * pOut, // output operand
|
||||
q15_t * vec_buffer)
|
||||
{
|
||||
for (int i = 0; i < num_of_rows; i++)
|
||||
{
|
||||
#ifndef ARM_NN_TRUNCATE
|
||||
int ip_out = (bias[i] << bias_shift) + (0x1 << (out_shift - 1));
|
||||
#else
|
||||
int ip_out = bias[i] << bias_shift;
|
||||
#endif
|
||||
for (int j = 0; j < dim_vec; j++)
|
||||
{
|
||||
ip_out += pV[j] * pM[i * dim_vec + j];
|
||||
}
|
||||
pOut[i] = (q15_t) __SSAT((ip_out >> out_shift), 16);
|
||||
}
|
||||
}
|
||||
@@ -0,0 +1,119 @@
|
||||
/*
|
||||
* Copyright (C) 2010-2018 Arm Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#include "ref_functions.h"
|
||||
|
||||
void arm_fully_connected_q15_opt_ref(const q15_t * pV, // pointer to vector
|
||||
const q15_t * pM, // pointer to matrix
|
||||
const uint16_t dim_vec, // length of the vector
|
||||
const uint16_t num_of_rows, // numCol of A
|
||||
const uint16_t bias_shift, // amount of left-shift for bias
|
||||
const uint16_t out_shift, // amount of right-shift for output
|
||||
const q15_t * bias, q15_t * pOut, // output operand
|
||||
q15_t * vec_buffer)
|
||||
{
|
||||
|
||||
uint16_t rowCnt = num_of_rows >> 2;
|
||||
const q15_t *pB = pM;
|
||||
const q15_t *pA;
|
||||
q15_t *pO = pOut;
|
||||
const q15_t *pBias = bias;
|
||||
|
||||
while (rowCnt)
|
||||
{
|
||||
pA = pV;
|
||||
#ifndef ARM_NN_TRUNCATE
|
||||
q31_t sum = (*pBias++ << bias_shift) + (0x1 << (out_shift - 1));
|
||||
q31_t sum2 = (*pBias++ << bias_shift) + (0x1 << (out_shift - 1));
|
||||
q31_t sum3 = (*pBias++ << bias_shift) + (0x1 << (out_shift - 1));
|
||||
q31_t sum4 = (*pBias++ << bias_shift) + (0x1 << (out_shift - 1));
|
||||
#else
|
||||
q31_t sum = *pBias++ << bias_shift;
|
||||
q31_t sum2 = *pBias++ << bias_shift;
|
||||
q31_t sum3 = *pBias++ << bias_shift;
|
||||
q31_t sum4 = *pBias++ << bias_shift;
|
||||
#endif
|
||||
|
||||
uint16_t colCnt = dim_vec >> 1;
|
||||
|
||||
while (colCnt)
|
||||
{
|
||||
q15_t inA1 = *pA++;
|
||||
q15_t inA2 = *pA++;
|
||||
|
||||
q15_t inB1 = *pB++;
|
||||
q15_t inB2 = *pB++;
|
||||
sum += inA1 * inB1 + inA2 * inB2;
|
||||
|
||||
inB1 = *pB++;
|
||||
inB2 = *pB++;
|
||||
sum2 += inA1 * inB1 + inA2 * inB2;
|
||||
|
||||
inB1 = *pB++;
|
||||
inB2 = *pB++;
|
||||
sum3 += inA1 * inB1 + inA2 * inB2;
|
||||
|
||||
inB1 = *pB++;
|
||||
inB2 = *pB++;
|
||||
sum4 += inA1 * inB1 + inA2 * inB2;
|
||||
|
||||
colCnt--;
|
||||
}
|
||||
colCnt = dim_vec & 0x1;
|
||||
while (colCnt)
|
||||
{
|
||||
q15_t inA = *pA++;
|
||||
q15_t inB = *pB++;
|
||||
sum += inA * inB;
|
||||
inB = *pB++;
|
||||
sum2 += inA * inB;
|
||||
inB = *pB++;
|
||||
sum3 += inA * inB;
|
||||
inB = *pB++;
|
||||
sum4 += inA * inB;
|
||||
colCnt--;
|
||||
}
|
||||
*pO++ = (q15_t) __SSAT((sum >> out_shift), 16);
|
||||
*pO++ = (q15_t) __SSAT((sum2 >> out_shift), 16);
|
||||
*pO++ = (q15_t) __SSAT((sum3 >> out_shift), 16);
|
||||
*pO++ = (q15_t) __SSAT((sum4 >> out_shift), 16);
|
||||
|
||||
rowCnt--;
|
||||
}
|
||||
|
||||
rowCnt = num_of_rows & 0x3;
|
||||
|
||||
while (rowCnt)
|
||||
{
|
||||
pA = pV;
|
||||
#ifndef ARM_NN_TRUNCATE
|
||||
int ip_out = (*pBias++ << bias_shift) + (0x1 << (out_shift - 1));
|
||||
#else
|
||||
int ip_out = *pBias++ << bias_shift;
|
||||
#endif
|
||||
for (int j = 0; j < dim_vec; j++)
|
||||
{
|
||||
q15_t inA = *pA++;
|
||||
q15_t inB = *pB++;
|
||||
ip_out += inA * inB;
|
||||
}
|
||||
*pO++ = (q15_t) __SSAT((ip_out >> out_shift), 16);
|
||||
|
||||
rowCnt--;
|
||||
}
|
||||
}
|
||||
@@ -0,0 +1,43 @@
|
||||
/*
|
||||
* Copyright (C) 2010-2018 Arm Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#include "ref_functions.h"
|
||||
|
||||
void arm_fully_connected_q15_ref(const q15_t * pV, // pointer to vector
|
||||
const q15_t * pM, // pointer to matrix
|
||||
const uint16_t dim_vec, // length of the vector
|
||||
const uint16_t num_of_rows, // numCol of A
|
||||
const uint16_t bias_shift, // amount of left-shift for bias
|
||||
const uint16_t out_shift, // amount of right-shift for output
|
||||
const q15_t * bias, q15_t * pOut, // output operand
|
||||
q15_t * vec_buffer)
|
||||
{
|
||||
for (int i = 0; i < num_of_rows; i++)
|
||||
{
|
||||
#ifndef ARM_NN_TRUNCATE
|
||||
int ip_out = (bias[i] << bias_shift) + (0x1 << (out_shift - 1));
|
||||
#else
|
||||
int ip_out = bias[i] << bias_shift;
|
||||
#endif
|
||||
for (int j = 0; j < dim_vec; j++)
|
||||
{
|
||||
ip_out += pV[j] * pM[i * dim_vec + j];
|
||||
}
|
||||
pOut[i] = (q15_t) __SSAT((ip_out >> out_shift), 16);
|
||||
}
|
||||
}
|
||||
@@ -0,0 +1,138 @@
|
||||
/*
|
||||
* Copyright (C) 2010-2018 Arm Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#include "ref_functions.h"
|
||||
|
||||
void arm_fully_connected_q7_opt_ref(const q7_t * pV, // pointer to vector
|
||||
const q7_t * pM, // pointer to matrix
|
||||
const uint16_t dim_vec, // length of the vector
|
||||
const uint16_t num_of_rows, // numCol of A
|
||||
const uint16_t bias_shift, // amount of left-shift for bias
|
||||
const uint16_t out_shift, // amount of right-shift for output
|
||||
const q7_t * bias, q7_t * pOut, // output operand
|
||||
q15_t * vec_buffer)
|
||||
{
|
||||
|
||||
uint16_t rowCnt = num_of_rows >> 2;
|
||||
const q7_t *pB = pM;
|
||||
const q7_t *pA;
|
||||
q7_t *pO = pOut;
|
||||
const q7_t *pBias = bias;
|
||||
|
||||
while (rowCnt)
|
||||
{
|
||||
pA = pV;
|
||||
#ifndef ARM_NN_TRUNCATE
|
||||
q31_t sum = (*pBias++ << bias_shift) + (0x1 << (out_shift - 1));
|
||||
q31_t sum2 = (*pBias++ << bias_shift) + (0x1 << (out_shift - 1));
|
||||
q31_t sum3 = (*pBias++ << bias_shift) + (0x1 << (out_shift - 1));
|
||||
q31_t sum4 = (*pBias++ << bias_shift) + (0x1 << (out_shift - 1));
|
||||
#else
|
||||
q31_t sum = *pBias++ << bias_shift;
|
||||
q31_t sum2 = *pBias++ << bias_shift;
|
||||
q31_t sum3 = *pBias++ << bias_shift;
|
||||
q31_t sum4 = *pBias++ << bias_shift;
|
||||
#endif
|
||||
|
||||
uint16_t colCnt = dim_vec >> 2;
|
||||
|
||||
while (colCnt)
|
||||
{
|
||||
q7_t inA1 = *pA++;
|
||||
q7_t inA3 = *pA++;
|
||||
q7_t inA2 = *pA++;
|
||||
q7_t inA4 = *pA++;
|
||||
|
||||
q7_t inB1 = *pB++;
|
||||
q7_t inB3 = *pB++;
|
||||
q7_t inB2 = *pB++;
|
||||
q7_t inB4 = *pB++;
|
||||
|
||||
sum += inA1 * inB1 + inA2 * inB2;
|
||||
sum2 += inA1 * inB3 + inA2 * inB4;
|
||||
|
||||
inB1 = *pB++;
|
||||
inB3 = *pB++;
|
||||
inB2 = *pB++;
|
||||
inB4 = *pB++;
|
||||
|
||||
sum3 += inA1 * inB1 + inA2 * inB2;
|
||||
sum4 += inA1 * inB3 + inA2 * inB4;
|
||||
|
||||
inB1 = *pB++;
|
||||
inB3 = *pB++;
|
||||
inB2 = *pB++;
|
||||
inB4 = *pB++;
|
||||
|
||||
sum += inA3 * inB1 + inA4 * inB2;
|
||||
sum2 += inA3 * inB3 + inA4 * inB4;
|
||||
|
||||
inB1 = *pB++;
|
||||
inB3 = *pB++;
|
||||
inB2 = *pB++;
|
||||
inB4 = *pB++;
|
||||
|
||||
sum3 += inA3 * inB1 + inA4 * inB2;
|
||||
sum4 += inA3 * inB3 + inA4 * inB4;
|
||||
|
||||
colCnt--;
|
||||
}
|
||||
colCnt = dim_vec & 0x3;
|
||||
while (colCnt)
|
||||
{
|
||||
q7_t inA = *pA++;
|
||||
q7_t inB = *pB++;
|
||||
sum += inA * inB;
|
||||
inB = *pB++;
|
||||
sum2 += inA * inB;
|
||||
inB = *pB++;
|
||||
sum3 += inA * inB;
|
||||
inB = *pB++;
|
||||
sum4 += inA * inB;
|
||||
|
||||
colCnt--;
|
||||
}
|
||||
*pO++ = (q7_t) __SSAT((sum >> out_shift), 8);
|
||||
*pO++ = (q7_t) __SSAT((sum2 >> out_shift), 8);
|
||||
*pO++ = (q7_t) __SSAT((sum3 >> out_shift), 8);
|
||||
*pO++ = (q7_t) __SSAT((sum4 >> out_shift), 8);
|
||||
|
||||
rowCnt--;
|
||||
}
|
||||
|
||||
rowCnt = num_of_rows & 0x3;
|
||||
|
||||
while (rowCnt)
|
||||
{
|
||||
pA = pV;
|
||||
#ifndef ARM_NN_TRUNCATE
|
||||
int ip_out = (*pBias++ << bias_shift) + (0x1 << (out_shift - 1));
|
||||
#else
|
||||
int ip_out = *pBias++ << bias_shift;
|
||||
#endif
|
||||
for (int j = 0; j < dim_vec; j++)
|
||||
{
|
||||
q7_t inA = *pA++;
|
||||
q7_t inB = *pB++;
|
||||
ip_out += inA * inB;
|
||||
}
|
||||
*pO++ = (q7_t) __SSAT((ip_out >> out_shift), 8);
|
||||
|
||||
rowCnt--;
|
||||
}
|
||||
}
|
||||
@@ -0,0 +1,43 @@
|
||||
/*
|
||||
* Copyright (C) 2010-2018 Arm Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#include "ref_functions.h"
|
||||
|
||||
void arm_fully_connected_q7_ref(const q7_t * pV, // pointer to vector
|
||||
const q7_t * pM, // pointer to matrix
|
||||
const uint16_t dim_vec, // length of the vector
|
||||
const uint16_t num_of_rows, // numCol of A
|
||||
const uint16_t bias_shift, // amount of left-shift for bias
|
||||
const uint16_t out_shift, // amount of right-shift for output
|
||||
const q7_t * bias, q7_t * pOut, // output operand
|
||||
q15_t * vec_buffer)
|
||||
{
|
||||
for (int i = 0; i < num_of_rows; i++)
|
||||
{
|
||||
#ifndef ARM_NN_TRUNCATE
|
||||
int ip_out = (bias[i] << bias_shift) + (0x1 << (out_shift - 1));
|
||||
#else
|
||||
int ip_out = bias[i] << bias_shift;
|
||||
#endif
|
||||
for (int j = 0; j < dim_vec; j++)
|
||||
{
|
||||
ip_out += pV[j] * pM[i * dim_vec + j];
|
||||
}
|
||||
pOut[i] = (q7_t) __SSAT((ip_out >> out_shift), 8);
|
||||
}
|
||||
}
|
||||
@@ -0,0 +1,58 @@
|
||||
/*
|
||||
* Copyright (C) 2010-2018 Arm Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#include "arm_math.h"
|
||||
#include "arm_nnfunctions.h"
|
||||
|
||||
void arm_nn_mult_q7_ref(q7_t * pSrcA,
|
||||
q7_t * pSrcB,
|
||||
q7_t * pDst,
|
||||
const uint16_t out_shift,
|
||||
uint32_t blockSize) {
|
||||
uint16_t i;
|
||||
|
||||
for (i = 0; i < blockSize; i++)
|
||||
{
|
||||
q31_t product = pSrcA[i] * pSrcB[i];
|
||||
#ifndef ARM_NN_TRUNCATE
|
||||
pDst[i] = (q7_t)__SSAT((product + (0x1 << (out_shift - 1)))>>out_shift, 8);
|
||||
#else
|
||||
pDst[i] = (q7_t)__SSAT(product >> out_shift, 8);
|
||||
#endif
|
||||
}
|
||||
}
|
||||
|
||||
void arm_nn_mult_q15_ref(q15_t * pSrcA,
|
||||
q15_t * pSrcB,
|
||||
q15_t * pDst,
|
||||
const uint16_t out_shift,
|
||||
uint32_t blockSize) {
|
||||
uint16_t i;
|
||||
|
||||
for (i = 0; i < blockSize; i++)
|
||||
{
|
||||
q31_t product = pSrcA[i] * pSrcB[i];
|
||||
#ifndef ARM_NN_TRUNCATE
|
||||
pDst[i] = (q15_t)__SSAT((product + (0x1 << (out_shift - 1)))>>out_shift, 16);
|
||||
#else
|
||||
pDst[i] = (q15_t)__SSAT(product >> out_shift, 16);
|
||||
#endif
|
||||
|
||||
|
||||
}
|
||||
}
|
||||
@@ -0,0 +1,96 @@
|
||||
/*
|
||||
* Copyright (C) 2010-2018 Arm Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#include "ref_functions.h"
|
||||
|
||||
void arm_avepool_q7_HWC_ref(const q7_t * Im_in, // input image
|
||||
const uint16_t dim_im_in, // input image dimension
|
||||
const uint16_t ch_im_in, // number of input image channels
|
||||
const uint16_t dim_kernel, // window kernel size
|
||||
const uint16_t padding, // padding sizes
|
||||
const uint16_t stride, // stride
|
||||
const uint16_t dim_im_out, // output image dimension
|
||||
q7_t * bufferA, // a buffer for local storage
|
||||
q7_t * Im_out)
|
||||
{
|
||||
int16_t i_ch_in, i_x, i_y;
|
||||
int16_t k_x, k_y;
|
||||
|
||||
for (i_ch_in = 0; i_ch_in < ch_im_in; i_ch_in++)
|
||||
{
|
||||
for (i_y = 0; i_y < dim_im_out; i_y++)
|
||||
{
|
||||
for (i_x = 0; i_x < dim_im_out; i_x++)
|
||||
{
|
||||
int sum = 0;
|
||||
int count = 0;
|
||||
for (k_y = i_y * stride - padding; k_y < i_y * stride - padding + dim_kernel; k_y++)
|
||||
{
|
||||
for (k_x = i_x * stride - padding; k_x < i_x * stride - padding + dim_kernel; k_x++)
|
||||
{
|
||||
if (k_y >= 0 && k_x >= 0 && k_y < dim_im_in && k_x < dim_im_in)
|
||||
{
|
||||
sum += Im_in[i_ch_in + ch_im_in * (k_x + k_y * dim_im_in)];
|
||||
count++;
|
||||
}
|
||||
}
|
||||
}
|
||||
Im_out[i_ch_in + ch_im_in * (i_x + i_y * dim_im_out)] = sum / count;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
void arm_maxpool_q7_HWC_ref(const q7_t * Im_in, // input image
|
||||
const uint16_t dim_im_in, // input image dimension
|
||||
const uint16_t ch_im_in, // number of input image channels
|
||||
const uint16_t dim_kernel, // window kernel size
|
||||
const uint16_t padding, // padding sizes
|
||||
const uint16_t stride, // stride
|
||||
const uint16_t dim_im_out, // output image dimension
|
||||
q7_t * bufferA, // a buffer for local storage
|
||||
q7_t * Im_out)
|
||||
{
|
||||
int16_t i_ch_in, i_x, i_y;
|
||||
int16_t k_x, k_y;
|
||||
|
||||
for (i_ch_in = 0; i_ch_in < ch_im_in; i_ch_in++)
|
||||
{
|
||||
for (i_y = 0; i_y < dim_im_out; i_y++)
|
||||
{
|
||||
for (i_x = 0; i_x < dim_im_out; i_x++)
|
||||
{
|
||||
int max = -129;
|
||||
for (k_y = i_y * stride - padding; k_y < i_y * stride - padding + dim_kernel; k_y++)
|
||||
{
|
||||
for (k_x = i_x * stride - padding; k_x < i_x * stride - padding + dim_kernel; k_x++)
|
||||
{
|
||||
if (k_y >= 0 && k_x >= 0 && k_y < dim_im_in && k_x < dim_im_in)
|
||||
{
|
||||
if (Im_in[i_ch_in + ch_im_in * (k_x + k_y * dim_im_in)] > max)
|
||||
{
|
||||
max = Im_in[i_ch_in + ch_im_in * (k_x + k_y * dim_im_in)];
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
Im_out[i_ch_in + ch_im_in * (i_x + i_y * dim_im_out)] = max;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
@@ -0,0 +1,42 @@
|
||||
/*
|
||||
* Copyright (C) 2010-2018 Arm Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#include "arm_math.h"
|
||||
#include "arm_nnfunctions.h"
|
||||
|
||||
void arm_relu_q7_ref(q7_t * data, uint16_t size)
|
||||
{
|
||||
uint16_t i;
|
||||
|
||||
for (i = 0; i < size; i++)
|
||||
{
|
||||
if (data[i] < 0)
|
||||
data[i] = 0;
|
||||
}
|
||||
}
|
||||
|
||||
void arm_relu_q15_ref(q15_t * data, uint16_t size)
|
||||
{
|
||||
uint16_t i;
|
||||
|
||||
for (i = 0; i < size; i++)
|
||||
{
|
||||
if (data[i] < 0)
|
||||
data[i] = 0;
|
||||
}
|
||||
}
|
||||
File diff suppressed because one or more lines are too long
@@ -0,0 +1,250 @@
|
||||
/*
|
||||
* Copyright (C) 2010-2018 Arm Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#ifndef _REF_FUNCTIONS_H_
|
||||
#define _REF_FUNCTIONS_H_
|
||||
|
||||
#include "arm_math.h"
|
||||
#include "arm_nnfunctions.h"
|
||||
//#include "arm_nnsupportfunctions.h"
|
||||
#include "fully_connected_testing_weights.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
/*
|
||||
*
|
||||
* Convolution reference implemenation
|
||||
*
|
||||
*/
|
||||
|
||||
void arm_convolve_HWC_q7_ref(const q7_t * Im_in, // input image
|
||||
const uint16_t dim_im_in, // input image dimention
|
||||
const uint16_t ch_im_in, // number of input image channels
|
||||
const q7_t * wt, // kernel weights
|
||||
const uint16_t ch_im_out, // number of filters, i.e., output image channels
|
||||
const uint16_t dim_kernel, // filter kernel size
|
||||
const uint16_t padding, // padding sizes
|
||||
const uint16_t stride, // stride
|
||||
const q7_t * bias, // bias
|
||||
const uint16_t bias_shift, const uint16_t out_shift, q7_t * Im_out, // output image
|
||||
const uint16_t dim_im_out, // output image dimension
|
||||
q15_t * bufferA, //buffer space for input
|
||||
q7_t * bufferB //buffer space for output
|
||||
);
|
||||
|
||||
void arm_convolve_HWC_q7_ref_nonsquare(const q7_t * Im_in, // input image
|
||||
const uint16_t dim_im_in_x, // input image dimention x
|
||||
const uint16_t dim_im_in_y, // input image dimention y
|
||||
const uint16_t ch_im_in, // number of input image channels
|
||||
const q7_t * wt, // kernel weights
|
||||
const uint16_t ch_im_out, // number of filters, i.e., output image channels
|
||||
const uint16_t dim_kernel_x, // filter kernel size x
|
||||
const uint16_t dim_kernel_y, // filter kernel size y
|
||||
const uint16_t padding_x, // padding sizes x
|
||||
const uint16_t padding_y, // padding sizes y
|
||||
const uint16_t stride_x, // stride x
|
||||
const uint16_t stride_y, // stride y
|
||||
const q7_t * bias, // bias
|
||||
const uint16_t bias_shift, const uint16_t out_shift, q7_t * Im_out, // output image
|
||||
const uint16_t dim_im_out_x, // output image dimension x
|
||||
const uint16_t dim_im_out_y, // output image dimension y
|
||||
q15_t * bufferA, //buffer space for input
|
||||
q7_t * bufferB //buffer space for output
|
||||
);
|
||||
|
||||
void arm_convolve_HWC_q15_ref(const q15_t * Im_in, // input image
|
||||
const uint16_t dim_im_in, // input image dimention
|
||||
const uint16_t ch_im_in, // number of input image channels
|
||||
const q15_t * wt, // kernel weights
|
||||
const uint16_t ch_im_out, // number of filters, i.e., output image channels
|
||||
const uint16_t dim_kernel, // filter kernel size
|
||||
const uint16_t padding, // padding sizes
|
||||
const uint16_t stride, // stride
|
||||
const q15_t * bias, // bias
|
||||
const uint16_t bias_shift, const uint16_t out_shift, q15_t * Im_out, // output image
|
||||
const uint16_t dim_im_out, // output image dimension
|
||||
q15_t * bufferA, //buffer space for input
|
||||
q7_t * bufferB //buffer space for output
|
||||
);
|
||||
void arm_convolve_HWC_q15_nonsquare_ref(const q15_t * Im_in,
|
||||
const uint16_t dim_im_in_x,
|
||||
const uint16_t dim_im_in_y,
|
||||
const uint16_t ch_im_in,
|
||||
const q15_t * wt,
|
||||
const uint16_t ch_im_out,
|
||||
const uint16_t dim_kernel_x,
|
||||
const uint16_t dim_kernel_y,
|
||||
const uint16_t padding_x,
|
||||
const uint16_t padding_y,
|
||||
const uint16_t stride_x,
|
||||
const uint16_t stride_y,
|
||||
const q15_t * bias,
|
||||
const uint16_t bias_shift,
|
||||
const uint16_t out_shift,
|
||||
q15_t * Im_out,
|
||||
const uint16_t dim_im_out_x,
|
||||
const uint16_t dim_im_out_y,
|
||||
q15_t * bufferA,
|
||||
q7_t * bufferB);
|
||||
|
||||
void arm_depthwise_separable_conv_HWC_q7_ref(const q7_t * Im_in, // input image
|
||||
const uint16_t dim_im_in, // input image dimention
|
||||
const uint16_t ch_im_in, // number of input image channels
|
||||
const q7_t * wt, // kernel weights
|
||||
const uint16_t ch_im_out, // number of filters, i.e., output image channels
|
||||
const uint16_t dim_kernel, // filter kernel size
|
||||
const uint16_t padding, // padding sizes
|
||||
const uint16_t stride, // stride
|
||||
const q7_t * bias, // bias
|
||||
const uint16_t bias_shift, // amount of left-shift for bias
|
||||
const uint16_t out_shift, // amount of right-shift for output
|
||||
q7_t * Im_out, // output image
|
||||
const uint16_t dim_im_out, // output image dimension
|
||||
q15_t * bufferA, //buffer space for input
|
||||
q7_t * bufferB //buffer space for output
|
||||
);
|
||||
void arm_depthwise_separable_conv_HWC_q7_ref_nonsquare(const q7_t * Im_in, // input image
|
||||
const uint16_t dim_im_in_x, // input image dimention x
|
||||
const uint16_t dim_im_in_y, // input image dimention y
|
||||
const uint16_t ch_im_in, // number of input image channels
|
||||
const q7_t * wt, // kernel weights
|
||||
const uint16_t ch_im_out, // number of filters, i.e., output image channels
|
||||
const uint16_t dim_kernel_x, // filter kernel size x
|
||||
const uint16_t dim_kernel_y, // filter kernel size y
|
||||
const uint16_t padding_x, // padding sizes x
|
||||
const uint16_t padding_y, // padding sizes y
|
||||
const uint16_t stride_x, // stride x
|
||||
const uint16_t stride_y, // stride y
|
||||
const q7_t * bias, // bias
|
||||
const uint16_t bias_shift, // amount of left-shift for bias
|
||||
const uint16_t out_shift, // amount of right-shift for output
|
||||
q7_t * Im_out, // output image
|
||||
const uint16_t dim_im_out_x, // output image dimension x
|
||||
const uint16_t dim_im_out_y, // output image dimension y
|
||||
q15_t * bufferA, //buffer space for input
|
||||
q7_t * bufferB //buffer space for output
|
||||
);
|
||||
|
||||
/*
|
||||
*
|
||||
* Fully-connected reference implemenation
|
||||
*
|
||||
*/
|
||||
|
||||
void arm_fully_connected_q7_ref(const q7_t * pV, // pointer to vector
|
||||
const q7_t * pM, // pointer to matrix
|
||||
const uint16_t dim_vec, // length of the vector
|
||||
const uint16_t num_of_rows, // numCol of A
|
||||
const uint16_t bias_shift, // amount of left-shift for bias
|
||||
const uint16_t out_shift, // amount of right-shift for output
|
||||
const q7_t * bias, q7_t * pOut, // output operand
|
||||
q15_t * vec_buffer);
|
||||
|
||||
void arm_fully_connected_q15_ref(const q15_t * pV, // pointer to vector
|
||||
const q15_t * pM, // pointer to matrix
|
||||
const uint16_t dim_vec, // length of the vector
|
||||
const uint16_t num_of_rows, // numCol of A
|
||||
const uint16_t bias_shift, // amount of left-shift for bias
|
||||
const uint16_t out_shift, // amount of right-shift for output
|
||||
const q15_t * bias, q15_t * pOut, // output operand
|
||||
q15_t * vec_buffer);
|
||||
|
||||
void arm_fully_connected_mat_q7_vec_q15_ref(const q15_t * pV, // pointer to vector
|
||||
const q7_t * pM, // pointer to matrix
|
||||
const uint16_t dim_vec, // length of the vector
|
||||
const uint16_t num_of_rows, // numCol of A
|
||||
const uint16_t bias_shift, // amount of left-shift for bias
|
||||
const uint16_t out_shift, // amount of right-shift for output
|
||||
const q7_t * bias, q15_t * pOut, // output operand
|
||||
q15_t * vec_buffer);
|
||||
|
||||
void arm_fully_connected_q7_opt_ref(const q7_t * pV, // pointer to vector
|
||||
const q7_t * pM, // pointer to matrix
|
||||
const uint16_t dim_vec, // length of the vector
|
||||
const uint16_t num_of_rows, // numCol of A
|
||||
const uint16_t bias_shift, // amount of left-shift for bias
|
||||
const uint16_t out_shift, // amount of right-shift for output
|
||||
const q7_t * bias, q7_t * pOut, // output operand
|
||||
q15_t * vec_buffer);
|
||||
|
||||
void arm_fully_connected_q15_opt_ref(const q15_t * pV, // pointer to vector
|
||||
const q15_t * pM, // pointer to matrix
|
||||
const uint16_t dim_vec, // length of the vector
|
||||
const uint16_t num_of_rows, // numCol of A
|
||||
const uint16_t bias_shift, // amount of left-shift for bias
|
||||
const uint16_t out_shift, // amount of right-shift for output
|
||||
const q15_t * bias, q15_t * pOut, // output operand
|
||||
q15_t * vec_buffer);
|
||||
|
||||
void arm_fully_connected_mat_q7_vec_q15_opt_ref(const q15_t * pV, // pointer to vector
|
||||
const q7_t * pM, // pointer to matrix
|
||||
const uint16_t dim_vec, // length of the vector
|
||||
const uint16_t num_of_rows, // numCol of A
|
||||
const uint16_t bias_shift, // amount of left-shift for bias
|
||||
const uint16_t out_shift, // amount of right-shift for output
|
||||
const q7_t * bias, q15_t * pOut, // output operand
|
||||
q15_t * vec_buffer);
|
||||
|
||||
/*
|
||||
*
|
||||
* Pooling reference implemenation
|
||||
*
|
||||
*/
|
||||
|
||||
void arm_avepool_q7_HWC_ref(const q7_t * Im_in, // input image
|
||||
const uint16_t dim_im_in, // input image dimension
|
||||
const uint16_t ch_im_in, // number of input image channels
|
||||
const uint16_t dim_kernel, // window kernel size
|
||||
const uint16_t padding, // padding sizes
|
||||
const uint16_t stride, // stride
|
||||
const uint16_t dim_im_out, // output image dimension
|
||||
q7_t * bufferA, // a buffer for local storage
|
||||
q7_t * Im_out);
|
||||
|
||||
void arm_maxpool_q7_HWC_ref(const q7_t * Im_in, // input image
|
||||
const uint16_t dim_im_in, // input image dimension
|
||||
const uint16_t ch_im_in, // number of input image channels
|
||||
const uint16_t dim_kernel, // window kernel size
|
||||
const uint16_t padding, // padding sizes
|
||||
const uint16_t stride, // stride
|
||||
const uint16_t dim_im_out, // output image dimension
|
||||
q7_t * bufferA, // a buffer for local storage
|
||||
q7_t * Im_out);
|
||||
|
||||
/*
|
||||
*
|
||||
* Other reference implemenation
|
||||
*
|
||||
*/
|
||||
|
||||
void arm_relu_q7_ref(q7_t * data, uint16_t size);
|
||||
|
||||
void arm_relu_q15_ref(q15_t * data, uint16_t size);
|
||||
|
||||
void arm_nn_mult_q7_ref(q7_t * pSrcA, q7_t * pSrcB, q7_t * pDst, const uint16_t out_shift, uint32_t blockSize);
|
||||
|
||||
void arm_nn_mult_q15_ref(q15_t * pSrcA, q15_t * pSrcB, q15_t * pDst, const uint16_t out_shift, uint32_t blockSize);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,801 @@
|
||||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2018 Arm Limited. All rights reserved.
|
||||
*
|
||||
*
|
||||
* Project: CMSIS NN Library
|
||||
* Title: arm_nnexamples_nn_test.cpp
|
||||
*
|
||||
* Description: Example code for NN kernel testing.
|
||||
*
|
||||
* Target Processor: Cortex-M cores
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* - Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* - Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* - Neither the name of ARM LIMITED nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this
|
||||
* software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* -------------------------------------------------------------------- */
|
||||
|
||||
#include "arm_nnexamples_nn_test.h"
|
||||
|
||||
//#define TEST_SIGMOID
|
||||
//#define TEST_TANH
|
||||
#define TEST_POOL
|
||||
#define TEST_RELU
|
||||
#define TEST_IP
|
||||
#define TEST_CONV
|
||||
#define TEST_NONSQUARE
|
||||
#define TEST_NNMULT
|
||||
|
||||
int test_index = 0;
|
||||
q7_t test_flags[50];
|
||||
bool test_pass;
|
||||
|
||||
int main()
|
||||
{
|
||||
printf("start tests\n");
|
||||
|
||||
srand(1);
|
||||
|
||||
// common pointers for testing data
|
||||
q7_t *test1;
|
||||
q15_t *test2;
|
||||
q7_t *test3;
|
||||
q15_t *test4;
|
||||
|
||||
for (test_index = 0; test_index<50; test_index++) {
|
||||
test_flags[test_index] = -1;
|
||||
}
|
||||
test_index = 0;
|
||||
|
||||
#ifdef TEST_NNMULT
|
||||
#define NNMULT_DIM 128
|
||||
test1 = new q7_t[NNMULT_DIM*2];
|
||||
test2 = new q15_t[NNMULT_DIM*2];
|
||||
test3 = new q7_t[NNMULT_DIM*2];
|
||||
test4 = new q15_t[NNMULT_DIM*2];
|
||||
|
||||
q7_t * mult_out_q7 = test3;
|
||||
q7_t * mult_ref_q7 = test3 + NNMULT_DIM;
|
||||
q15_t * mult_out_q15 = test4;
|
||||
q15_t * mult_ref_q15 = test4 + NNMULT_DIM;
|
||||
|
||||
for (int i=0;i<NNMULT_DIM*2;i++) {
|
||||
test1[i] = (rand() % 256 - 128);
|
||||
test2[i] = (rand() % 65536 - 32768);
|
||||
}
|
||||
|
||||
// Test q7
|
||||
arm_nn_mult_q7(test1, test1+NNMULT_DIM, mult_out_q7, 5, NNMULT_DIM);
|
||||
|
||||
arm_nn_mult_q7_ref(test1, test1+NNMULT_DIM, mult_ref_q7, 5, NNMULT_DIM);
|
||||
|
||||
verify_results_q7(mult_out_q7, mult_ref_q7, NNMULT_DIM);
|
||||
|
||||
arm_nn_mult_q7(test1, test1+NNMULT_DIM, mult_out_q7, 9, NNMULT_DIM);
|
||||
|
||||
arm_nn_mult_q7_ref(test1, test1+NNMULT_DIM, mult_ref_q7, 9, NNMULT_DIM);
|
||||
|
||||
verify_results_q7(mult_out_q7, mult_ref_q7, NNMULT_DIM);
|
||||
|
||||
// Test q15
|
||||
arm_nn_mult_q15(test2, test2+NNMULT_DIM, mult_out_q15, 13, NNMULT_DIM);
|
||||
|
||||
arm_nn_mult_q15_ref(test2, test2+NNMULT_DIM, mult_ref_q15, 13, NNMULT_DIM);
|
||||
|
||||
verify_results_q15(mult_out_q15, mult_ref_q15, NNMULT_DIM);
|
||||
|
||||
arm_nn_mult_q15(test2, test2+NNMULT_DIM, mult_out_q15, 18, NNMULT_DIM);
|
||||
|
||||
arm_nn_mult_q15_ref(test2, test2+NNMULT_DIM, mult_ref_q15, 18, NNMULT_DIM);
|
||||
|
||||
verify_results_q15(mult_out_q15, mult_ref_q15, NNMULT_DIM);
|
||||
|
||||
#endif
|
||||
|
||||
#ifdef TEST_SIGMOID
|
||||
|
||||
#define SIGMOID_DIM 128
|
||||
|
||||
/* This part tests the running of sigmoid functions */
|
||||
|
||||
test1 = new q7_t[SIGMOID_DIM];
|
||||
test2 = new q15_t[SIGMOID_DIM];
|
||||
test3 = new q7_t[SIGMOID_DIM];
|
||||
test4 = new q15_t[SIGMOID_DIM];
|
||||
|
||||
srand(1);
|
||||
|
||||
for (int i = 0; i < SIGMOID_DIM; i++)
|
||||
{
|
||||
test1[i] = (rand() % 256 - 128);
|
||||
test2[i] = (rand() % 65536 - 32768);
|
||||
test3[i] = test1[i];
|
||||
test4[i] = test2[i];
|
||||
}
|
||||
|
||||
arm_nn_activations_direct_q7(test3, SIGMOID_DIM, 3, ARM_SIGMOID);
|
||||
|
||||
for (int i = 0; i < SIGMOID_DIM; i++)
|
||||
{
|
||||
printf("in: %d out: %d\n", test1[i], test3[i]);
|
||||
}
|
||||
|
||||
printf("start testing q15_t sigmoid\n\n");
|
||||
|
||||
arm_nn_activations_direct_q15(test4, SIGMOID_DIM, 3, ARM_SIGMOID);
|
||||
|
||||
for (int i = 0; i < SIGMOID_DIM; i++)
|
||||
{
|
||||
printf("in: %d out: %d\n", test2[i], test4[i]);
|
||||
}
|
||||
|
||||
delete[]test1;
|
||||
delete[]test2;
|
||||
delete[]test3;
|
||||
delete[]test4;
|
||||
|
||||
#endif
|
||||
|
||||
#ifdef TEST_TANH
|
||||
|
||||
#define TANH_DIM 128
|
||||
|
||||
/* This part tests the running of sigmoid functions */
|
||||
|
||||
test1 = new q7_t[TANH_DIM];
|
||||
test2 = new q15_t[TANH_DIM];
|
||||
test3 = new q7_t[TANH_DIM];
|
||||
test4 = new q15_t[TANH_DIM];
|
||||
|
||||
srand(1);
|
||||
|
||||
for (int i = 0; i < TANH_DIM; i++)
|
||||
{
|
||||
test1[i] = (rand() % 256 - 128);
|
||||
test2[i] = (rand() % 65536 - 32768);
|
||||
test3[i] = test1[i];
|
||||
test4[i] = test2[i];
|
||||
}
|
||||
|
||||
arm_nn_activations_direct_q7(test3, TANH_DIM, 3, ARM_TANH);
|
||||
|
||||
printf("start testing q7_t tanh\n\n");
|
||||
|
||||
for (int i = 0; i < TANH_DIM; i++)
|
||||
{
|
||||
printf("in: %d out: %d\n", test1[i], test3[i]);
|
||||
}
|
||||
|
||||
printf("start testing q15_t tanh\n\n");
|
||||
|
||||
arm_nn_activations_direct_q15(test4, TANH_DIM, 3, ARM_TANH);
|
||||
|
||||
for (int i = 0; i < TANH_DIM; i++)
|
||||
{
|
||||
printf("in: %d out: %d\n", test2[i], test4[i]);
|
||||
}
|
||||
|
||||
delete[]test1;
|
||||
delete[]test2;
|
||||
delete[]test3;
|
||||
delete[]test4;
|
||||
|
||||
#endif
|
||||
|
||||
#ifdef TEST_POOL
|
||||
|
||||
#define POOL_IM_DIM 32
|
||||
#define POOL_IM_CH 8
|
||||
|
||||
test1 = new q7_t[POOL_IM_DIM * POOL_IM_DIM * POOL_IM_CH * 2];
|
||||
test2 = new q15_t[POOL_IM_DIM * POOL_IM_CH];
|
||||
test3 = new q7_t[POOL_IM_DIM * POOL_IM_DIM * POOL_IM_CH];
|
||||
|
||||
for (int i = 0; i < POOL_IM_DIM * POOL_IM_DIM * POOL_IM_CH; i++)
|
||||
{
|
||||
test1[i] = (rand() % 256 - 128);
|
||||
}
|
||||
|
||||
q7_t *img_in = test1 + POOL_IM_DIM * POOL_IM_DIM * POOL_IM_CH;
|
||||
q7_t *pool_out_ref = test3;
|
||||
q7_t *pool_out_opt = test3 + POOL_IM_DIM * POOL_IM_DIM * POOL_IM_CH / 2;
|
||||
|
||||
for (int i = 0; i < POOL_IM_DIM * POOL_IM_DIM * POOL_IM_CH; i++)
|
||||
{
|
||||
test3[i] = 0;
|
||||
}
|
||||
|
||||
// copy over the img input
|
||||
for (int i = 0; i < POOL_IM_DIM * POOL_IM_DIM * POOL_IM_CH; i++)
|
||||
{
|
||||
img_in[i] = test1[i];
|
||||
}
|
||||
|
||||
initialize_results_q7(pool_out_ref, pool_out_opt, POOL_IM_DIM / 2 * POOL_IM_DIM / 2 * POOL_IM_CH);
|
||||
|
||||
printf("Start maxpool reference implementation\n");
|
||||
|
||||
arm_maxpool_q7_HWC_ref(img_in, POOL_IM_DIM, POOL_IM_CH, 3, 0, 2, POOL_IM_DIM / 2, (q7_t *) test2, pool_out_ref);
|
||||
|
||||
// copy over the img input
|
||||
for (int i = 0; i < POOL_IM_DIM * POOL_IM_DIM * POOL_IM_CH; i++)
|
||||
{
|
||||
img_in[i] = test1[i];
|
||||
}
|
||||
|
||||
printf("Start maxpool opt implementation\n");
|
||||
|
||||
arm_maxpool_q7_HWC(img_in, POOL_IM_DIM, POOL_IM_CH, 3, 0, 2, POOL_IM_DIM / 2, (q7_t *) test2, pool_out_opt);
|
||||
|
||||
verify_results_q7(pool_out_ref, pool_out_opt, POOL_IM_DIM / 2 * POOL_IM_DIM / 2 * POOL_IM_CH);
|
||||
|
||||
// copy over the img input
|
||||
for (int i = 0; i < POOL_IM_DIM * POOL_IM_DIM * POOL_IM_CH; i++)
|
||||
{
|
||||
img_in[i] = test1[i];
|
||||
}
|
||||
|
||||
// copy over the img input
|
||||
for (int i = 0; i < POOL_IM_DIM * POOL_IM_DIM * POOL_IM_CH; i++)
|
||||
{
|
||||
img_in[i] = test1[i];
|
||||
}
|
||||
|
||||
printf("Start avepool ref implementation\n");
|
||||
|
||||
arm_avepool_q7_HWC_ref(img_in, POOL_IM_DIM, POOL_IM_CH, 3, 0, 2, POOL_IM_DIM / 2, (q7_t *) test2, pool_out_ref);
|
||||
|
||||
// copy over the img input
|
||||
for (int i = 0; i < POOL_IM_DIM * POOL_IM_DIM * POOL_IM_CH; i++)
|
||||
{
|
||||
img_in[i] = test1[i];
|
||||
}
|
||||
|
||||
printf("Start avepool opt implementation\n");
|
||||
|
||||
arm_avepool_q7_HWC(img_in, POOL_IM_DIM, POOL_IM_CH, 3, 0, 2, POOL_IM_DIM / 2, (q7_t *) test2, pool_out_opt);
|
||||
|
||||
// special check here
|
||||
bool if_ave_pool_match = true;
|
||||
for (int i = 0; i < POOL_IM_DIM / 2 * POOL_IM_DIM / 2 * POOL_IM_CH; i++)
|
||||
{
|
||||
// we tolerate at most difference of 1 here because of rounding errors
|
||||
if (pool_out_ref[i] - pool_out_opt[i] >= 2 || pool_out_opt[i] - pool_out_ref[i] >= 2)
|
||||
{
|
||||
printf("Output mismatch at %d, expected %d, actual %d\n", i, pool_out_ref[i], pool_out_opt[i]);
|
||||
if_ave_pool_match = false;
|
||||
}
|
||||
}
|
||||
if (if_ave_pool_match == true)
|
||||
{
|
||||
printf("Outputs match.\n");
|
||||
}
|
||||
|
||||
delete[]test1;
|
||||
delete[]test2;
|
||||
delete[]test3;
|
||||
|
||||
#endif
|
||||
|
||||
#ifdef TEST_RELU
|
||||
|
||||
#define RELU_DIM 127
|
||||
|
||||
test1 = new q7_t[RELU_DIM];
|
||||
test2 = new q15_t[RELU_DIM];
|
||||
test3 = new q7_t[RELU_DIM];
|
||||
test4 = new q15_t[RELU_DIM];
|
||||
|
||||
for (int i = 0; i < RELU_DIM; i++)
|
||||
{
|
||||
test1[i] = (rand() % 256 - 128);
|
||||
test2[i] = (rand() % 65536 - 32768);
|
||||
test3[i] = test1[i];
|
||||
test4[i] = test2[i];
|
||||
}
|
||||
|
||||
q7_t *relu_ref_data_q7 = test1;
|
||||
q7_t *relu_opt_data_q7 = test3;
|
||||
q15_t *relu_ref_data_q15 = test2;
|
||||
q15_t *relu_opt_data_q15 = test4;
|
||||
|
||||
printf("Start ref relu q7 implementation\n");
|
||||
|
||||
arm_relu_q7_ref(relu_ref_data_q7, RELU_DIM);
|
||||
|
||||
printf("Start opt relu q7 implementation\n");
|
||||
|
||||
arm_relu_q7(relu_opt_data_q7, RELU_DIM);
|
||||
|
||||
verify_results_q7(relu_ref_data_q7, relu_opt_data_q7, RELU_DIM);
|
||||
|
||||
printf("Start ref relu q15 implementation\n");
|
||||
|
||||
arm_relu_q15_ref(relu_ref_data_q15, RELU_DIM);
|
||||
|
||||
printf("Start opt relu q15 implementation\n");
|
||||
|
||||
arm_relu_q15(relu_opt_data_q15, RELU_DIM);
|
||||
|
||||
verify_results_q15(relu_ref_data_q15, relu_opt_data_q15, RELU_DIM);
|
||||
|
||||
delete[]test1;
|
||||
delete[]test2;
|
||||
delete[]test3;
|
||||
delete[]test4;
|
||||
|
||||
#endif
|
||||
|
||||
#ifdef TEST_IP
|
||||
|
||||
#define IP_ROW_DIM 127
|
||||
#define IP_COL_DIM 127
|
||||
|
||||
q7_t ip_weights[IP_ROW_DIM * IP_COL_DIM] = IP2_WEIGHT;
|
||||
q7_t ip_q7_opt_weights[IP_ROW_DIM * IP_COL_DIM] = IP4_WEIGHT;
|
||||
q7_t ip_q7_q15_opt_weights[IP_ROW_DIM * IP_COL_DIM] = IP4_q7_q15_WEIGHT;
|
||||
q15_t ip_q15_weights[IP_ROW_DIM * IP_COL_DIM] = IP2_WEIGHT;
|
||||
q15_t ip_q15_opt_weights[IP_ROW_DIM * IP_COL_DIM] = IP4_WEIGHT_Q15;
|
||||
|
||||
test1 = new q7_t[IP_COL_DIM + IP_ROW_DIM];
|
||||
test2 = new q15_t[IP_COL_DIM];
|
||||
test3 = new q7_t[IP_ROW_DIM * 3];
|
||||
test4 = new q15_t[IP_COL_DIM + IP_ROW_DIM * 2];
|
||||
|
||||
for (int i = 0; i < IP_ROW_DIM + IP_COL_DIM; i++)
|
||||
{
|
||||
test1[i] = rand() % 256 - 100;
|
||||
}
|
||||
for (int i = 0; i < IP_ROW_DIM * 3; i++)
|
||||
{
|
||||
test3[i] = 0;
|
||||
}
|
||||
|
||||
q7_t *ip_bias_q7 = test1 + IP_COL_DIM;
|
||||
|
||||
q7_t *ip_out_q7_ref = test3;
|
||||
q7_t *ip_out_q7_opt = test3 + IP_ROW_DIM;
|
||||
q7_t *ip_out_q7_opt_fast = test3 + 2 * IP_ROW_DIM;
|
||||
q15_t *ip_out_q15_ref = test4 + IP_COL_DIM;
|
||||
q15_t *ip_out_q15_opt = test4 + IP_COL_DIM + IP_ROW_DIM;
|
||||
|
||||
initialize_results_q7(ip_out_q7_ref, ip_out_q7_opt, IP_ROW_DIM);
|
||||
initialize_results_q7(ip_out_q7_ref, ip_out_q7_opt_fast, IP_ROW_DIM);
|
||||
initialize_results_q7(ip_out_q7_ref, ip_out_q7_opt_fast, IP_ROW_DIM);
|
||||
|
||||
printf("Start ref q7 implementation\n");
|
||||
|
||||
arm_fully_connected_q7_ref(test1, ip_weights, IP_COL_DIM, IP_ROW_DIM, 1, 7, ip_bias_q7, ip_out_q7_ref, test2);
|
||||
|
||||
printf("Start q7 implementation\n");
|
||||
|
||||
arm_fully_connected_q7(test1, ip_weights, IP_COL_DIM, IP_ROW_DIM, 1, 7, ip_bias_q7, ip_out_q7_opt, test2);
|
||||
|
||||
verify_results_q7(ip_out_q7_ref, ip_out_q7_opt, IP_ROW_DIM);
|
||||
|
||||
printf("Start q7 ref opt implementation\n");
|
||||
|
||||
arm_fully_connected_q7_opt_ref(test1, ip_q7_opt_weights, IP_COL_DIM, IP_ROW_DIM, 1, 7, ip_bias_q7,
|
||||
ip_out_q7_opt_fast, test2);
|
||||
|
||||
verify_results_q7(ip_out_q7_ref, ip_out_q7_opt_fast, IP_ROW_DIM);
|
||||
|
||||
printf("Start q7 opt implementation\n");
|
||||
|
||||
arm_fully_connected_q7_opt(test1, ip_q7_opt_weights, IP_COL_DIM, IP_ROW_DIM, 1, 7, ip_bias_q7, ip_out_q7_opt_fast,
|
||||
test2);
|
||||
|
||||
verify_results_q7(ip_out_q7_ref, ip_out_q7_opt_fast, IP_ROW_DIM);
|
||||
|
||||
for (int i = 0; i < IP_ROW_DIM + IP_COL_DIM; i++)
|
||||
{
|
||||
test4[i] = (rand() % 65536 - 32768);
|
||||
}
|
||||
|
||||
initialize_results_q15(ip_out_q15_ref, ip_out_q15_opt, IP_ROW_DIM);
|
||||
|
||||
printf("Start ref q15 implementation\n");
|
||||
|
||||
arm_fully_connected_q15_ref(test4, ip_q15_weights, IP_COL_DIM, IP_ROW_DIM, 1, 7, test2, ip_out_q15_ref, NULL);
|
||||
|
||||
printf("Start q15 implementation\n");
|
||||
|
||||
arm_fully_connected_q15(test4, ip_q15_weights, IP_COL_DIM, IP_ROW_DIM, 1, 7, test2, ip_out_q15_opt, NULL);
|
||||
|
||||
verify_results_q15(ip_out_q15_ref, ip_out_q15_opt, IP_ROW_DIM);
|
||||
|
||||
printf("Start ref opt q15 implementation\n");
|
||||
|
||||
arm_fully_connected_q15_opt_ref(test4, ip_q15_opt_weights, IP_COL_DIM, IP_ROW_DIM, 1, 7, test2, ip_out_q15_opt,
|
||||
NULL);
|
||||
|
||||
verify_results_q15(ip_out_q15_ref, ip_out_q15_opt, IP_ROW_DIM);
|
||||
|
||||
printf("Start opt q15 implementation\n");
|
||||
|
||||
arm_fully_connected_q15_opt(test4, ip_q15_opt_weights, IP_COL_DIM, IP_ROW_DIM, 1, 7, test2, ip_out_q15_opt, NULL);
|
||||
|
||||
verify_results_q15(ip_out_q15_ref, ip_out_q15_opt, IP_ROW_DIM);
|
||||
|
||||
initialize_results_q15(ip_out_q15_ref, ip_out_q15_opt, IP_ROW_DIM);
|
||||
|
||||
printf("Start ref q7_q15 implementation\n");
|
||||
|
||||
arm_fully_connected_mat_q7_vec_q15_ref(test4, ip_weights, IP_COL_DIM, IP_ROW_DIM, 1, 7, ip_bias_q7, ip_out_q15_ref,
|
||||
test2);
|
||||
|
||||
printf("Start q7_q15 implementation\n");
|
||||
|
||||
arm_fully_connected_mat_q7_vec_q15(test4, ip_weights, IP_COL_DIM, IP_ROW_DIM, 1, 7, ip_bias_q7, ip_out_q15_opt,
|
||||
test2);
|
||||
|
||||
verify_results_q15(ip_out_q15_ref, ip_out_q15_opt, IP_ROW_DIM);
|
||||
|
||||
printf("Start ref opt q7_q15 implementation\n");
|
||||
|
||||
arm_fully_connected_mat_q7_vec_q15_opt_ref(test4, ip_q7_q15_opt_weights, IP_COL_DIM, IP_ROW_DIM, 1, 7, ip_bias_q7,
|
||||
ip_out_q15_opt, test2);
|
||||
|
||||
verify_results_q15(ip_out_q15_ref, ip_out_q15_opt, IP_ROW_DIM);
|
||||
|
||||
printf("Start opt q7_q15 implementation\n");
|
||||
|
||||
arm_fully_connected_mat_q7_vec_q15_opt(test4, ip_q7_q15_opt_weights, IP_COL_DIM, IP_ROW_DIM, 1, 7, ip_bias_q7,
|
||||
ip_out_q15_opt, test2);
|
||||
|
||||
verify_results_q15(ip_out_q15_ref, ip_out_q15_opt, IP_ROW_DIM);
|
||||
|
||||
delete[]test1;
|
||||
delete[]test2;
|
||||
delete[]test3;
|
||||
delete[]test4;
|
||||
|
||||
#endif
|
||||
|
||||
#ifdef TEST_NONSQUARE
|
||||
|
||||
/* Use RCONV to differential with square CONV */
|
||||
|
||||
#define RCONV_IM_DIM_X 10
|
||||
#define RCONV_IM_DIM_Y 8
|
||||
#define RCONV_IM_CH 4
|
||||
#define RCONV_KER_DIM_X 5
|
||||
#define RCONV_KER_DIM_Y 3
|
||||
#define RCONV_STRIDE_X 1
|
||||
#define RCONV_STRIDE_Y 1
|
||||
#define RCONV_PADDING_X 2
|
||||
#define RCONV_PADDING_Y 1
|
||||
#define RCONV_OUT_CH 4
|
||||
#define RCONV_OUT_DIM_X 10
|
||||
#define RCONV_OUT_DIM_Y 8
|
||||
|
||||
test1 = new q7_t[RCONV_KER_DIM_Y * RCONV_KER_DIM_X * RCONV_IM_CH * RCONV_OUT_CH + RCONV_OUT_CH];
|
||||
test2 = new q15_t[2 * RCONV_KER_DIM_Y * RCONV_KER_DIM_X * RCONV_IM_CH];
|
||||
test3 =
|
||||
new q7_t[RCONV_IM_DIM_Y * RCONV_IM_DIM_X * RCONV_IM_CH + 2 * RCONV_OUT_DIM_Y * RCONV_OUT_DIM_X * RCONV_OUT_CH];
|
||||
|
||||
for (int i = 0; i < RCONV_KER_DIM_Y * RCONV_KER_DIM_X * RCONV_IM_CH * RCONV_OUT_CH + RCONV_OUT_CH; i++)
|
||||
{
|
||||
test1[i] = rand() % 256 - 100;
|
||||
}
|
||||
|
||||
for (int i = 0;
|
||||
i < RCONV_IM_DIM_Y * RCONV_IM_DIM_X * RCONV_IM_CH + 2 * RCONV_OUT_DIM_Y * RCONV_OUT_DIM_X * RCONV_OUT_CH; i++)
|
||||
{
|
||||
test3[i] = rand() % 256 - 100;
|
||||
}
|
||||
|
||||
q7_t *rconv_weight_q7 = test1;
|
||||
q7_t *rconv_bias_q7 = test1 + RCONV_KER_DIM_Y * RCONV_KER_DIM_X * RCONV_IM_CH * RCONV_OUT_CH;
|
||||
|
||||
q15_t *rconv_buf = test2;
|
||||
|
||||
q7_t *rconv_im_in_q7 = test3;
|
||||
q7_t *rconv_im_out_ref_q7 = test3 + RCONV_IM_DIM_Y * RCONV_IM_DIM_X * RCONV_IM_CH;
|
||||
q7_t *rconv_im_out_opt_q7 =
|
||||
test3 + RCONV_IM_DIM_Y * RCONV_IM_DIM_X * RCONV_IM_CH + RCONV_OUT_DIM_Y * RCONV_OUT_DIM_X * RCONV_OUT_CH;
|
||||
|
||||
initialize_results_q7(rconv_im_out_ref_q7, rconv_im_out_opt_q7, RCONV_OUT_DIM_Y * RCONV_OUT_DIM_X * RCONV_OUT_CH);
|
||||
|
||||
printf("start conv q7 nonsquare ref implementation\n");
|
||||
arm_convolve_HWC_q7_ref_nonsquare(rconv_im_in_q7, RCONV_IM_DIM_X, RCONV_IM_DIM_Y, RCONV_IM_CH, rconv_weight_q7,
|
||||
RCONV_OUT_CH, RCONV_KER_DIM_X, RCONV_KER_DIM_Y, RCONV_PADDING_X, RCONV_PADDING_Y,
|
||||
RCONV_STRIDE_X, RCONV_STRIDE_Y, rconv_bias_q7, 1, 7, rconv_im_out_ref_q7,
|
||||
RCONV_OUT_DIM_X, RCONV_OUT_DIM_Y, rconv_buf, NULL);
|
||||
|
||||
printf("start conv q7 nonsquare opt implementation\n");
|
||||
arm_convolve_HWC_q7_fast_nonsquare(rconv_im_in_q7, RCONV_IM_DIM_X, RCONV_IM_DIM_Y, RCONV_IM_CH, rconv_weight_q7,
|
||||
RCONV_OUT_CH, RCONV_KER_DIM_X, RCONV_KER_DIM_Y, RCONV_PADDING_X, RCONV_PADDING_Y,
|
||||
RCONV_STRIDE_X, RCONV_STRIDE_Y, rconv_bias_q7, 1, 7, rconv_im_out_opt_q7,
|
||||
RCONV_OUT_DIM_X, RCONV_OUT_DIM_Y, rconv_buf, NULL);
|
||||
|
||||
verify_results_q7(rconv_im_out_ref_q7, rconv_im_out_opt_q7, RCONV_OUT_DIM_Y * RCONV_OUT_DIM_X * RCONV_OUT_CH);
|
||||
|
||||
initialize_results_q7(rconv_im_out_ref_q7, rconv_im_out_opt_q7, RCONV_OUT_DIM_Y * RCONV_OUT_DIM_X * RCONV_OUT_CH);
|
||||
|
||||
printf("start conv q7 nonsquare ref implementation\n");
|
||||
arm_convolve_HWC_q7_ref_nonsquare(rconv_im_in_q7, RCONV_IM_DIM_X, RCONV_IM_DIM_Y, RCONV_IM_CH, rconv_weight_q7,
|
||||
RCONV_OUT_CH, RCONV_KER_DIM_X, RCONV_KER_DIM_Y, RCONV_PADDING_X, RCONV_PADDING_Y,
|
||||
RCONV_STRIDE_X, RCONV_STRIDE_Y, rconv_bias_q7, 1, 7, rconv_im_out_ref_q7,
|
||||
RCONV_OUT_DIM_X, RCONV_OUT_DIM_Y, rconv_buf, NULL);
|
||||
|
||||
printf("start conv q7 nonsquare basic implementation\n");
|
||||
arm_convolve_HWC_q7_basic_nonsquare(rconv_im_in_q7, RCONV_IM_DIM_X, RCONV_IM_DIM_Y, RCONV_IM_CH, rconv_weight_q7,
|
||||
RCONV_OUT_CH, RCONV_KER_DIM_X, RCONV_KER_DIM_Y, RCONV_PADDING_X, RCONV_PADDING_Y,
|
||||
RCONV_STRIDE_X, RCONV_STRIDE_Y, rconv_bias_q7, 1, 7, rconv_im_out_opt_q7,
|
||||
RCONV_OUT_DIM_X, RCONV_OUT_DIM_Y, rconv_buf, NULL);
|
||||
|
||||
verify_results_q7(rconv_im_out_ref_q7, rconv_im_out_opt_q7, RCONV_OUT_DIM_Y * RCONV_OUT_DIM_X * RCONV_OUT_CH);
|
||||
|
||||
initialize_results_q7(rconv_im_out_ref_q7, rconv_im_out_opt_q7, RCONV_OUT_DIM_Y * RCONV_OUT_DIM_X * RCONV_OUT_CH);
|
||||
|
||||
printf("start 1x1 conv q7 nonsquare fast implementation\n");
|
||||
arm_convolve_HWC_q7_fast_nonsquare(rconv_im_in_q7, RCONV_IM_DIM_X, RCONV_IM_DIM_Y, RCONV_IM_CH, rconv_weight_q7,
|
||||
RCONV_OUT_CH, 1, 1, 0, 0, RCONV_STRIDE_X,
|
||||
RCONV_STRIDE_Y, rconv_bias_q7, 1, 7, rconv_im_out_ref_q7, RCONV_OUT_DIM_X,
|
||||
RCONV_OUT_DIM_Y, rconv_buf, NULL);
|
||||
|
||||
printf("start 1x1 conv q7 nonsquare dedicated function implementation\n");
|
||||
arm_convolve_1x1_HWC_q7_fast_nonsquare(rconv_im_in_q7, RCONV_IM_DIM_X, RCONV_IM_DIM_Y, RCONV_IM_CH, rconv_weight_q7,
|
||||
RCONV_OUT_CH, 1, 1, 0, 0, RCONV_STRIDE_X,
|
||||
RCONV_STRIDE_Y, rconv_bias_q7, 1, 7, rconv_im_out_opt_q7, RCONV_OUT_DIM_X,
|
||||
RCONV_OUT_DIM_Y, rconv_buf, NULL);
|
||||
|
||||
verify_results_q7(rconv_im_out_ref_q7, rconv_im_out_opt_q7, RCONV_OUT_DIM_Y * RCONV_OUT_DIM_X * RCONV_OUT_CH);
|
||||
|
||||
printf("start depthwise separable conv q7 nonsquare ref implementation\n");
|
||||
arm_depthwise_separable_conv_HWC_q7_ref_nonsquare(rconv_im_in_q7, RCONV_IM_DIM_X, RCONV_IM_DIM_Y, RCONV_IM_CH,
|
||||
rconv_weight_q7, RCONV_OUT_CH, RCONV_KER_DIM_X, RCONV_KER_DIM_Y,
|
||||
RCONV_PADDING_X, RCONV_PADDING_Y, RCONV_STRIDE_X, RCONV_STRIDE_Y,
|
||||
rconv_bias_q7, 1, 7, rconv_im_out_ref_q7, RCONV_OUT_DIM_X,
|
||||
RCONV_OUT_DIM_Y, rconv_buf, NULL);
|
||||
|
||||
printf("start depthwise separable conv q7 nonsquare opt implementation\n");
|
||||
arm_depthwise_separable_conv_HWC_q7_nonsquare(rconv_im_in_q7, RCONV_IM_DIM_X, RCONV_IM_DIM_Y, RCONV_IM_CH,
|
||||
rconv_weight_q7, RCONV_OUT_CH, RCONV_KER_DIM_X, RCONV_KER_DIM_Y,
|
||||
RCONV_PADDING_X, RCONV_PADDING_Y, RCONV_STRIDE_X, RCONV_STRIDE_Y,
|
||||
rconv_bias_q7, 1, 7, rconv_im_out_opt_q7, RCONV_OUT_DIM_X,
|
||||
RCONV_OUT_DIM_Y, rconv_buf, NULL);
|
||||
|
||||
verify_results_q7(rconv_im_out_ref_q7, rconv_im_out_opt_q7, RCONV_OUT_DIM_Y * RCONV_OUT_DIM_X * RCONV_OUT_CH);
|
||||
|
||||
delete[]test1;
|
||||
delete[]test2;
|
||||
delete[]test3;
|
||||
|
||||
test2 = new q15_t[RCONV_KER_DIM_Y * RCONV_KER_DIM_X * RCONV_IM_CH * RCONV_OUT_CH + RCONV_OUT_CH]; // weights + bias
|
||||
test4 = new q15_t[2 * RCONV_KER_DIM_Y * RCONV_KER_DIM_X * RCONV_IM_CH //buffer
|
||||
+ RCONV_IM_DIM_Y * RCONV_IM_DIM_X * RCONV_IM_CH + 2 * RCONV_OUT_DIM_Y * RCONV_OUT_DIM_X * RCONV_OUT_CH]; // i/o
|
||||
|
||||
for (int i = 0; i < RCONV_KER_DIM_Y * RCONV_KER_DIM_X * RCONV_IM_CH * RCONV_OUT_CH + RCONV_OUT_CH; i++)
|
||||
{
|
||||
test2[i] = rand() % 256 - 100;
|
||||
}
|
||||
|
||||
for (int i = 0;
|
||||
i < 2 * RCONV_KER_DIM_Y * RCONV_KER_DIM_X * RCONV_IM_CH
|
||||
+ RCONV_IM_DIM_Y * RCONV_IM_DIM_X * RCONV_IM_CH + 2 * RCONV_OUT_DIM_Y * RCONV_OUT_DIM_X * RCONV_OUT_CH;
|
||||
i++)
|
||||
{
|
||||
test4[i] = rand() % 256 - 100;
|
||||
}
|
||||
|
||||
q15_t *rconv_weight_q15 = test2;
|
||||
q15_t *rconv_bias_q15 = test2 + RCONV_KER_DIM_Y * RCONV_KER_DIM_X * RCONV_IM_CH * RCONV_OUT_CH;
|
||||
|
||||
rconv_buf = test4;
|
||||
|
||||
q15_t *rconv_im_in_q15 = test4 + 2 * RCONV_KER_DIM_Y * RCONV_KER_DIM_X * RCONV_IM_CH;
|
||||
q15_t *rconv_im_out_ref_q15 = rconv_im_in_q15 + RCONV_IM_DIM_Y * RCONV_IM_DIM_X * RCONV_IM_CH;
|
||||
q15_t *rconv_im_out_opt_q15 = rconv_im_out_ref_q15 + RCONV_OUT_DIM_Y * RCONV_OUT_DIM_X * RCONV_OUT_CH;
|
||||
|
||||
initialize_results_q15(rconv_im_out_ref_q15, rconv_im_out_opt_q15, RCONV_OUT_DIM_Y * RCONV_OUT_DIM_X * RCONV_OUT_CH);
|
||||
|
||||
printf("start conv q15 nonsquare ref implementation\n");
|
||||
arm_convolve_HWC_q15_nonsquare_ref(rconv_im_in_q15, RCONV_IM_DIM_X, RCONV_IM_DIM_Y, RCONV_IM_CH, rconv_weight_q15,
|
||||
RCONV_OUT_CH, RCONV_KER_DIM_X, RCONV_KER_DIM_Y, RCONV_PADDING_X, RCONV_PADDING_Y,
|
||||
RCONV_STRIDE_X, RCONV_STRIDE_Y, rconv_bias_q15, 1, 7, rconv_im_out_ref_q15,
|
||||
RCONV_OUT_DIM_X, RCONV_OUT_DIM_Y, rconv_buf, NULL);
|
||||
|
||||
printf("start conv q5 nonsquare opt implementation\n");
|
||||
arm_convolve_HWC_q15_fast_nonsquare(rconv_im_in_q15, RCONV_IM_DIM_X, RCONV_IM_DIM_Y, RCONV_IM_CH, rconv_weight_q15,
|
||||
RCONV_OUT_CH, RCONV_KER_DIM_X, RCONV_KER_DIM_Y, RCONV_PADDING_X, RCONV_PADDING_Y,
|
||||
RCONV_STRIDE_X, RCONV_STRIDE_Y, rconv_bias_q15, 1, 7, rconv_im_out_opt_q15,
|
||||
RCONV_OUT_DIM_X, RCONV_OUT_DIM_Y, rconv_buf, NULL);
|
||||
|
||||
verify_results_q15(rconv_im_out_ref_q15, rconv_im_out_opt_q15, RCONV_OUT_DIM_Y * RCONV_OUT_DIM_X * RCONV_OUT_CH);
|
||||
|
||||
delete [] test2;
|
||||
delete [] test4;
|
||||
#endif
|
||||
|
||||
#ifdef TEST_CONV
|
||||
|
||||
#define CONV_IM_DIM 16
|
||||
#define CONV_IM_CH 16
|
||||
#define CONV_KER_DIM 5
|
||||
#define CONV_OUT_CH 16
|
||||
#define CONV_OUT_DIM 16
|
||||
|
||||
test1 = new q7_t[CONV_KER_DIM * CONV_KER_DIM * CONV_IM_CH * CONV_OUT_CH + CONV_OUT_CH];
|
||||
test2 =
|
||||
new q15_t[CONV_KER_DIM * CONV_KER_DIM * CONV_IM_CH * CONV_OUT_CH +
|
||||
2 * CONV_KER_DIM * CONV_KER_DIM * CONV_IM_CH * CONV_OUT_CH + CONV_OUT_CH];
|
||||
test3 = new q7_t[CONV_IM_DIM * CONV_IM_DIM * CONV_IM_CH + 2 * CONV_OUT_DIM * CONV_OUT_DIM * CONV_OUT_CH];
|
||||
test4 = new q15_t[CONV_IM_DIM * CONV_IM_DIM * CONV_IM_CH + 2 * CONV_OUT_DIM * CONV_OUT_DIM * CONV_OUT_CH];
|
||||
|
||||
for (int i = 0; i < CONV_KER_DIM * CONV_KER_DIM * CONV_IM_CH * CONV_OUT_CH + CONV_OUT_CH; i++)
|
||||
{
|
||||
test1[i] = rand() % 256 - 100;
|
||||
}
|
||||
|
||||
for (int i = 0;
|
||||
i <
|
||||
CONV_KER_DIM * CONV_KER_DIM * CONV_IM_CH * CONV_OUT_CH +
|
||||
2 * CONV_KER_DIM * CONV_KER_DIM * CONV_IM_CH * CONV_OUT_CH + CONV_OUT_CH; i++)
|
||||
{
|
||||
test2[i] = (rand() % 65536 - 32768);
|
||||
}
|
||||
|
||||
for (int i = 0; i < CONV_IM_DIM * CONV_IM_DIM * CONV_IM_CH + 2 * CONV_OUT_DIM * CONV_OUT_DIM * CONV_OUT_CH; i++)
|
||||
{
|
||||
test3[i] = rand() % 256 - 100;
|
||||
}
|
||||
|
||||
for (int i = 0; i < CONV_IM_DIM * CONV_IM_DIM * CONV_IM_CH + 2 * CONV_OUT_DIM * CONV_OUT_DIM * CONV_OUT_CH; i++)
|
||||
{
|
||||
test4[i] = (rand() % 65536 - 32768);
|
||||
}
|
||||
|
||||
q7_t *conv_weight_q7 = test1;
|
||||
q7_t *conv_bias_q7 = test1 + CONV_KER_DIM * CONV_KER_DIM * CONV_IM_CH * CONV_OUT_CH;
|
||||
|
||||
q15_t *conv_weight_q15 = test2;
|
||||
q15_t *conv_buf = test2 + CONV_KER_DIM * CONV_KER_DIM * CONV_IM_CH * CONV_OUT_CH;
|
||||
q15_t *conv_bias_q15 =
|
||||
test2 + CONV_KER_DIM * CONV_KER_DIM * CONV_IM_CH * CONV_OUT_CH +
|
||||
2 * CONV_KER_DIM * CONV_KER_DIM * CONV_IM_CH * CONV_OUT_CH;
|
||||
|
||||
q7_t *conv_im_in_q7 = test3;
|
||||
q7_t *conv_im_out_ref_q7 = test3 + CONV_IM_DIM * CONV_IM_DIM * CONV_IM_CH;
|
||||
q7_t *conv_im_out_opt_q7 =
|
||||
test3 + CONV_IM_DIM * CONV_IM_DIM * CONV_IM_CH + CONV_OUT_DIM * CONV_OUT_DIM * CONV_OUT_CH;
|
||||
|
||||
q15_t *conv_im_in_q15 = test4;
|
||||
q15_t *conv_im_out_ref_q15 = test4 + CONV_IM_DIM * CONV_IM_DIM * CONV_IM_CH;
|
||||
q15_t *conv_im_out_opt_q15 =
|
||||
test4 + CONV_IM_DIM * CONV_IM_DIM * CONV_IM_CH + CONV_OUT_DIM * CONV_OUT_DIM * CONV_OUT_CH;
|
||||
|
||||
initialize_results_q7(conv_im_out_ref_q7, conv_im_out_opt_q7, CONV_OUT_DIM * CONV_OUT_DIM * CONV_OUT_CH);
|
||||
|
||||
printf("start q7 ref implementation\n");
|
||||
|
||||
arm_convolve_HWC_q7_ref(conv_im_in_q7, CONV_IM_DIM, CONV_IM_CH, conv_weight_q7,
|
||||
CONV_OUT_CH, CONV_KER_DIM, 2, 1, conv_bias_q7, 1, 7, conv_im_out_ref_q7,
|
||||
CONV_OUT_DIM, conv_buf, NULL);
|
||||
|
||||
printf("start q7 basic implementation\n");
|
||||
|
||||
arm_convolve_HWC_q7_basic(conv_im_in_q7, CONV_IM_DIM, CONV_IM_CH, conv_weight_q7,
|
||||
CONV_OUT_CH, CONV_KER_DIM, 2, 1, conv_bias_q7, 1, 7, conv_im_out_opt_q7,
|
||||
CONV_OUT_DIM, conv_buf, NULL);
|
||||
|
||||
verify_results_q7(conv_im_out_ref_q7, conv_im_out_opt_q7, CONV_OUT_DIM * CONV_OUT_DIM * CONV_OUT_CH);
|
||||
|
||||
printf("start q7 fast implementation\n");
|
||||
|
||||
arm_convolve_HWC_q7_fast(conv_im_in_q7, CONV_IM_DIM, CONV_IM_CH, conv_weight_q7,
|
||||
CONV_OUT_CH, CONV_KER_DIM, 2, 1, conv_bias_q7, 1, 7, conv_im_out_opt_q7,
|
||||
CONV_OUT_DIM, conv_buf, NULL);
|
||||
|
||||
verify_results_q7(conv_im_out_ref_q7, conv_im_out_opt_q7, CONV_OUT_DIM * CONV_OUT_DIM * CONV_OUT_CH);
|
||||
|
||||
// testing with RGB
|
||||
printf("start q7 ref implementation for RGB\n");
|
||||
|
||||
arm_convolve_HWC_q7_ref(conv_im_in_q7, CONV_IM_DIM, 3, conv_weight_q7,
|
||||
CONV_OUT_CH, CONV_KER_DIM, 2, 1, conv_bias_q7, 1, 7, conv_im_out_ref_q7,
|
||||
CONV_OUT_DIM, conv_buf, NULL);
|
||||
|
||||
printf("start q7 basic implementation for RGB\n");
|
||||
|
||||
arm_convolve_HWC_q7_basic(conv_im_in_q7, CONV_IM_DIM, 3, conv_weight_q7,
|
||||
CONV_OUT_CH, CONV_KER_DIM, 2, 1, conv_bias_q7, 1, 7, conv_im_out_opt_q7,
|
||||
CONV_OUT_DIM, conv_buf, NULL);
|
||||
|
||||
verify_results_q7(conv_im_out_ref_q7, conv_im_out_opt_q7, CONV_OUT_DIM * CONV_OUT_DIM * CONV_OUT_CH);
|
||||
|
||||
printf("start q7 RGB implementation for RGB\n");
|
||||
|
||||
arm_convolve_HWC_q7_RGB(conv_im_in_q7, CONV_IM_DIM, 3, conv_weight_q7,
|
||||
CONV_OUT_CH, CONV_KER_DIM, 2, 1, conv_bias_q7, 1, 7, conv_im_out_opt_q7,
|
||||
CONV_OUT_DIM, conv_buf, NULL);
|
||||
|
||||
verify_results_q7(conv_im_out_ref_q7, conv_im_out_opt_q7, CONV_OUT_DIM * CONV_OUT_DIM * CONV_OUT_CH);
|
||||
|
||||
// testing q15
|
||||
initialize_results_q15(conv_im_out_ref_q15, conv_im_out_opt_q15, CONV_OUT_DIM * CONV_OUT_DIM * CONV_OUT_CH);
|
||||
|
||||
printf("start q15 ref implementation\n");
|
||||
|
||||
arm_convolve_HWC_q15_ref(conv_im_in_q15, CONV_IM_DIM, CONV_IM_CH, conv_weight_q15,
|
||||
CONV_OUT_CH, CONV_KER_DIM, 2, 1, conv_bias_q15, 0, 15, conv_im_out_ref_q15,
|
||||
CONV_OUT_DIM, conv_buf, NULL);
|
||||
|
||||
printf("start q15 basic implementation\n");
|
||||
|
||||
arm_convolve_HWC_q15_basic(conv_im_in_q15, CONV_IM_DIM, CONV_IM_CH, conv_weight_q15,
|
||||
CONV_OUT_CH, CONV_KER_DIM, 2, 1, conv_bias_q15, 0, 15, conv_im_out_opt_q15,
|
||||
CONV_OUT_DIM, conv_buf, NULL);
|
||||
|
||||
verify_results_q15(conv_im_out_ref_q15, conv_im_out_opt_q15, CONV_OUT_DIM * CONV_OUT_DIM * CONV_OUT_CH);
|
||||
|
||||
printf("start q15 fast implementation\n");
|
||||
|
||||
arm_convolve_HWC_q15_fast(conv_im_in_q15, CONV_IM_DIM, CONV_IM_CH, conv_weight_q15,
|
||||
CONV_OUT_CH, CONV_KER_DIM, 2, 1, conv_bias_q15, 0, 15, conv_im_out_opt_q15,
|
||||
CONV_OUT_DIM, conv_buf, NULL);
|
||||
|
||||
verify_results_q15(conv_im_out_ref_q15, conv_im_out_opt_q15, CONV_OUT_DIM * CONV_OUT_DIM * CONV_OUT_CH);
|
||||
|
||||
// depthwise separable conv
|
||||
initialize_results_q7(conv_im_out_ref_q7, conv_im_out_opt_q7, CONV_OUT_DIM * CONV_OUT_DIM * CONV_OUT_CH);
|
||||
|
||||
printf("start q7 depthwise_separable_conv ref implementation\n");
|
||||
|
||||
arm_depthwise_separable_conv_HWC_q7_ref(conv_im_in_q7, CONV_IM_DIM, CONV_IM_CH, conv_weight_q7,
|
||||
CONV_OUT_CH, CONV_KER_DIM, 2, 1, conv_bias_q7, 1, 7, conv_im_out_ref_q7,
|
||||
CONV_OUT_DIM, conv_buf, NULL);
|
||||
|
||||
printf("start q7 depthwise_separable_conv implementation\n");
|
||||
|
||||
arm_depthwise_separable_conv_HWC_q7(conv_im_in_q7, CONV_IM_DIM, CONV_IM_CH, conv_weight_q7,
|
||||
CONV_OUT_CH, CONV_KER_DIM, 2, 1, conv_bias_q7, 1, 7, conv_im_out_opt_q7,
|
||||
CONV_OUT_DIM, conv_buf, NULL);
|
||||
|
||||
verify_results_q7(conv_im_out_ref_q7, conv_im_out_opt_q7, CONV_OUT_DIM * CONV_OUT_DIM * CONV_OUT_CH);
|
||||
|
||||
delete[]test1;
|
||||
delete[]test2;
|
||||
delete[]test3;
|
||||
delete[]test4;
|
||||
|
||||
#endif
|
||||
|
||||
test_pass = true;
|
||||
test_index = 0;
|
||||
while (test_flags[test_index] != -1) {
|
||||
if (test_flags[test_index]) {
|
||||
test_pass = false;
|
||||
}
|
||||
test_index ++;
|
||||
}
|
||||
if (test_pass) {
|
||||
printf("All tests passed\n");
|
||||
} else {
|
||||
printf("Test failed passed\n");
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
@@ -0,0 +1,78 @@
|
||||
#ifndef _MAIN_H_
|
||||
#define _MAIN_H_
|
||||
|
||||
#include <stdio.h>
|
||||
#include <stdlib.h>
|
||||
#include <math.h>
|
||||
|
||||
#include "arm_math.h"
|
||||
|
||||
#include "arm_nnfunctions.h"
|
||||
#include "ref_functions.h"
|
||||
|
||||
extern int test_index;
|
||||
extern q7_t test_flags[50];
|
||||
|
||||
void initialize_results_q7(q7_t * ref, q7_t * opt, int length)
|
||||
{
|
||||
arm_fill_q7(0, ref, length);
|
||||
arm_fill_q7(37, opt, length);
|
||||
}
|
||||
|
||||
void initialize_results_q15(q15_t * ref, q15_t * opt, int length)
|
||||
{
|
||||
arm_fill_q15(0, ref, length);
|
||||
arm_fill_q15(0x5F5, opt, length);
|
||||
}
|
||||
|
||||
void verify_results_q7(q7_t * ref, q7_t * opt, int length)
|
||||
{
|
||||
|
||||
bool if_match = true;
|
||||
|
||||
for (int i = 0; i < length; i++)
|
||||
{
|
||||
if (ref[i] != opt[i])
|
||||
{
|
||||
printf("Output mismatch at %d, expected %d, actual %d\r\n", i, ref[i], opt[i]);
|
||||
|
||||
if_match = false;
|
||||
}
|
||||
}
|
||||
|
||||
if (if_match == true)
|
||||
{
|
||||
printf("Outputs match.\r\n\r\n");
|
||||
test_flags[test_index++] = 0;
|
||||
} else {
|
||||
test_flags[test_index++] = 1;
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
void verify_results_q15(q15_t * ref, q15_t * opt, int length)
|
||||
{
|
||||
|
||||
bool if_match = true;
|
||||
|
||||
for (int i = 0; i < length; i++)
|
||||
{
|
||||
if (ref[i] != opt[i])
|
||||
{
|
||||
printf("Output mismatch at %d, expected %d, actual %d\r\n", i, ref[i], opt[i]);
|
||||
|
||||
if_match = false;
|
||||
}
|
||||
}
|
||||
|
||||
if (if_match == true)
|
||||
{
|
||||
printf("Outputs match.\r\n\r\n");
|
||||
test_flags[test_index++] = 0;
|
||||
} else {
|
||||
test_flags[test_index++] = 1;
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,4 @@
|
||||
CMSIS DSP_Lib example arm_nnexample_nn_test for
|
||||
Cortex-M3, Cortex-M4 and Cortex-M7.
|
||||
|
||||
The example is configured for uVision Simulator.
|
||||
@@ -0,0 +1,101 @@
|
||||
/*
|
||||
* Copyright (C) 2010-2018 Arm Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
* Project: CMSIS NN Library
|
||||
* Title: arm_nn_activations_q15.c
|
||||
* Description: Q15 neural network activation function using direct table look-up
|
||||
*
|
||||
* $Date: 17. January 2018
|
||||
* $Revision: V.1.0.0
|
||||
*
|
||||
* Target Processor: Cortex-M cores
|
||||
*
|
||||
* -------------------------------------------------------------------- */
|
||||
|
||||
#include "arm_math.h"
|
||||
#include "arm_common_tables.h"
|
||||
#include "arm_nnfunctions.h"
|
||||
|
||||
/**
|
||||
* @ingroup groupNN
|
||||
*/
|
||||
|
||||
/**
|
||||
* @addtogroup Acti
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Q15 neural network activation function using direct table look-up
|
||||
* @param[in,out] data pointer to input
|
||||
* @param[in] size number of elements
|
||||
* @param[in] int_width bit-width of the integer part, assume to be smaller than 3
|
||||
* @param[in] type type of activation functions
|
||||
* @return none.
|
||||
*
|
||||
* @details
|
||||
*
|
||||
* This is the direct table look-up approach.
|
||||
*
|
||||
* Assume here the integer part of the fixed-point is <= 3.
|
||||
* More than 3 just not making much sense, makes no difference with
|
||||
* saturation followed by any of these activation functions.
|
||||
*/
|
||||
|
||||
void arm_nn_activations_direct_q15(q15_t * data, uint16_t size, uint16_t int_width, arm_nn_activation_type type)
|
||||
{
|
||||
uint16_t i = size;
|
||||
q15_t *pIn = data;
|
||||
q15_t *pOut = data;
|
||||
uint16_t shift_size = 8 + 3 - int_width;
|
||||
uint32_t bit_mask = 0x7FF >> int_width;
|
||||
uint32_t full_frac = bit_mask + 1;
|
||||
const q15_t *lookup_table;
|
||||
|
||||
switch (type)
|
||||
{
|
||||
case ARM_SIGMOID:
|
||||
lookup_table = sigmoidTable_q15;
|
||||
break;
|
||||
case ARM_TANH:
|
||||
default:
|
||||
lookup_table = tanhTable_q15;
|
||||
break;
|
||||
}
|
||||
|
||||
while (i)
|
||||
{
|
||||
q15_t out;
|
||||
q15_t in = *pIn++;
|
||||
q15_t frac = (uint32_t) in & bit_mask;
|
||||
q15_t value = lookup_table[__USAT(in >> shift_size, 8)];
|
||||
q15_t value2 = lookup_table[__USAT(1 + (in >> shift_size), 8)];
|
||||
|
||||
/* doing the interpolation here for better accuracy */
|
||||
out = ((q31_t) (full_frac - frac) * value + (q31_t) value2 * frac) >> shift_size;
|
||||
|
||||
*pOut++ = out;
|
||||
i--;
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @} end of Acti group
|
||||
*/
|
||||
@@ -0,0 +1,91 @@
|
||||
/*
|
||||
* Copyright (C) 2010-2018 Arm Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
* Project: CMSIS NN Library
|
||||
* Title: arm_nn_activations_q7.c
|
||||
* Description: Q7 neural network activation function using direct table look-up
|
||||
*
|
||||
* $Date: 17. January 2018
|
||||
* $Revision: V.1.0.0
|
||||
*
|
||||
* Target Processor: Cortex-M cores
|
||||
*
|
||||
* -------------------------------------------------------------------- */
|
||||
|
||||
#include "arm_math.h"
|
||||
#include "arm_common_tables.h"
|
||||
#include "arm_nnfunctions.h"
|
||||
|
||||
/**
|
||||
* @ingroup groupNN
|
||||
*/
|
||||
|
||||
/**
|
||||
* @addtogroup Acti
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Q7 neural network activation function using direct table look-up
|
||||
* @param[in,out] data pointer to input
|
||||
* @param[in] size number of elements
|
||||
* @param[in] int_width bit-width of the integer part, assume to be smaller than 3
|
||||
* @param[in] type type of activation functions
|
||||
* @return none.
|
||||
*
|
||||
* @details
|
||||
*
|
||||
* This is the direct table look-up approach.
|
||||
*
|
||||
* Assume here the integer part of the fixed-point is <= 3.
|
||||
* More than 3 just not making much sense, makes no difference with
|
||||
* saturation followed by any of these activation functions.
|
||||
*/
|
||||
|
||||
void arm_nn_activations_direct_q7(q7_t * data, uint16_t size, uint16_t int_width, arm_nn_activation_type type)
|
||||
{
|
||||
uint16_t i = size;
|
||||
q7_t *pIn = data;
|
||||
q7_t *pOut = data;
|
||||
q7_t in;
|
||||
q7_t out;
|
||||
uint16_t shift_size = 3 - int_width;
|
||||
const q7_t *lookup_table;
|
||||
switch (type)
|
||||
{
|
||||
case ARM_SIGMOID:
|
||||
lookup_table = sigmoidTable_q7;
|
||||
break;
|
||||
case ARM_TANH:
|
||||
default:
|
||||
lookup_table = tanhTable_q7;
|
||||
break;
|
||||
}
|
||||
while (i)
|
||||
{
|
||||
in = *pIn++;
|
||||
out = lookup_table[(uint8_t) (in >> shift_size)];
|
||||
*pOut++ = out;
|
||||
i--;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @} end of Acti group
|
||||
*/
|
||||
@@ -0,0 +1,106 @@
|
||||
/*
|
||||
* Copyright (C) 2010-2018 Arm Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
* Project: CMSIS NN Library
|
||||
* Title: arm_relu_q15.c
|
||||
* Description: Q15 version of ReLU
|
||||
*
|
||||
* $Date: 17. January 2018
|
||||
* $Revision: V.1.0.0
|
||||
*
|
||||
* Target Processor: Cortex-M cores
|
||||
*
|
||||
* -------------------------------------------------------------------- */
|
||||
|
||||
#include "arm_math.h"
|
||||
#include "arm_nnfunctions.h"
|
||||
|
||||
/**
|
||||
* @ingroup groupNN
|
||||
*/
|
||||
|
||||
/**
|
||||
* @addtogroup Acti
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Q15 RELU function
|
||||
* @param[in,out] data pointer to input
|
||||
* @param[in] size number of elements
|
||||
* @return none.
|
||||
*
|
||||
* @details
|
||||
*
|
||||
* Optimized relu with QSUB instructions.
|
||||
*
|
||||
*/
|
||||
|
||||
void arm_relu_q15(q15_t * data, uint16_t size)
|
||||
{
|
||||
|
||||
#if defined (ARM_MATH_DSP)
|
||||
/* Run the following code for Cortex-M4 and Cortex-M7 */
|
||||
|
||||
uint16_t i = size >> 1;
|
||||
q15_t *pIn = data;
|
||||
q15_t *pOut = data;
|
||||
q31_t in;
|
||||
q31_t buf;
|
||||
q31_t mask;
|
||||
|
||||
while (i)
|
||||
{
|
||||
in = *__SIMD32(pIn)++;
|
||||
|
||||
/* extract the first bit */
|
||||
buf = __ROR(in & 0x80008000, 15);
|
||||
|
||||
/* if MSB=1, mask will be 0xFF, 0x0 otherwise */
|
||||
mask = __QSUB16(0x00000000, buf);
|
||||
|
||||
*__SIMD32(pOut)++ = in & (~mask);
|
||||
i--;
|
||||
}
|
||||
|
||||
if (size & 0x1)
|
||||
{
|
||||
if (*pIn < 0)
|
||||
{
|
||||
*pIn = 0;
|
||||
}
|
||||
pIn++;
|
||||
}
|
||||
#else
|
||||
/* Run the following code as reference implementation for Cortex-M0 and Cortex-M3 */
|
||||
uint16_t i;
|
||||
|
||||
for (i = 0; i < size; i++)
|
||||
{
|
||||
if (data[i] < 0)
|
||||
data[i] = 0;
|
||||
}
|
||||
|
||||
#endif /* ARM_MATH_DSP */
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @} end of Acti group
|
||||
*/
|
||||
@@ -0,0 +1,110 @@
|
||||
/*
|
||||
* Copyright (C) 2010-2018 Arm Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
* Project: CMSIS NN Library
|
||||
* Title: arm_relu_q7.c
|
||||
* Description: Q7 version of ReLU
|
||||
*
|
||||
* $Date: 17. January 2018
|
||||
* $Revision: V.1.0.0
|
||||
*
|
||||
* Target Processor: Cortex-M cores
|
||||
*
|
||||
* -------------------------------------------------------------------- */
|
||||
|
||||
#include "arm_math.h"
|
||||
#include "arm_nnfunctions.h"
|
||||
|
||||
/**
|
||||
* @ingroup groupNN
|
||||
*/
|
||||
|
||||
/**
|
||||
* @addtogroup Acti
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Q7 RELU function
|
||||
* @param[in,out] data pointer to input
|
||||
* @param[in] size number of elements
|
||||
* @return none.
|
||||
*
|
||||
* @details
|
||||
*
|
||||
* Optimized relu with QSUB instructions.
|
||||
*
|
||||
*/
|
||||
|
||||
void arm_relu_q7(q7_t * data, uint16_t size)
|
||||
{
|
||||
|
||||
#if defined (ARM_MATH_DSP)
|
||||
/* Run the following code for Cortex-M4 and Cortex-M7 */
|
||||
|
||||
uint16_t i = size >> 2;
|
||||
q7_t *pIn = data;
|
||||
q7_t *pOut = data;
|
||||
q31_t in;
|
||||
q31_t buf;
|
||||
q31_t mask;
|
||||
|
||||
while (i)
|
||||
{
|
||||
in = *__SIMD32(pIn)++;
|
||||
|
||||
/* extract the first bit */
|
||||
buf = __ROR(in & 0x80808080, 7);
|
||||
|
||||
/* if MSB=1, mask will be 0xFF, 0x0 otherwise */
|
||||
mask = __QSUB8(0x00000000, buf);
|
||||
|
||||
*__SIMD32(pOut)++ = in & (~mask);
|
||||
i--;
|
||||
}
|
||||
|
||||
i = size & 0x3;
|
||||
while (i)
|
||||
{
|
||||
if (*pIn < 0)
|
||||
{
|
||||
*pIn = 0;
|
||||
}
|
||||
pIn++;
|
||||
i--;
|
||||
}
|
||||
|
||||
#else
|
||||
/* Run the following code as reference implementation for Cortex-M0 and Cortex-M3 */
|
||||
|
||||
uint16_t i;
|
||||
|
||||
for (i = 0; i < size; i++)
|
||||
{
|
||||
if (data[i] < 0)
|
||||
data[i] = 0;
|
||||
}
|
||||
|
||||
#endif /* ARM_MATH_DSP */
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @} end of Acti group
|
||||
*/
|
||||
@@ -0,0 +1,235 @@
|
||||
/*
|
||||
* Copyright (C) 2010-2018 Arm Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
* Project: CMSIS NN Library
|
||||
* Title: arm_convolve_1x1_HWC_q7_fast_nonsquare.c
|
||||
* Description: Fast Q7 version of 1x1 convolution (non-square shape)
|
||||
*
|
||||
* $Date: 17. January 2018
|
||||
* $Revision: V.1.0.0
|
||||
*
|
||||
* Target Processor: Cortex-M cores
|
||||
*
|
||||
* -------------------------------------------------------------------- */
|
||||
|
||||
#include "arm_math.h"
|
||||
#include "arm_nnfunctions.h"
|
||||
|
||||
/**
|
||||
* @ingroup groupNN
|
||||
*/
|
||||
|
||||
/**
|
||||
* @addtogroup NNConv
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Fast Q7 version of 1x1 convolution (non-sqaure shape)
|
||||
* @param[in] Im_in pointer to input tensor
|
||||
* @param[in] dim_im_in_x input tensor dimention x
|
||||
* @param[in] dim_im_in_y input tensor dimention y
|
||||
* @param[in] ch_im_in number of input tensor channels
|
||||
* @param[in] wt pointer to kernel weights
|
||||
* @param[in] ch_im_out number of filters, i.e., output tensor channels
|
||||
* @param[in] dim_kernel_x filter kernel size x
|
||||
* @param[in] dim_kernel_y filter kernel size y
|
||||
* @param[in] padding_x padding size x
|
||||
* @param[in] padding_y padding size y
|
||||
* @param[in] stride_x convolution stride x
|
||||
* @param[in] stride_y convolution stride y
|
||||
* @param[in] bias pointer to bias
|
||||
* @param[in] bias_shift amount of left-shift for bias
|
||||
* @param[in] out_shift amount of right-shift for output
|
||||
* @param[in,out] Im_out pointer to output tensor
|
||||
* @param[in] dim_im_out_x output tensor dimension x
|
||||
* @param[in] dim_im_out_y output tensor dimension y
|
||||
* @param[in,out] bufferA pointer to buffer space for input
|
||||
* @param[in,out] bufferB pointer to buffer space for output
|
||||
* @return The function returns either
|
||||
* <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
|
||||
*
|
||||
* This function is optimized for convolution with 1x1 kernel size (i.e., dim_kernel_x=1
|
||||
* and dim_kernel_y=1). It can be used for the second half of MobileNets [1] after depthwise
|
||||
* separable convolution.
|
||||
*
|
||||
* This function is the version with full list of optimization tricks, but with
|
||||
* some contraints:
|
||||
* ch_im_in is multiple of 4
|
||||
* ch_im_out is multiple of 2
|
||||
*
|
||||
* [1] MobileNets: Efficient Convolutional Neural Networks for Mobile Vision Applications
|
||||
* https://arxiv.org/abs/1704.04861
|
||||
*/
|
||||
|
||||
arm_status arm_convolve_1x1_HWC_q7_fast_nonsquare(const q7_t * Im_in,
|
||||
const uint16_t dim_im_in_x,
|
||||
const uint16_t dim_im_in_y,
|
||||
const uint16_t ch_im_in,
|
||||
const q7_t * wt,
|
||||
const uint16_t ch_im_out,
|
||||
const uint16_t dim_kernel_x,
|
||||
const uint16_t dim_kernel_y,
|
||||
const uint16_t padding_x,
|
||||
const uint16_t padding_y,
|
||||
const uint16_t stride_x,
|
||||
const uint16_t stride_y,
|
||||
const q7_t * bias,
|
||||
const uint16_t bias_shift,
|
||||
const uint16_t out_shift,
|
||||
q7_t * Im_out,
|
||||
const uint16_t dim_im_out_x,
|
||||
const uint16_t dim_im_out_y,
|
||||
q15_t * bufferA,
|
||||
q7_t * bufferB)
|
||||
{
|
||||
|
||||
#if defined (ARM_MATH_DSP)
|
||||
/* Run the following code for Cortex-M4 and Cortex-M7 */
|
||||
|
||||
int16_t i_out_y, i_out_x;
|
||||
int16_t i_ch_out;
|
||||
|
||||
/* -----------------------
|
||||
* Here we use bufferA as q15_t internally as computation are done with q15_t level
|
||||
* im2col are done to output in q15_t format from q7_t input
|
||||
*/
|
||||
|
||||
q15_t *pBuffer = bufferA;
|
||||
q7_t *pOut = Im_out;
|
||||
|
||||
if (ch_im_in % 4 != 0 || ch_im_out % 2 != 0 || dim_kernel_x != 1 || dim_kernel_y != 1
|
||||
|| padding_x != 0 || padding_y != 0 || stride_x != 1 || stride_y != 1)
|
||||
{
|
||||
/* check if the input dimension meets the constraints */
|
||||
return ARM_MATH_SIZE_MISMATCH;
|
||||
}
|
||||
|
||||
for (i_out_y = 0; i_out_y < dim_im_out_y; i_out_y++)
|
||||
{
|
||||
for (i_out_x = 0; i_out_x < dim_im_out_x; i_out_x++)
|
||||
{
|
||||
/* This part implements the im2col function */
|
||||
arm_q7_to_q15_reordered_no_shift((q7_t *) Im_in + (i_out_y * dim_im_in_x + i_out_x) * ch_im_in, pBuffer,
|
||||
ch_im_in);
|
||||
pBuffer += ch_im_in;
|
||||
|
||||
if (pBuffer == bufferA + 2 * ch_im_in * dim_kernel_x * dim_kernel_y)
|
||||
{
|
||||
pOut =
|
||||
arm_nn_mat_mult_kernel_q7_q15_reordered(wt, bufferA, ch_im_out, ch_im_in, bias_shift, out_shift, bias, pOut);
|
||||
/* counter reset */
|
||||
pBuffer = bufferA;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/* check if there is left-over for compute */
|
||||
if (pBuffer != bufferA)
|
||||
{
|
||||
const q7_t *pA = wt;
|
||||
for (i_ch_out = 0; i_ch_out < ch_im_out; i_ch_out++)
|
||||
{
|
||||
q31_t sum = ((q31_t)(bias[i_ch_out]) << bias_shift) + NN_ROUND(out_shift);
|
||||
q15_t *pB = bufferA;
|
||||
/* basically each time it process 4 entries */
|
||||
uint16_t colCnt = ch_im_in * dim_kernel_x * dim_kernel_y >> 2;
|
||||
|
||||
while (colCnt)
|
||||
{
|
||||
|
||||
q31_t inA1, inA2;
|
||||
q31_t inB1, inB2;
|
||||
|
||||
pA = (const q7_t *)read_and_pad_reordered((void *)pA, &inA1, &inA2);
|
||||
|
||||
inB1 = *__SIMD32(pB)++;
|
||||
sum = __SMLAD(inA1, inB1, sum);
|
||||
inB2 = *__SIMD32(pB)++;
|
||||
sum = __SMLAD(inA2, inB2, sum);
|
||||
|
||||
colCnt--;
|
||||
}
|
||||
colCnt = ch_im_in * dim_kernel_y * dim_kernel_x & 0x3;
|
||||
while (colCnt)
|
||||
{
|
||||
q7_t inA1 = *pA++;
|
||||
q15_t inB1 = *pB++;
|
||||
sum += inA1 * inB1;
|
||||
colCnt--;
|
||||
}
|
||||
*pOut = (q7_t) __SSAT((sum >> out_shift), 8);
|
||||
pOut++;
|
||||
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
#else
|
||||
/* Run the following code as reference implementation for Cortex-M0 and Cortex-M3 */
|
||||
|
||||
int i, j, k, l, m, n;
|
||||
int conv_out;
|
||||
int in_row, in_col;
|
||||
|
||||
if (ch_im_in % 4 != 0 || ch_im_out % 2 != 0 || dim_kernel_x != 1 || dim_kernel_y != 1
|
||||
|| padding_x != 0 || padding_y != 0 || stride_x != 1 || stride_y != 1)
|
||||
{
|
||||
/* check if the input dimension meets the constraints */
|
||||
return ARM_MATH_SIZE_MISMATCH;
|
||||
}
|
||||
|
||||
for (i = 0; i < ch_im_out; i++)
|
||||
{
|
||||
for (j = 0; j < dim_im_out_y; j++)
|
||||
{
|
||||
for (k = 0; k < dim_im_out_x; k++)
|
||||
{
|
||||
conv_out = ((q31_t)(bias[i]) << bias_shift) + NN_ROUND(out_shift);
|
||||
for (m = 0; m < dim_kernel_y; m++)
|
||||
{
|
||||
for (n = 0; n < dim_kernel_x; n++)
|
||||
{
|
||||
// if-for implementation
|
||||
in_row = stride_y * j + m - padding_y;
|
||||
in_col = stride_x * k + n - padding_x;
|
||||
if (in_row >= 0 && in_col >= 0 && in_row < dim_im_in_y && in_col < dim_im_in_x)
|
||||
{
|
||||
for (l = 0; l < ch_im_in; l++)
|
||||
{
|
||||
conv_out += Im_in[(in_row * dim_im_in_x + in_col) * ch_im_in + l] *
|
||||
wt[i * ch_im_in * dim_kernel_y * dim_kernel_x + (m * dim_kernel_y + n) * ch_im_in + l];
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
Im_out[i + (j * dim_im_out_x + k) * ch_im_out] = (q7_t) __SSAT((conv_out >> out_shift), 8);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
#endif /* ARM_MATH_DSP */
|
||||
|
||||
/* Return to application */
|
||||
return ARM_MATH_SUCCESS;
|
||||
}
|
||||
|
||||
/**
|
||||
* @} end of NNConv group
|
||||
*/
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user