Static Call Graph - [Objects\B-G474E-DPOW1

commit b85718ccf2e8bcf62bff27e8db39f3ca50d05246 Author: andrey Date: Sat May 23 18:02:41 2026 +0300 add proj diff --git a/.vs/ProjectSettings.json b/.vs/ProjectSettings.json new file mode 100644 index 0000000..f8b4888 --- /dev/null +++ b/.vs/ProjectSettings.json @@ -0,0 +1,3 @@ +{ + "CurrentProjectSetting": null +} \ No newline at end of file diff --git a/.vs/VSWorkspaceState.json b/.vs/VSWorkspaceState.json new file mode 100644 index 0000000..6b61141 --- /dev/null +++ b/.vs/VSWorkspaceState.json @@ -0,0 +1,6 @@ +{ + "ExpandedNodes": [ + "" + ], + "PreviewInSolutionExplorer": false +} \ No newline at end of file diff --git a/.vs/embedded/v17/.suo b/.vs/embedded/v17/.suo new file mode 100644 index 0000000..9a2bb26 Binary files /dev/null and b/.vs/embedded/v17/.suo differ diff --git a/.vs/slnx.sqlite b/.vs/slnx.sqlite new file mode 100644 index 0000000..2dba1a7 Binary files /dev/null and b/.vs/slnx.sqlite differ diff --git a/B-G474E-DPOW1_Keil/B-G474E-DPOW1_DCDC.uvguix.z b/B-G474E-DPOW1_Keil/B-G474E-DPOW1_DCDC.uvguix.z new file mode 100644 index 0000000..4a23880 --- /dev/null +++ b/B-G474E-DPOW1_Keil/B-G474E-DPOW1_DCDC.uvguix.z @@ -0,0 +1,3664 @@ + + + + -6.1 + +

### uVision Project, (C) Keil Software

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+ + + + 0 + 1920 + 1080 + + + + + + 1 + 0 + + 100 + 0 + + Core\Src\main.c + 17 + 1 + 37 + 1 + + 0 + + + Core\Inc\retarget.h + 0 + 1 + 1 + 1 + + 0 + + + Core\Src\retarget.c + 0 + 24 + 78 + 1 + + 0 + + + C:\Keil_v5\ARM\Packs\Keil\STM32G4xx_DFP\1.6.0\Drivers\CMSIS\Device\ST\STM32G4xx\Source\Templates\arm\startup_stm32g474xx.s + 21 + 182 + 200 + 1 + + 0 + + + Core\Src\board.c + 0 + 11 + 26 + 1 + + 0 + + + Core\Src\dcdc.c + 0 + 283 + 312 + 1 + + 0 + + + + + diff --git a/B-G474E-DPOW1_Keil/B-G474E-DPOW1_DCDC.uvoptx b/B-G474E-DPOW1_Keil/B-G474E-DPOW1_DCDC.uvoptx new file mode 100644 index 0000000..df7c6eb --- /dev/null +++ b/B-G474E-DPOW1_Keil/B-G474E-DPOW1_DCDC.uvoptx @@ -0,0 +1,325 @@ + + + + 1.0 + +

### uVision Project, (C) Keil Software

+ + + *.c + *.s*; *.src; *.a* + *.obj; *.o + *.lib + *.txt; *.h; *.inc; *.md + *.plm + *.cpp; *.cc; *.cxx + 0 + + + + 0 + 0 + + + + B-G474E-DPOW1_DCDC + 0x4 + ARM-ADS + + 8000000 + + 1 + 1 + 0 + 1 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + Listings\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 1 + 0 + 1 + + 18 + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 6 + + + + + + + + + + + STLink\ST-LINKIII-KEIL_SWO.dll + + + + 0 + ARMRTXEVENTFLAGS + -L70 -Z18 -C0 -M0 -T1 + + + 0 + DLGTARM + (1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0) + + + 0 + ARMDBGFLAGS + + + + 0 + ST-LINKIII-KEIL_SWO + -U001C00345553500D20393256 -O206 -SF10000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P1 -N00("ARM CoreSight SW-DP (ARM Core") -D00(2BA01477) -L00(0) -TO131090 -TC10000000 -TT10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC8000 -FN1 -FF0STM32G47x-8x_512.FLM -FS08000000 -FL080000 -FP0($$Device:STM32G474RETx$CMSIS\Flash\STM32G47x-8x_512.FLM) -WA0 -WE0 -WVCE4 -WS2710 -WM0 -WP2 -WK0-R0 + + + 0 + DLGUARM + (105=-1,-1,-1,-1,0) + + + 0 + UL2CM3 + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC8000 -FN1 -FF0STM32G47x-8x_512 -FS08000000 -FL080000 -FP0($$Device:STM32G474RETx$CMSIS\Flash\STM32G47x-8x_512.FLM)) + + + + + 0 + 0 + 12 + 1 +

+ 0 + 0 + 0 + 0 + 0 + 0 + Core\Src\board.c + + + + + 1 + 0 + 24 + 1 +

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### uVision Project, (C) Keil Software

+ + + + B-G474E-DPOW1_DCDC + 0x4 + ARM-ADS + 6220000::V6.22::ARMCLANG + 6220000::V6.22::ARMCLANG + 1 + + + STM32G474RETx + STMicroelectronics + Keil.STM32G4xx_DFP.1.6.0 + https://www.keil.com/pack/ + IRAM(0x20000000-0x2001FFFF) IROM(0x8000000-0x807FFFF) CLOCK(8000000) FPU2 CPUTYPE("Cortex-M4") TZ + + + + + + + + + + + + + + + $$Device:STM32G474RETx$CMSIS\SVD\STM32G474.svd + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + Objects\ + B-G474E-DPOW1_DCDC + 1 + 0 + 1 + 1 + 1 + Listings\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + 1 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + SARMCM3.DLL + -REMAP -MPU + DCM.DLL + -pCM4 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM4 + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 1 + 1 + 4096 + + 1 + BIN\UL2CM3.DLL + "" () + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M4" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 2 + 0 + 0 + 0 + 0 + 0 + 8 + 0 + 0 + 0 + 0 + 3 + 4 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x20000 + + + 1 + 0x8000000 + 0x80000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x8000000 + 0x80000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x20000 + + + 0 + 0x0 + 0x0 + + + + + + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 3 + 0 + 0 + 1 + 0 + 0 + 3 + 3 + 1 + 1 + 0 + 0 + 0 + + + STM32G474xx + + Core\Inc;C:\Keil_v5\ARM\Packs\Keil\STM32G4xx_DFP\1.6.0\Drivers\CMSIS\Device\ST\STM32G4xx\Include;C:\Keil_v5\ARM\Packs\ARM\CMSIS\6.1.0\CMSIS\Core\Include + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + + + + + + + + + 1 + 0 + 0 + 0 + 1 + 0 + + + + + + + + + + + + + + + Startup + + + startup_stm32g474xx.s + 2 + C:\Keil_v5\ARM\Packs\Keil\STM32G4xx_DFP\1.6.0\Drivers\CMSIS\Device\ST\STM32G4xx\Source\Templates\arm\startup_stm32g474xx.s + + + + + Application + + + main.c + 1 + Core\Src\main.c + + + board.c + 1 + Core\Src\board.c + + + dcdc.c + 1 + Core\Src\dcdc.c + + + retarget.c + 1 + Core\Src\retarget.c + + + system_stm32g4xx.c + 1 + Core\Src\system_stm32g4xx.c + + + + + + + + + + + + + + diff --git a/B-G474E-DPOW1_Keil/Core/Inc/app_config.h b/B-G474E-DPOW1_Keil/Core/Inc/app_config.h new file mode 100644 index 0000000..3e1143e --- /dev/null +++ b/B-G474E-DPOW1_Keil/Core/Inc/app_config.h @@ -0,0 +1,92 @@ +#ifndef APP_CONFIG_H +#define APP_CONFIG_H + +#include + +/* + * B-G474E-DPOW1 quick configuration. + * + * SAFETY: + * - The project configures the buck half-bridge on PB12/PB13. + * - Keep DCDC_POWER_STAGE_ENABLE at 0 until VIN, load and oscilloscope + * probes are ready. With 0 the firmware prints ADC values and prepares + * HRTIM, but does not enable HRTIM outputs. + * - If VIN comes from USB-C/USB-PD through JP1, set + * DCDC_CONNECT_USBPD_INPUT to 1 only after checking the board jumpers. + */ +#define DCDC_POWER_STAGE_ENABLE 0U +#define DCDC_CONNECT_USBPD_INPUT 0U + +/* + * Clock startup. + * 0 = safest rescue mode: run directly from HSI16, no PLL switch. + * 1 = normal performance mode: HSI16 -> PLL -> 170 MHz. + * + * If the debugger hangs inside SystemClock_Config(), keep this at 0 until + * the board is recovered and ST-LINK connects reliably. + */ +#define CLOCK_USE_PLL_170MHZ 1U + +#define SYSCLK_HZ 170000000UL +#define HSI16_HZ 16000000UL +#define USART3_BAUDRATE 115200UL +#define DEBUG_ATTACH_DELAY_LOOPS 8000000UL + +/* + * HRTIM Timer C drives the onboard buck leg: + * PB12 = BUCKBOOST_P1_DRIVE = HRTIM1_CHC1, high-side buck MOSFET + * PB13 = BUCKBOOST_N1_DRIVE = HRTIM1_CHC2, low-side buck MOSFET + * + * fHRCK = fHRTIM * 32. The firmware calculates the actual period from + * SystemCoreClock, so rescue HSI16 mode still works. + */ +#define DCDC_HRTIM_PERIOD_TICKS 27200U +#define DCDC_PWM_FREQUENCY_HZ 200000UL +#define DCDC_MIN_DUTY_TICKS 0U +#define DCDC_MAX_DUTY_TICKS 24000U +#define DCDC_START_DUTY_TICKS 400U + +/* + * Dead-time values are expressed in HRTIM dead-time ticks. + * They are intentionally conservative starter values; verify PB12/PB13 + * with an oscilloscope before enabling the power stage. + */ +#define DCDC_DEADTIME_RISING_TICKS 110U +#define DCDC_DEADTIME_FALLING_TICKS 350U + +/* + * ADC measurement pins on B-G474E-DPOW1: + * PA1 = BUCKBOOST_VIN (ADC1_IN2) + * PA2 = BUCKBOOST_I_IN_AVG (ADC1_IN3) + * PA3 = BUCKBOOST_VOUT (ADC1_IN4) + * + * ST X-CUBE-DPower reference values for this board use: + * Vout_Scaling = 0.198795180 -> ADC pin voltage = VOUT * 0.198795180 + * Iin_Scaling = 0.721543408 -> ADC pin voltage = IIN * 0.721543408 V/A + * + * VIN uses the same divider value by default here. If your hardware revision + * or solder bridge setup differs, adjust DCDC_VIN_SCALE_PPM after measuring. + */ +#define ADC_REFERENCE_MV 3300U +#define ADC_FULL_SCALE_COUNTS 4095U +#define DCDC_VOUT_SCALE_PPM 198795UL +#define DCDC_VIN_SCALE_PPM 198795UL +#define DCDC_IIN_UV_PER_MA 721UL + +/* Starter setpoints and protection thresholds. */ +#define DCDC_TARGET_VOUT_MV 3300U +#define DCDC_MIN_VIN_MV 4500U +#define DCDC_MAX_VOUT_MV 3800U +#define DCDC_MAX_INPUT_CURRENT_MA 300U +#define DCDC_HARD_INPUT_CURRENT_MA 450U + +/* + * Simple voltage loop gains for the starter firmware. + * Duty command = feed-forward + proportional + integral - current limiting. + * Tune these gently with a current-limited supply and a scope. + */ +#define DCDC_KP_TICKS_PER_100MV 90 +#define DCDC_KI_TICKS_PER_100MV 3 +#define DCDC_CURRENT_LIMIT_KP 60 + +#endif diff --git a/B-G474E-DPOW1_Keil/Core/Inc/board.h b/B-G474E-DPOW1_Keil/Core/Inc/board.h new file mode 100644 index 0000000..08c51cf --- /dev/null +++ b/B-G474E-DPOW1_Keil/Core/Inc/board.h @@ -0,0 +1,11 @@ +#ifndef BOARD_H +#define BOARD_H + +#include + +void Board_Init(void); +uint32_t Board_Millis(void); +void Board_DelayMs(uint32_t delay_ms); +void Board_FatalError(void); + +#endif diff --git a/B-G474E-DPOW1_Keil/Core/Inc/dcdc.h b/B-G474E-DPOW1_Keil/Core/Inc/dcdc.h new file mode 100644 index 0000000..69f9434 --- /dev/null +++ b/B-G474E-DPOW1_Keil/Core/Inc/dcdc.h @@ -0,0 +1,48 @@ +#ifndef DCDC_H +#define DCDC_H + +#include +#include + +typedef struct +{ + uint16_t vin_raw; + uint16_t iin_raw; + uint16_t vout_raw; + uint32_t vin_mv; + uint32_t iin_ma; + uint32_t vout_mv; +} DCDC_Measurements; + +typedef enum +{ + DCDC_STATE_STOPPED = 0, + DCDC_STATE_READY, + DCDC_STATE_RUNNING, + DCDC_STATE_FAULT +} DCDC_State; + +typedef enum +{ + DCDC_FAULT_NONE = 0, + DCDC_FAULT_UNDERVOLTAGE, + DCDC_FAULT_OVERVOLTAGE, + DCDC_FAULT_OVERCURRENT, + DCDC_FAULT_HRTIM +} DCDC_Fault; + +void DCDC_Init(void); +void DCDC_Start(void); +void DCDC_Stop(void); +void DCDC_ControlStep(void); +void DCDC_ReadMeasurements(DCDC_Measurements *out); + +DCDC_State DCDC_GetState(void); +DCDC_Fault DCDC_GetFault(void); +bool DCDC_IsHrtimReady(void); +uint32_t DCDC_GetDutyTicks(void); +uint32_t DCDC_GetPeriodTicks(void); +const char *DCDC_StateText(DCDC_State state); +const char *DCDC_FaultText(DCDC_Fault fault); + +#endif diff --git a/B-G474E-DPOW1_Keil/Core/Inc/retarget.h b/B-G474E-DPOW1_Keil/Core/Inc/retarget.h new file mode 100644 index 0000000..1722f94 --- /dev/null +++ b/B-G474E-DPOW1_Keil/Core/Inc/retarget.h @@ -0,0 +1,9 @@ +#ifndef RETARGET_H +#define RETARGET_H + +#include + +void Retarget_Init(uint32_t baudrate); +void Retarget_PutChar(char ch); + +#endif diff --git a/B-G474E-DPOW1_Keil/Core/Src/board.c b/B-G474E-DPOW1_Keil/Core/Src/board.c new file mode 100644 index 0000000..d79b399 --- /dev/null +++ b/B-G474E-DPOW1_Keil/Core/Src/board.c @@ -0,0 +1,189 @@ +#include "board.h" + +#include "app_config.h" +#include +#include "stm32g474xx.h" + +#define CLOCK_STARTUP_TIMEOUT 1000000UL + +static volatile uint32_t s_ms_ticks; + +static void SystemClock_Config(void); +static bool wait_mask_set(volatile uint32_t *reg, uint32_t mask); +static bool wait_mask_clear(volatile uint32_t *reg, uint32_t mask); +static bool wait_mask_value(volatile uint32_t *reg, uint32_t mask, uint32_t value); +static bool Flash_SetLatency(uint32_t latency); +static void Clock_UseHsi16(void); + +void Board_Init(void) +{ + SystemClock_Config(); + + if (SysTick_Config(SystemCoreClock / 1000U) != 0U) + { + Board_FatalError(); + } +} + +uint32_t Board_Millis(void) +{ + return s_ms_ticks; +} + +void Board_DelayMs(uint32_t delay_ms) +{ + uint32_t start = Board_Millis(); + while ((Board_Millis() - start) < delay_ms) + { + __NOP(); + } +} + +void Board_FatalError(void) +{ + __disable_irq(); + while (1) + { + __NOP(); + } +} + +void SysTick_Handler(void) +{ + s_ms_ticks++; +} + +static void SystemClock_Config(void) +{ + Clock_UseHsi16(); + +#if CLOCK_USE_PLL_170MHZ + /* Enable PWR and switch the STM32G474 regulator to Range 1 boost. */ + RCC->APB1ENR1 |= RCC_APB1ENR1_PWREN; + (void)RCC->APB1ENR1; + + PWR->CR1 = (PWR->CR1 & ~PWR_CR1_VOS) | PWR_CR1_VOS_0; + PWR->CR5 &= ~PWR_CR5_R1MODE; + if (!wait_mask_clear(&PWR->SR2, PWR_SR2_VOSF)) + { + Clock_UseHsi16(); + return; + } + + /* + * ST G474 power examples use FLASH_LATENCY_4 for 170 MHz. + * Set only the latency field first, then switch SYSCLK, then enable cache. + */ + if (!Flash_SetLatency(FLASH_ACR_LATENCY_4WS)) + { + Clock_UseHsi16(); + return; + } + + RCC->CR |= RCC_CR_HSION; + if (!wait_mask_set(&RCC->CR, RCC_CR_HSIRDY)) + { + Clock_UseHsi16(); + return; + } + + /* HSI16 / 4 * 85 / 2 = 170 MHz. */ + RCC->CR &= ~RCC_CR_PLLON; + if (!wait_mask_clear(&RCC->CR, RCC_CR_PLLRDY)) + { + Clock_UseHsi16(); + return; + } + + RCC->PLLCFGR = + RCC_PLLCFGR_PLLSRC_HSI | + (3UL << RCC_PLLCFGR_PLLM_Pos) | + (85UL << RCC_PLLCFGR_PLLN_Pos) | + RCC_PLLCFGR_PLLREN; + + RCC->CR |= RCC_CR_PLLON; + if (!wait_mask_set(&RCC->CR, RCC_CR_PLLRDY)) + { + Clock_UseHsi16(); + return; + } + + RCC->CFGR = + RCC_CFGR_HPRE_DIV1 | + RCC_CFGR_PPRE1_DIV1 | + RCC_CFGR_PPRE2_DIV1 | + RCC_CFGR_SW_PLL; + + if (!wait_mask_value(&RCC->CFGR, RCC_CFGR_SWS, RCC_CFGR_SWS_PLL)) + { + Clock_UseHsi16(); + return; + } + + FLASH->ACR |= FLASH_ACR_ICEN | FLASH_ACR_DCEN | FLASH_ACR_PRFTEN; + SystemCoreClockUpdate(); +#endif +} + +static bool wait_mask_set(volatile uint32_t *reg, uint32_t mask) +{ + uint32_t timeout = CLOCK_STARTUP_TIMEOUT; + while (((*reg & mask) != mask) && (timeout > 0U)) + { + timeout--; + } + + return timeout > 0U; +} + +static bool wait_mask_clear(volatile uint32_t *reg, uint32_t mask) +{ + uint32_t timeout = CLOCK_STARTUP_TIMEOUT; + while (((*reg & mask) != 0U) && (timeout > 0U)) + { + timeout--; + } + + return timeout > 0U; +} + +static bool wait_mask_value(volatile uint32_t *reg, uint32_t mask, uint32_t value) +{ + uint32_t timeout = CLOCK_STARTUP_TIMEOUT; + while (((*reg & mask) != value) && (timeout > 0U)) + { + timeout--; + } + + return timeout > 0U; +} + +static bool Flash_SetLatency(uint32_t latency) +{ + uint32_t timeout = CLOCK_STARTUP_TIMEOUT; + + FLASH->ACR = (FLASH->ACR & ~FLASH_ACR_LATENCY) | latency; + while (((FLASH->ACR & FLASH_ACR_LATENCY) != latency) && (timeout > 0U)) + { + timeout--; + } + + return timeout > 0U; +} + +static void Clock_UseHsi16(void) +{ + RCC->CR |= RCC_CR_HSION; + (void)wait_mask_set(&RCC->CR, RCC_CR_HSIRDY); + + (void)Flash_SetLatency(FLASH_ACR_LATENCY_0WS); + + RCC->CFGR = + RCC_CFGR_HPRE_DIV1 | + RCC_CFGR_PPRE1_DIV1 | + RCC_CFGR_PPRE2_DIV1 | + RCC_CFGR_SW_HSI; + + (void)wait_mask_value(&RCC->CFGR, RCC_CFGR_SWS, RCC_CFGR_SWS_HSI); + SystemCoreClockUpdate(); +} diff --git a/B-G474E-DPOW1_Keil/Core/Src/dcdc.c b/B-G474E-DPOW1_Keil/Core/Src/dcdc.c new file mode 100644 index 0000000..0b5afac --- /dev/null +++ b/B-G474E-DPOW1_Keil/Core/Src/dcdc.c @@ -0,0 +1,462 @@ +#include "dcdc.h" + +#include "app_config.h" +#include "board.h" +#include "stm32g474xx.h" + +#define HRTIM_TIMER_C_INDEX 2U +#define ADC_SAMPLE_TIME_47CYCLES 5U +#define HRTIM_DLL_READY_TIMEOUT 1000000UL + +static DCDC_State s_state = DCDC_STATE_STOPPED; +static DCDC_Fault s_fault = DCDC_FAULT_NONE; +static uint32_t s_duty_ticks = DCDC_START_DUTY_TICKS; +static uint32_t s_period_ticks = DCDC_HRTIM_PERIOD_TICKS; +static int32_t s_integrator_ticks; +static bool s_hrtim_ready; + +static void gpio_init_for_dcdc(void); +static void adc1_init(void); +static uint16_t adc1_read_channel(uint32_t channel); +static bool hrtim1_timer_c_init(void); +static bool hrtim1_wait_dll_ready(void); +static void hrtim1_outputs_enable(bool enable); +static void hrtim1_set_duty(uint32_t duty_ticks); +static uint32_t hrtim_period_from_clock(void); +static uint32_t hrtim_max_duty_ticks(void); +static uint32_t adc_raw_to_mv(uint16_t raw); +static uint32_t sense_mv_to_voltage_mv(uint32_t sense_mv, uint32_t scale_ppm); +static uint32_t sense_mv_to_current_ma(uint32_t sense_mv); +static void set_usbpd_input_switch(bool enable); +static void set_loads_off(void); +static void latch_fault(DCDC_Fault fault); + +void DCDC_Init(void) +{ + gpio_init_for_dcdc(); + set_usbpd_input_switch(false); + set_loads_off(); + + adc1_init(); + s_hrtim_ready = hrtim1_timer_c_init(); + if (s_hrtim_ready) + { + hrtim1_outputs_enable(false); + } + + s_state = DCDC_STATE_READY; + s_fault = DCDC_FAULT_NONE; +} + +void DCDC_Start(void) +{ + if (s_fault != DCDC_FAULT_NONE) + { + return; + } + + if (!s_hrtim_ready) + { + latch_fault(DCDC_FAULT_HRTIM); + return; + } + +#if DCDC_CONNECT_USBPD_INPUT + set_usbpd_input_switch(true); +#endif + + s_integrator_ticks = 0; + hrtim1_set_duty(DCDC_START_DUTY_TICKS); + HRTIM1->sMasterRegs.MCR |= HRTIM_MCR_TCCEN; + hrtim1_outputs_enable(true); + s_state = DCDC_STATE_RUNNING; +} + +void DCDC_Stop(void) +{ + hrtim1_outputs_enable(false); + hrtim1_set_duty(DCDC_MIN_DUTY_TICKS); + HRTIM1->sMasterRegs.MCR &= ~HRTIM_MCR_TCCEN; + set_usbpd_input_switch(false); + s_state = DCDC_STATE_STOPPED; +} + +void DCDC_ControlStep(void) +{ + DCDC_Measurements m; + int32_t error_mv; + int32_t feed_forward; + int32_t duty; + + DCDC_ReadMeasurements(&m); + + if (s_state != DCDC_STATE_RUNNING) + { + return; + } + + if (m.vin_mv < DCDC_MIN_VIN_MV) + { + latch_fault(DCDC_FAULT_UNDERVOLTAGE); + return; + } + + if (m.vout_mv > DCDC_MAX_VOUT_MV) + { + latch_fault(DCDC_FAULT_OVERVOLTAGE); + return; + } + + if (m.iin_ma > DCDC_HARD_INPUT_CURRENT_MA) + { + latch_fault(DCDC_FAULT_OVERCURRENT); + return; + } + + /* + * Starter buck controller: + * 1. feed-forward estimates duty from Vout/Vin, + * 2. PI term removes static voltage error, + * 3. current term pulls duty down before hard over-current trips. + * + * This is deliberately readable, not a final compensated SMPS loop. + */ + feed_forward = (int32_t)(((uint64_t)DCDC_TARGET_VOUT_MV * s_period_ticks) / m.vin_mv); + error_mv = (int32_t)DCDC_TARGET_VOUT_MV - (int32_t)m.vout_mv; + + s_integrator_ticks += (error_mv * DCDC_KI_TICKS_PER_100MV) / 100; + if (s_integrator_ticks > 3000) + { + s_integrator_ticks = 3000; + } + else if (s_integrator_ticks < -3000) + { + s_integrator_ticks = -3000; + } + + duty = feed_forward + + ((error_mv * DCDC_KP_TICKS_PER_100MV) / 100) + + s_integrator_ticks; + + if (m.iin_ma > DCDC_MAX_INPUT_CURRENT_MA) + { + duty -= (int32_t)((m.iin_ma - DCDC_MAX_INPUT_CURRENT_MA) * DCDC_CURRENT_LIMIT_KP); + } + + if (duty < (int32_t)DCDC_MIN_DUTY_TICKS) + { + duty = (int32_t)DCDC_MIN_DUTY_TICKS; + } + else if (duty > (int32_t)hrtim_max_duty_ticks()) + { + duty = (int32_t)hrtim_max_duty_ticks(); + } + + hrtim1_set_duty((uint32_t)duty); +} + +void DCDC_ReadMeasurements(DCDC_Measurements *out) +{ + uint32_t vin_sense_mv; + uint32_t iin_sense_mv; + uint32_t vout_sense_mv; + + out->vin_raw = adc1_read_channel(2U); + out->iin_raw = adc1_read_channel(3U); + out->vout_raw = adc1_read_channel(4U); + + vin_sense_mv = adc_raw_to_mv(out->vin_raw); + iin_sense_mv = adc_raw_to_mv(out->iin_raw); + vout_sense_mv = adc_raw_to_mv(out->vout_raw); + + out->vin_mv = sense_mv_to_voltage_mv(vin_sense_mv, DCDC_VIN_SCALE_PPM); + out->iin_ma = sense_mv_to_current_ma(iin_sense_mv); + out->vout_mv = sense_mv_to_voltage_mv(vout_sense_mv, DCDC_VOUT_SCALE_PPM); +} + +DCDC_State DCDC_GetState(void) +{ + return s_state; +} + +DCDC_Fault DCDC_GetFault(void) +{ + return s_fault; +} + +bool DCDC_IsHrtimReady(void) +{ + return s_hrtim_ready; +} + +uint32_t DCDC_GetDutyTicks(void) +{ + return s_duty_ticks; +} + +uint32_t DCDC_GetPeriodTicks(void) +{ + return s_period_ticks; +} + +const char *DCDC_StateText(DCDC_State state) +{ + switch (state) + { + case DCDC_STATE_STOPPED: return "stopped"; + case DCDC_STATE_READY: return "ready"; + case DCDC_STATE_RUNNING: return "running"; + case DCDC_STATE_FAULT: return "fault"; + default: return "unknown"; + } +} + +const char *DCDC_FaultText(DCDC_Fault fault) +{ + switch (fault) + { + case DCDC_FAULT_NONE: return "none"; + case DCDC_FAULT_UNDERVOLTAGE: return "vin undervoltage"; + case DCDC_FAULT_OVERVOLTAGE: return "vout overvoltage"; + case DCDC_FAULT_OVERCURRENT: return "input overcurrent"; + case DCDC_FAULT_HRTIM: return "hrtim dll timeout"; + default: return "unknown"; + } +} + +static void gpio_init_for_dcdc(void) +{ + RCC->AHB2ENR |= RCC_AHB2ENR_GPIOAEN | RCC_AHB2ENR_GPIOBEN | RCC_AHB2ENR_GPIOCEN; + (void)RCC->AHB2ENR; + + /* PA1/PA2/PA3 are analog feedback signals: VIN, input current, VOUT. */ + GPIOA->MODER |= (3UL << (1U * 2U)) | (3UL << (2U * 2U)) | (3UL << (3U * 2U)); + GPIOA->PUPDR &= ~((3UL << (1U * 2U)) | (3UL << (2U * 2U)) | (3UL << (3U * 2U))); + + /* PB12/PB13 are HRTIM1 Timer C outputs for the synchronous buck leg. */ + GPIOB->MODER &= ~((3UL << (12U * 2U)) | (3UL << (13U * 2U))); + GPIOB->MODER |= ((2UL << (12U * 2U)) | (2UL << (13U * 2U))); + GPIOB->OTYPER &= ~((1UL << 12U) | (1UL << 13U)); + GPIOB->OSPEEDR |= ((3UL << (12U * 2U)) | (3UL << (13U * 2U))); + GPIOB->PUPDR &= ~((3UL << (12U * 2U)) | (3UL << (13U * 2U))); + GPIOB->AFR[1] &= ~((0xFUL << ((12U - 8U) * 4U)) | (0xFUL << ((13U - 8U) * 4U))); + GPIOB->AFR[1] |= ((13UL << ((12U - 8U) * 4U)) | (13UL << ((13U - 8U) * 4U))); + + /* PC3 controls USBPD_VBUS to VIN switch. PC14/PC15 switch onboard loads. */ + GPIOC->MODER &= ~((3UL << (3U * 2U)) | (3UL << (14U * 2U)) | (3UL << (15U * 2U))); + GPIOC->MODER |= ((1UL << (3U * 2U)) | (1UL << (14U * 2U)) | (1UL << (15U * 2U))); + GPIOC->OTYPER &= ~((1UL << 3U) | (1UL << 14U) | (1UL << 15U)); + GPIOC->OSPEEDR |= ((2UL << (3U * 2U)) | (2UL << (14U * 2U)) | (2UL << (15U * 2U))); + GPIOC->PUPDR &= ~((3UL << (3U * 2U)) | (3UL << (14U * 2U)) | (3UL << (15U * 2U))); +} + +static void adc1_init(void) +{ + RCC->AHB2ENR |= RCC_AHB2ENR_ADC12EN; + (void)RCC->AHB2ENR; + + /* Synchronous ADC clock HCLK/4 = 42.5 MHz. */ + ADC12_COMMON->CCR = (ADC12_COMMON->CCR & ~ADC_CCR_CKMODE) | + (ADC_CCR_CKMODE_1 | ADC_CCR_CKMODE_0); + + ADC1->CR &= ~ADC_CR_DEEPPWD; + ADC1->CR |= ADC_CR_ADVREGEN; + Board_DelayMs(1U); + + ADC1->CR |= ADC_CR_ADCAL; + while ((ADC1->CR & ADC_CR_ADCAL) != 0U) + { + __NOP(); + } + + ADC1->CFGR = ADC_CFGR_OVRMOD; + ADC1->SMPR1 = + (ADC_SAMPLE_TIME_47CYCLES << ADC_SMPR1_SMP2_Pos) | + (ADC_SAMPLE_TIME_47CYCLES << ADC_SMPR1_SMP3_Pos) | + (ADC_SAMPLE_TIME_47CYCLES << ADC_SMPR1_SMP4_Pos); + + ADC1->ISR = ADC_ISR_ADRDY; + ADC1->CR |= ADC_CR_ADEN; + while ((ADC1->ISR & ADC_ISR_ADRDY) == 0U) + { + __NOP(); + } +} + +static uint16_t adc1_read_channel(uint32_t channel) +{ + ADC1->SQR1 = (channel << ADC_SQR1_SQ1_Pos); + ADC1->ISR = ADC_ISR_EOC | ADC_ISR_EOS; + ADC1->CR |= ADC_CR_ADSTART; + + while ((ADC1->ISR & ADC_ISR_EOC) == 0U) + { + __NOP(); + } + + return (uint16_t)(ADC1->DR & 0x0FFFU); +} + +static bool hrtim1_timer_c_init(void) +{ + HRTIM_Timerx_TypeDef *timer = &HRTIM1->sTimerxRegs[HRTIM_TIMER_C_INDEX]; + + RCC->APB2ENR |= RCC_APB2ENR_HRTIM1EN; + (void)RCC->APB2ENR; + + HRTIM1->sCommonRegs.ODISR = HRTIM_ODISR_TC1ODIS | HRTIM_ODISR_TC2ODIS; + s_period_ticks = hrtim_period_from_clock(); + + HRTIM1->sCommonRegs.ICR = HRTIM_ICR_DLLRDYC; + HRTIM1->sCommonRegs.DLLCR = HRTIM_DLLCR_CALEN | + HRTIM_DLLCR_CALRTE_1 | + HRTIM_DLLCR_CAL; + /* In rescue clock mode DLLRDY may never rise; keep diagnostics alive. */ + if (!hrtim1_wait_dll_ready()) + { + HRTIM1->sCommonRegs.ODISR = HRTIM_ODISR_TC1ODIS | HRTIM_ODISR_TC2ODIS; + HRTIM1->sMasterRegs.MCR &= ~HRTIM_MCR_TCCEN; + return false; + } + + timer->TIMxCR = HRTIM_TIMCR_CONT; + timer->PERxR = s_period_ticks; + timer->REPxR = 0U; + timer->CMP1xR = DCDC_MIN_DUTY_TICKS; + timer->CMP2xR = hrtim_max_duty_ticks(); + timer->CMP3xR = 1000U; + + timer->DTxR = + ((DCDC_DEADTIME_RISING_TICKS & 0x1FFUL) << HRTIM_DTR_DTR_Pos) | + ((DCDC_DEADTIME_FALLING_TICKS & 0x1FFUL) << HRTIM_DTR_DTF_Pos) | + (HRTIM_DTR_DTPRSC_1 | HRTIM_DTR_DTPRSC_0); + + /* + * Complementary buck PWM: + * CHC1 goes active at period event and inactive at CMP1. + * CHC2 goes active at CMP1 and inactive at period event. + * HRTIM dead-time block delays transitions to avoid shoot-through. + */ + timer->SETx1R = HRTIM_SET1R_PER; + timer->RSTx1R = HRTIM_RST1R_CMP1; + timer->SETx2R = HRTIM_SET2R_CMP1; + timer->RSTx2R = HRTIM_RST2R_PER; + timer->OUTxR = HRTIM_OUTR_DTEN | HRTIM_OUTR_FAULT1_1 | HRTIM_OUTR_FAULT2_1; + + /* Trigger point for future synchronized ADC sampling. */ + HRTIM1->sCommonRegs.ADC1R = HRTIM_ADC1R_AD1TCC3; + + HRTIM1->sMasterRegs.MCR &= ~HRTIM_MCR_TCCEN; + return true; +} + +static bool hrtim1_wait_dll_ready(void) +{ + uint32_t timeout = HRTIM_DLL_READY_TIMEOUT; + + while (((HRTIM1->sCommonRegs.ISR & HRTIM_ISR_DLLRDY) == 0U) && (timeout > 0U)) + { + timeout--; + } + + return timeout > 0U; +} + +static void hrtim1_outputs_enable(bool enable) +{ + if (enable) + { + HRTIM1->sCommonRegs.OENR = HRTIM_OENR_TC1OEN | HRTIM_OENR_TC2OEN; + } + else + { + HRTIM1->sCommonRegs.ODISR = HRTIM_ODISR_TC1ODIS | HRTIM_ODISR_TC2ODIS; + } +} + +static void hrtim1_set_duty(uint32_t duty_ticks) +{ + if (duty_ticks < DCDC_MIN_DUTY_TICKS) + { + duty_ticks = DCDC_MIN_DUTY_TICKS; + } + else if (duty_ticks > hrtim_max_duty_ticks()) + { + duty_ticks = hrtim_max_duty_ticks(); + } + + HRTIM1->sTimerxRegs[HRTIM_TIMER_C_INDEX].CMP1xR = duty_ticks; + s_duty_ticks = duty_ticks; +} + +static uint32_t hrtim_period_from_clock(void) +{ + uint64_t ticks = (((uint64_t)SystemCoreClock * 32ULL) + (DCDC_PWM_FREQUENCY_HZ / 2ULL)) / + DCDC_PWM_FREQUENCY_HZ; + + if (ticks < 100ULL) + { + ticks = 100ULL; + } + else if (ticks > 0xFFFFULL) + { + ticks = 0xFFFFULL; + } + + return (uint32_t)ticks; +} + +static uint32_t hrtim_max_duty_ticks(void) +{ + uint32_t max_ticks = DCDC_MAX_DUTY_TICKS; + + if (s_period_ticks > 10U && max_ticks >= (s_period_ticks - 1U)) + { + max_ticks = s_period_ticks - 1U; + } + + return max_ticks; +} + +static uint32_t adc_raw_to_mv(uint16_t raw) +{ + return ((uint32_t)raw * ADC_REFERENCE_MV) / ADC_FULL_SCALE_COUNTS; +} + +static uint32_t sense_mv_to_voltage_mv(uint32_t sense_mv, uint32_t scale_ppm) +{ + return (uint32_t)(((uint64_t)sense_mv * 1000000ULL) / scale_ppm); +} + +static uint32_t sense_mv_to_current_ma(uint32_t sense_mv) +{ + return (sense_mv * 1000UL) / DCDC_IIN_UV_PER_MA; +} + +static void set_usbpd_input_switch(bool enable) +{ + if (enable) + { + GPIOC->BSRR = (1UL << 3U); + } + else + { + GPIOC->BRR = (1UL << 3U); + } +} + +static void set_loads_off(void) +{ + GPIOC->BRR = (1UL << 14U) | (1UL << 15U); +} + +static void latch_fault(DCDC_Fault fault) +{ + hrtim1_outputs_enable(false); + hrtim1_set_duty(DCDC_MIN_DUTY_TICKS); + HRTIM1->sMasterRegs.MCR &= ~HRTIM_MCR_TCCEN; + set_usbpd_input_switch(false); + + s_fault = fault; + s_state = DCDC_STATE_FAULT; +} diff --git a/B-G474E-DPOW1_Keil/Core/Src/main.c b/B-G474E-DPOW1_Keil/Core/Src/main.c new file mode 100644 index 0000000..d6dd632 --- /dev/null +++ b/B-G474E-DPOW1_Keil/Core/Src/main.c @@ -0,0 +1,70 @@ +#include + +#include "app_config.h" +#include "board.h" +#include "dcdc.h" +#include "retarget.h" +#include "stm32g474xx.h" + +int main(void) +{ + uint32_t last_control_ms = 0U; + uint32_t last_print_ms = 0U; + volatile uint32_t debug_attach_delay; + + /* + * Short rescue window after reset. It lets ST-LINK attach before the + * firmware reconfigures clocks and power peripherals. + */ + for (debug_attach_delay = 0U; debug_attach_delay < DEBUG_ATTACH_DELAY_LOOPS; debug_attach_delay++) + { + __NOP(); + } + + Board_Init(); + Retarget_Init(USART3_BAUDRATE); + DCDC_Init(); + + printf("\nB-G474E-DPOW1 DCDC starter project\n"); + printf("USART3 retarget printf: %lu baud\n", (unsigned long)USART3_BAUDRATE); + printf("SystemCoreClock: %lu Hz\n", (unsigned long)SystemCoreClock); + printf("PWM: %lu Hz, period=%lu HRTIM ticks\n", + (unsigned long)DCDC_PWM_FREQUENCY_HZ, + (unsigned long)DCDC_GetPeriodTicks()); + printf("HRTIM DLL: %s\n", DCDC_IsHrtimReady() ? "ready" : "not ready"); + +#if DCDC_POWER_STAGE_ENABLE + printf("Power stage: ENABLED. Check VIN/current limit before flashing.\n"); + DCDC_Start(); +#else + printf("Power stage: disabled in app_config.h; ADC monitor only.\n"); +#endif + + while (1) + { + uint32_t now = Board_Millis(); + + if ((now - last_control_ms) >= 1U) + { + last_control_ms = now; + DCDC_ControlStep(); + } + + if ((now - last_print_ms) >= 500U) + { + DCDC_Measurements m; + last_print_ms = now; + DCDC_ReadMeasurements(&m); + + printf("state=%s fault=%s hrtim=%s vin=%lumV iin=%lumA vout=%lumV duty=%lu/%lu\n", + DCDC_StateText(DCDC_GetState()), + DCDC_FaultText(DCDC_GetFault()), + DCDC_IsHrtimReady() ? "ready" : "not-ready", + (unsigned long)m.vin_mv, + (unsigned long)m.iin_ma, + (unsigned long)m.vout_mv, + (unsigned long)DCDC_GetDutyTicks(), + (unsigned long)DCDC_GetPeriodTicks()); + } + } +} diff --git a/B-G474E-DPOW1_Keil/Core/Src/retarget.c b/B-G474E-DPOW1_Keil/Core/Src/retarget.c new file mode 100644 index 0000000..5463ecd --- /dev/null +++ b/B-G474E-DPOW1_Keil/Core/Src/retarget.c @@ -0,0 +1,101 @@ +#include "retarget.h" + +#include + +#include "app_config.h" +#include "stm32g474xx.h" + +#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 6000000) +#pragma import(__use_no_semihosting) + +struct __FILE +{ + int handle; +}; +#elif defined(__ARMCC_VERSION) +__asm(".global __use_no_semihosting\n"); +#endif + +FILE __stdout; +FILE __stdin; + +static void gpio_pc10_pc11_to_usart3(void) +{ + RCC->AHB2ENR |= RCC_AHB2ENR_GPIOCEN; + (void)RCC->AHB2ENR; + + /* PC10 = USART3_TX, PC11 = USART3_RX, AF7: ST-LINK VCP on CN3. */ + GPIOC->MODER &= ~((3UL << (10U * 2U)) | (3UL << (11U * 2U))); + GPIOC->MODER |= ((2UL << (10U * 2U)) | (2UL << (11U * 2U))); + + GPIOC->OTYPER &= ~((1UL << 10U) | (1UL << 11U)); + GPIOC->OSPEEDR |= ((3UL << (10U * 2U)) | (3UL << (11U * 2U))); + GPIOC->PUPDR &= ~((3UL << (10U * 2U)) | (3UL << (11U * 2U))); + + GPIOC->AFR[1] &= ~((0xFUL << ((10U - 8U) * 4U)) | (0xFUL << ((11U - 8U) * 4U))); + GPIOC->AFR[1] |= ((7UL << ((10U - 8U) * 4U)) | (7UL << ((11U - 8U) * 4U))); +} + +void Retarget_Init(uint32_t baudrate) +{ + gpio_pc10_pc11_to_usart3(); + + RCC->APB1ENR1 |= RCC_APB1ENR1_USART3EN; + (void)RCC->APB1ENR1; + + USART3->CR1 = 0U; + USART3->CR2 = 0U; + USART3->CR3 = 0U; + + /* APB1 is not prescaled; use the clock that really started. */ + USART3->BRR = (SystemCoreClock + (baudrate / 2U)) / baudrate; + USART3->CR1 = USART_CR1_TE | USART_CR1_RE | USART_CR1_UE; +} + +void Retarget_PutChar(char ch) +{ + while ((USART3->ISR & USART_ISR_TXE_TXFNF) == 0U) + { + __NOP(); + } + USART3->TDR = (uint8_t)ch; +} + +int fputc(int ch, FILE *f) +{ + (void)f; + + if (ch == '\n') + { + Retarget_PutChar('\r'); + } + + Retarget_PutChar((char)ch); + return ch; +} + +int fgetc(FILE *f) +{ + (void)f; + + while ((USART3->ISR & USART_ISR_RXNE_RXFNE) == 0U) + { + __NOP(); + } + + return (int)(USART3->RDR & 0xFFU); +} + +void _ttywrch(int ch) +{ + Retarget_PutChar((char)ch); +} + +void _sys_exit(int return_code) +{ + (void)return_code; + while (1) + { + __NOP(); + } +} diff --git a/B-G474E-DPOW1_Keil/Core/Src/system_stm32g4xx.c b/B-G474E-DPOW1_Keil/Core/Src/system_stm32g4xx.c new file mode 100644 index 0000000..5a59633 --- /dev/null +++ b/B-G474E-DPOW1_Keil/Core/Src/system_stm32g4xx.c @@ -0,0 +1,56 @@ +#include "stm32g474xx.h" +#include "app_config.h" + +uint32_t SystemCoreClock = 16000000UL; + +const uint8_t AHBPrescTable[16] = +{ + 0, 0, 0, 0, 0, 0, 0, 0, + 1, 2, 3, 4, 6, 7, 8, 9 +}; + +const uint8_t APBPrescTable[8] = +{ + 0, 0, 0, 0, 1, 2, 3, 4 +}; + +void SystemInit(void) +{ + /* Enable FPU access before C runtime starts. */ + SCB->CPACR |= (0xFU << 20); + +#if defined(VECT_TAB_SRAM) + SCB->VTOR = SRAM_BASE; +#else + SCB->VTOR = FLASH_BASE; +#endif +} + +void SystemCoreClockUpdate(void) +{ + uint32_t sysclk = 16000000UL; + uint32_t sws = RCC->CFGR & RCC_CFGR_SWS; + + if (sws == RCC_CFGR_SWS_PLL) + { + uint32_t pllsrc_hz = 16000000UL; + uint32_t pllcfgr = RCC->PLLCFGR; + uint32_t pllm = ((pllcfgr & RCC_PLLCFGR_PLLM) >> RCC_PLLCFGR_PLLM_Pos) + 1U; + uint32_t plln = ((pllcfgr & RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos); + uint32_t pllr_bits = ((pllcfgr & RCC_PLLCFGR_PLLR) >> RCC_PLLCFGR_PLLR_Pos); + uint32_t pllr = (pllr_bits + 1U) * 2U; + + if ((pllcfgr & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSE) + { + pllsrc_hz = 8000000UL; + } + + sysclk = (pllsrc_hz / pllm) * plln / pllr; + } + else if (sws == RCC_CFGR_SWS_HSE) + { + sysclk = 8000000UL; + } + + SystemCoreClock = sysclk >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE) >> RCC_CFGR_HPRE_Pos]; +} diff --git a/B-G474E-DPOW1_Keil/DebugConfig/B-G474E-DPOW1_DCDC_STM32G474RETx.dbgconf b/B-G474E-DPOW1_Keil/DebugConfig/B-G474E-DPOW1_DCDC_STM32G474RETx.dbgconf new file mode 100644 index 0000000..08d5314 --- /dev/null +++ b/B-G474E-DPOW1_Keil/DebugConfig/B-G474E-DPOW1_DCDC_STM32G474RETx.dbgconf @@ -0,0 +1,64 @@ +// File: STM32G4xx.dbgconf +// Version: 1.0.1 +// Note: refer to STM32G4xx Reference manual (RM0440) +// refer to STM32G4xx datasheets + +// <<< Use Configuration Wizard in Context Menu >>> + +// Debug MCU configuration register (DBGMCU_CR) +// DBG_STANDBY Debug Standby mode +// DBG_STOP Debug Stop mode +// DBG_SLEEP Debug Sleep mode +// +DbgMCU_CR = 0x00000007; + +// Debug MCU APB1 freeze register1 (DBGMCU_APB1FZR1) +// Reserved bits must be kept at reset value +// DBG_LPTIM1_STOP LPTIM1 counter stopped when core is halted +// DBG_I2C3_STOP I2C3 SMBUS timeout counter stopped when core is halted +// DBG_I2C2_STOP I2C2 SMBUS timeout counter stopped when core is halted +// DBG_I2C1_STOP I2C1 SMBUS timeout counter stopped when core is halted +// DBG_IWDG_STOP Independent watchdog counter stopped when core is halted +// DBG_WWDG_STOP Window watchdog counter stopped when core is halted +// DBG_RTC_STOP RTC counter stopped when core is halted +// DBG_TIM7_STOP TIM7 counter stopped when core is halted +// DBG_TIM6_STOP TIM6 counter stopped when core is halted +// DBG_TIM5_STOP TIM5 counter stopped when core is halted +// DBG_TIM4_STOP TIM4 counter stopped when core is halted +// DBG_TIM3_STOP TIM3 counter stopped when core is halted +// DBG_TIM2_STOP TIM2 counter stopped when core is halted +// +DbgMCU_APB1_Fz1 = 0x00000000; + +// Debug MCU APB1 freeze register 2 (DBGMCU_APB1FZR2) +// Reserved bits must be kept at reset value +// DBG_I2C4_STOP I2C4 SMBUS timeout counter stopped when core is halted +// +DbgMCU_APB1_Fz2 = 0x00000000; + +// Debug MCU APB2 freeze register (DBGMCU_APB2FZR) +// Reserved bits must be kept at reset value +// DBG_HRTIM_STOP HRTIM counter stopped when core is halted +// DBG_TIM20_STOP TIM20 counter stopped when core is halted +// DBG_TIM17_STOP TIM17 counter stopped when core is halted +// DBG_TIM16_STOP TIM16 counter stopped when core is halted +// DBG_TIM15_STOP TIM15 counter stopped when core is halted +// DBG_TIM8_STOP TIM8 counter stopped when core is halted +// DBG_TIM1_STOP TIM1 counter stopped when core is halted +// +DbgMCU_APB2_Fz = 0x00000000; + +// TPIU Pin Routing +// TRACECLK: Pin PE2 +// TRACED[0]: Pin PE3 +// TRACED[1]: Pin PE4 +// TRACED[2]: Pin PE5 +// TRACED[3]: Pin PE6 +// + +// Flash Download Options +// Option Byte Loading Launch the Option Byte Loading after a Flash Download by setting the OBL_LAUNCH bit (causes a reset) +// +DoOptionByteLoading = 0x00000000; + +// <<< end of configuration section >>> diff --git a/B-G474E-DPOW1_Keil/EventRecorderStub.scvd b/B-G474E-DPOW1_Keil/EventRecorderStub.scvd new file mode 100644 index 0000000..2956b29 --- /dev/null +++ b/B-G474E-DPOW1_Keil/EventRecorderStub.scvd @@ -0,0 +1,9 @@ + + + + + + + + + diff --git a/B-G474E-DPOW1_Keil/Listings/B-G474E-DPOW1_DCDC.map b/B-G474E-DPOW1_Keil/Listings/B-G474E-DPOW1_DCDC.map new file mode 100644 index 0000000..4183a9f --- /dev/null +++ b/B-G474E-DPOW1_Keil/Listings/B-G474E-DPOW1_DCDC.map @@ -0,0 +1,1706 @@ +Component: Arm Compiler for Embedded 6.22 Tool: armlink [5ee90200] + +============================================================================== + +Section Cross References + + startup_stm32g474xx.o(STACK) refers (Special) to heapauxi.o(.text) for __use_two_region_memory + startup_stm32g474xx.o(HEAP) refers (Special) to heapauxi.o(.text) for __use_two_region_memory + startup_stm32g474xx.o(RESET) refers (Special) to heapauxi.o(.text) for __use_two_region_memory + startup_stm32g474xx.o(RESET) refers to startup_stm32g474xx.o(STACK) for __initial_sp + startup_stm32g474xx.o(RESET) refers to startup_stm32g474xx.o(.text) for Reset_Handler + startup_stm32g474xx.o(RESET) refers to board.o(.text.SysTick_Handler) for SysTick_Handler + startup_stm32g474xx.o(.text) refers (Special) to heapauxi.o(.text) for __use_two_region_memory + startup_stm32g474xx.o(.text) refers to system_stm32g4xx.o(.text.SystemInit) for SystemInit + startup_stm32g474xx.o(.text) refers to __main.o(!!!main) for __main + startup_stm32g474xx.o(.text) refers to startup_stm32g474xx.o(HEAP) for Heap_Mem + startup_stm32g474xx.o(.text) refers to startup_stm32g474xx.o(STACK) for Stack_Mem + main.o(.text.main) refers to board.o(.text.Board_Init) for Board_Init + main.o(.text.main) refers to retarget.o(.text.Retarget_Init) for Retarget_Init + main.o(.text.main) refers to dcdc.o(.text.DCDC_Init) for DCDC_Init + main.o(.text.main) refers to main.o(.rodata.str1.1) for .L.str + main.o(.text.main) refers to printf.o(.text) for printf + main.o(.text.main) refers to system_stm32g4xx.o(.data.SystemCoreClock) for SystemCoreClock + main.o(.text.main) refers to dcdc.o(.text.DCDC_GetPeriodTicks) for DCDC_GetPeriodTicks + main.o(.text.main) refers to dcdc.o(.text.DCDC_IsHrtimReady) for DCDC_IsHrtimReady + main.o(.text.main) refers to board.o(.text.Board_Millis) for Board_Millis + main.o(.text.main) refers to dcdc.o(.text.DCDC_ControlStep) for DCDC_ControlStep + main.o(.text.main) refers to dcdc.o(.text.DCDC_ReadMeasurements) for DCDC_ReadMeasurements + main.o(.text.main) refers to dcdc.o(.text.DCDC_GetState) for DCDC_GetState + main.o(.text.main) refers to dcdc.o(.text.DCDC_StateText) for DCDC_StateText + main.o(.text.main) refers to dcdc.o(.text.DCDC_GetFault) for DCDC_GetFault + main.o(.text.main) refers to dcdc.o(.text.DCDC_FaultText) for DCDC_FaultText + main.o(.text.main) refers to dcdc.o(.text.DCDC_GetDutyTicks) for DCDC_GetDutyTicks + main.o(.ARM.exidx.text.main) refers to main.o(.text.main) for [Anonymous Symbol] + board.o(.text.Board_Init) refers to board.o(.text.SystemClock_Config) for SystemClock_Config + board.o(.text.Board_Init) refers to system_stm32g4xx.o(.data.SystemCoreClock) for SystemCoreClock + board.o(.text.Board_Init) refers to board.o(.text.SysTick_Config) for SysTick_Config + board.o(.text.Board_Init) refers to board.o(.text.Board_FatalError) for Board_FatalError + board.o(.ARM.exidx.text.Board_Init) refers to board.o(.text.Board_Init) for [Anonymous Symbol] + board.o(.text.SystemClock_Config) refers to board.o(.text.Clock_UseHsi16) for Clock_UseHsi16 + board.o(.text.SystemClock_Config) refers to board.o(.text.wait_mask_clear) for wait_mask_clear + board.o(.text.SystemClock_Config) refers to board.o(.text.Flash_SetLatency) for Flash_SetLatency + board.o(.text.SystemClock_Config) refers to board.o(.text.wait_mask_set) for wait_mask_set + board.o(.text.SystemClock_Config) refers to board.o(.text.wait_mask_value) for wait_mask_value + board.o(.text.SystemClock_Config) refers to system_stm32g4xx.o(.text.SystemCoreClockUpdate) for SystemCoreClockUpdate + board.o(.ARM.exidx.text.SystemClock_Config) refers to board.o(.text.SystemClock_Config) for [Anonymous Symbol] + board.o(.text.SysTick_Config) refers to board.o(.text.__NVIC_SetPriority) for __NVIC_SetPriority + board.o(.ARM.exidx.text.SysTick_Config) refers to board.o(.text.SysTick_Config) for [Anonymous Symbol] + board.o(.ARM.exidx.text.Board_FatalError) refers to board.o(.text.Board_FatalError) for [Anonymous Symbol] + board.o(.text.Board_Millis) refers to board.o(.bss.s_ms_ticks) for s_ms_ticks + board.o(.ARM.exidx.text.Board_Millis) refers to board.o(.text.Board_Millis) for [Anonymous Symbol] + board.o(.text.Board_DelayMs) refers to board.o(.text.Board_Millis) for Board_Millis + board.o(.ARM.exidx.text.Board_DelayMs) refers to board.o(.text.Board_DelayMs) for [Anonymous Symbol] + board.o(.text.SysTick_Handler) refers to board.o(.bss.s_ms_ticks) for s_ms_ticks + board.o(.ARM.exidx.text.SysTick_Handler) refers to board.o(.text.SysTick_Handler) for [Anonymous Symbol] + board.o(.ARM.exidx.text.__NVIC_SetPriority) refers to board.o(.text.__NVIC_SetPriority) for [Anonymous Symbol] + board.o(.text.Clock_UseHsi16) refers to board.o(.text.wait_mask_set) for wait_mask_set + board.o(.text.Clock_UseHsi16) refers to board.o(.text.Flash_SetLatency) for Flash_SetLatency + board.o(.text.Clock_UseHsi16) refers to board.o(.text.wait_mask_value) for wait_mask_value + board.o(.text.Clock_UseHsi16) refers to system_stm32g4xx.o(.text.SystemCoreClockUpdate) for SystemCoreClockUpdate + board.o(.ARM.exidx.text.Clock_UseHsi16) refers to board.o(.text.Clock_UseHsi16) for [Anonymous Symbol] + board.o(.ARM.exidx.text.wait_mask_clear) refers to board.o(.text.wait_mask_clear) for [Anonymous Symbol] + board.o(.ARM.exidx.text.Flash_SetLatency) refers to board.o(.text.Flash_SetLatency) for [Anonymous Symbol] + board.o(.ARM.exidx.text.wait_mask_set) refers to board.o(.text.wait_mask_set) for [Anonymous Symbol] + board.o(.ARM.exidx.text.wait_mask_value) refers to board.o(.text.wait_mask_value) for [Anonymous Symbol] + dcdc.o(.text.DCDC_Init) refers to dcdc.o(.text.gpio_init_for_dcdc) for gpio_init_for_dcdc + dcdc.o(.text.DCDC_Init) refers to dcdc.o(.text.set_usbpd_input_switch) for set_usbpd_input_switch + dcdc.o(.text.DCDC_Init) refers to dcdc.o(.text.set_loads_off) for set_loads_off + dcdc.o(.text.DCDC_Init) refers to dcdc.o(.text.adc1_init) for adc1_init + dcdc.o(.text.DCDC_Init) refers to dcdc.o(.text.hrtim1_timer_c_init) for hrtim1_timer_c_init + dcdc.o(.text.DCDC_Init) refers to dcdc.o(.bss.s_hrtim_ready) for s_hrtim_ready + dcdc.o(.text.DCDC_Init) refers to dcdc.o(.text.hrtim1_outputs_enable) for hrtim1_outputs_enable + dcdc.o(.text.DCDC_Init) refers to dcdc.o(.bss.s_state) for s_state + dcdc.o(.text.DCDC_Init) refers to dcdc.o(.bss.s_fault) for s_fault + dcdc.o(.ARM.exidx.text.DCDC_Init) refers to dcdc.o(.text.DCDC_Init) for [Anonymous Symbol] + dcdc.o(.ARM.exidx.text.gpio_init_for_dcdc) refers to dcdc.o(.text.gpio_init_for_dcdc) for [Anonymous Symbol] + dcdc.o(.ARM.exidx.text.set_usbpd_input_switch) refers to dcdc.o(.text.set_usbpd_input_switch) for [Anonymous Symbol] + dcdc.o(.ARM.exidx.text.set_loads_off) refers to dcdc.o(.text.set_loads_off) for [Anonymous Symbol] + dcdc.o(.text.adc1_init) refers to board.o(.text.Board_DelayMs) for Board_DelayMs + dcdc.o(.ARM.exidx.text.adc1_init) refers to dcdc.o(.text.adc1_init) for [Anonymous Symbol] + dcdc.o(.text.hrtim1_timer_c_init) refers to dcdc.o(.text.hrtim_period_from_clock) for hrtim_period_from_clock + dcdc.o(.text.hrtim1_timer_c_init) refers to dcdc.o(.data.s_period_ticks) for s_period_ticks + dcdc.o(.text.hrtim1_timer_c_init) refers to dcdc.o(.text.hrtim1_wait_dll_ready) for hrtim1_wait_dll_ready + dcdc.o(.text.hrtim1_timer_c_init) refers to dcdc.o(.text.hrtim_max_duty_ticks) for hrtim_max_duty_ticks + dcdc.o(.ARM.exidx.text.hrtim1_timer_c_init) refers to dcdc.o(.text.hrtim1_timer_c_init) for [Anonymous Symbol] + dcdc.o(.ARM.exidx.text.hrtim1_outputs_enable) refers to dcdc.o(.text.hrtim1_outputs_enable) for [Anonymous Symbol] + dcdc.o(.text.DCDC_Start) refers to dcdc.o(.bss.s_fault) for s_fault + dcdc.o(.text.DCDC_Start) refers to dcdc.o(.bss.s_hrtim_ready) for s_hrtim_ready + dcdc.o(.text.DCDC_Start) refers to dcdc.o(.text.latch_fault) for latch_fault + dcdc.o(.text.DCDC_Start) refers to dcdc.o(.bss.s_integrator_ticks) for s_integrator_ticks + dcdc.o(.text.DCDC_Start) refers to dcdc.o(.text.hrtim1_set_duty) for hrtim1_set_duty + dcdc.o(.text.DCDC_Start) refers to dcdc.o(.text.hrtim1_outputs_enable) for hrtim1_outputs_enable + dcdc.o(.text.DCDC_Start) refers to dcdc.o(.bss.s_state) for s_state + dcdc.o(.ARM.exidx.text.DCDC_Start) refers to dcdc.o(.text.DCDC_Start) for [Anonymous Symbol] + dcdc.o(.text.latch_fault) refers to dcdc.o(.text.hrtim1_outputs_enable) for hrtim1_outputs_enable + dcdc.o(.text.latch_fault) refers to dcdc.o(.text.hrtim1_set_duty) for hrtim1_set_duty + dcdc.o(.text.latch_fault) refers to dcdc.o(.text.set_usbpd_input_switch) for set_usbpd_input_switch + dcdc.o(.text.latch_fault) refers to dcdc.o(.bss.s_fault) for s_fault + dcdc.o(.text.latch_fault) refers to dcdc.o(.bss.s_state) for s_state + dcdc.o(.ARM.exidx.text.latch_fault) refers to dcdc.o(.text.latch_fault) for [Anonymous Symbol] + dcdc.o(.text.hrtim1_set_duty) refers to dcdc.o(.text.hrtim_max_duty_ticks) for hrtim_max_duty_ticks + dcdc.o(.text.hrtim1_set_duty) refers to dcdc.o(.data.s_duty_ticks) for s_duty_ticks + dcdc.o(.ARM.exidx.text.hrtim1_set_duty) refers to dcdc.o(.text.hrtim1_set_duty) for [Anonymous Symbol] + dcdc.o(.text.DCDC_Stop) refers to dcdc.o(.text.hrtim1_outputs_enable) for hrtim1_outputs_enable + dcdc.o(.text.DCDC_Stop) refers to dcdc.o(.text.hrtim1_set_duty) for hrtim1_set_duty + dcdc.o(.text.DCDC_Stop) refers to dcdc.o(.text.set_usbpd_input_switch) for set_usbpd_input_switch + dcdc.o(.text.DCDC_Stop) refers to dcdc.o(.bss.s_state) for s_state + dcdc.o(.ARM.exidx.text.DCDC_Stop) refers to dcdc.o(.text.DCDC_Stop) for [Anonymous Symbol] + dcdc.o(.text.DCDC_ControlStep) refers to dcdc.o(.text.DCDC_ReadMeasurements) for DCDC_ReadMeasurements + dcdc.o(.text.DCDC_ControlStep) refers to dcdc.o(.bss.s_state) for s_state + dcdc.o(.text.DCDC_ControlStep) refers to dcdc.o(.text.latch_fault) for latch_fault + dcdc.o(.text.DCDC_ControlStep) refers to dcdc.o(.data.s_period_ticks) for s_period_ticks + dcdc.o(.text.DCDC_ControlStep) refers to lludivv7m.o(.text) for __aeabi_uldivmod + dcdc.o(.text.DCDC_ControlStep) refers to dcdc.o(.bss.s_integrator_ticks) for s_integrator_ticks + dcdc.o(.text.DCDC_ControlStep) refers to dcdc.o(.text.hrtim_max_duty_ticks) for hrtim_max_duty_ticks + dcdc.o(.text.DCDC_ControlStep) refers to dcdc.o(.text.hrtim1_set_duty) for hrtim1_set_duty + dcdc.o(.ARM.exidx.text.DCDC_ControlStep) refers to dcdc.o(.text.DCDC_ControlStep) for [Anonymous Symbol] + dcdc.o(.text.DCDC_ReadMeasurements) refers to dcdc.o(.text.adc1_read_channel) for adc1_read_channel + dcdc.o(.text.DCDC_ReadMeasurements) refers to dcdc.o(.text.adc_raw_to_mv) for adc_raw_to_mv + dcdc.o(.text.DCDC_ReadMeasurements) refers to dcdc.o(.text.sense_mv_to_voltage_mv) for sense_mv_to_voltage_mv + dcdc.o(.text.DCDC_ReadMeasurements) refers to dcdc.o(.text.sense_mv_to_current_ma) for sense_mv_to_current_ma + dcdc.o(.ARM.exidx.text.DCDC_ReadMeasurements) refers to dcdc.o(.text.DCDC_ReadMeasurements) for [Anonymous Symbol] + dcdc.o(.text.hrtim_max_duty_ticks) refers to dcdc.o(.data.s_period_ticks) for s_period_ticks + dcdc.o(.ARM.exidx.text.hrtim_max_duty_ticks) refers to dcdc.o(.text.hrtim_max_duty_ticks) for [Anonymous Symbol] + dcdc.o(.ARM.exidx.text.adc1_read_channel) refers to dcdc.o(.text.adc1_read_channel) for [Anonymous Symbol] + dcdc.o(.ARM.exidx.text.adc_raw_to_mv) refers to dcdc.o(.text.adc_raw_to_mv) for [Anonymous Symbol] + dcdc.o(.text.sense_mv_to_voltage_mv) refers to lludivv7m.o(.text) for __aeabi_uldivmod + dcdc.o(.ARM.exidx.text.sense_mv_to_voltage_mv) refers to dcdc.o(.text.sense_mv_to_voltage_mv) for [Anonymous Symbol] + dcdc.o(.ARM.exidx.text.sense_mv_to_current_ma) refers to dcdc.o(.text.sense_mv_to_current_ma) for [Anonymous Symbol] + dcdc.o(.text.DCDC_GetState) refers to dcdc.o(.bss.s_state) for s_state + dcdc.o(.ARM.exidx.text.DCDC_GetState) refers to dcdc.o(.text.DCDC_GetState) for [Anonymous Symbol] + dcdc.o(.text.DCDC_GetFault) refers to dcdc.o(.bss.s_fault) for s_fault + dcdc.o(.ARM.exidx.text.DCDC_GetFault) refers to dcdc.o(.text.DCDC_GetFault) for [Anonymous Symbol] + dcdc.o(.text.DCDC_IsHrtimReady) refers to dcdc.o(.bss.s_hrtim_ready) for s_hrtim_ready + dcdc.o(.ARM.exidx.text.DCDC_IsHrtimReady) refers to dcdc.o(.text.DCDC_IsHrtimReady) for [Anonymous Symbol] + dcdc.o(.text.DCDC_GetDutyTicks) refers to dcdc.o(.data.s_duty_ticks) for s_duty_ticks + dcdc.o(.ARM.exidx.text.DCDC_GetDutyTicks) refers to dcdc.o(.text.DCDC_GetDutyTicks) for [Anonymous Symbol] + dcdc.o(.text.DCDC_GetPeriodTicks) refers to dcdc.o(.data.s_period_ticks) for s_period_ticks + dcdc.o(.ARM.exidx.text.DCDC_GetPeriodTicks) refers to dcdc.o(.text.DCDC_GetPeriodTicks) for [Anonymous Symbol] + dcdc.o(.text.DCDC_StateText) refers to dcdc.o(.rodata.str1.1) for .L.str + dcdc.o(.ARM.exidx.text.DCDC_StateText) refers to dcdc.o(.text.DCDC_StateText) for [Anonymous Symbol] + dcdc.o(.text.DCDC_FaultText) refers to dcdc.o(.rodata.str1.1) for .L.str.5 + dcdc.o(.ARM.exidx.text.DCDC_FaultText) refers to dcdc.o(.text.DCDC_FaultText) for [Anonymous Symbol] + dcdc.o(.text.hrtim_period_from_clock) refers to system_stm32g4xx.o(.data.SystemCoreClock) for SystemCoreClock + dcdc.o(.text.hrtim_period_from_clock) refers to lludivv7m.o(.text) for __aeabi_uldivmod + dcdc.o(.ARM.exidx.text.hrtim_period_from_clock) refers to dcdc.o(.text.hrtim_period_from_clock) for [Anonymous Symbol] + dcdc.o(.ARM.exidx.text.hrtim1_wait_dll_ready) refers to dcdc.o(.text.hrtim1_wait_dll_ready) for [Anonymous Symbol] + retarget.o(.text) refers (Special) to use_no_semi_2.o(.text) for __use_no_semihosting + retarget.o(.text.Retarget_Init) refers (Special) to use_no_semi_2.o(.text) for __use_no_semihosting + retarget.o(.text.Retarget_Init) refers to retarget.o(.text.gpio_pc10_pc11_to_usart3) for gpio_pc10_pc11_to_usart3 + retarget.o(.text.Retarget_Init) refers to system_stm32g4xx.o(.data.SystemCoreClock) for SystemCoreClock + retarget.o(.ARM.exidx.text.Retarget_Init) refers (Special) to use_no_semi_2.o(.text) for __use_no_semihosting + retarget.o(.ARM.exidx.text.Retarget_Init) refers to retarget.o(.text.Retarget_Init) for [Anonymous Symbol] + retarget.o(.text.gpio_pc10_pc11_to_usart3) refers (Special) to use_no_semi_2.o(.text) for __use_no_semihosting + retarget.o(.ARM.exidx.text.gpio_pc10_pc11_to_usart3) refers (Special) to use_no_semi_2.o(.text) for __use_no_semihosting + retarget.o(.ARM.exidx.text.gpio_pc10_pc11_to_usart3) refers to retarget.o(.text.gpio_pc10_pc11_to_usart3) for [Anonymous Symbol] + retarget.o(.text.Retarget_PutChar) refers (Special) to use_no_semi_2.o(.text) for __use_no_semihosting + retarget.o(.ARM.exidx.text.Retarget_PutChar) refers (Special) to use_no_semi_2.o(.text) for __use_no_semihosting + retarget.o(.ARM.exidx.text.Retarget_PutChar) refers to retarget.o(.text.Retarget_PutChar) for [Anonymous Symbol] + retarget.o(.text.fputc) refers (Special) to use_no_semi_2.o(.text) for __use_no_semihosting + retarget.o(.text.fputc) refers to retarget.o(.text.Retarget_PutChar) for Retarget_PutChar + retarget.o(.ARM.exidx.text.fputc) refers (Special) to use_no_semi_2.o(.text) for __use_no_semihosting + retarget.o(.ARM.exidx.text.fputc) refers to retarget.o(.text.fputc) for [Anonymous Symbol] + retarget.o(.text.fgetc) refers (Special) to use_no_semi_2.o(.text) for __use_no_semihosting + retarget.o(.ARM.exidx.text.fgetc) refers (Special) to use_no_semi_2.o(.text) for __use_no_semihosting + retarget.o(.ARM.exidx.text.fgetc) refers to retarget.o(.text.fgetc) for [Anonymous Symbol] + retarget.o(.text._ttywrch) refers (Special) to use_no_semi_2.o(.text) for __use_no_semihosting + retarget.o(.text._ttywrch) refers to retarget.o(.text.Retarget_PutChar) for Retarget_PutChar + retarget.o(.ARM.exidx.text._ttywrch) refers (Special) to use_no_semi_2.o(.text) for __use_no_semihosting + retarget.o(.ARM.exidx.text._ttywrch) refers to retarget.o(.text._ttywrch) for [Anonymous Symbol] + retarget.o(.text._sys_exit) refers (Special) to use_no_semi_2.o(.text) for __use_no_semihosting + retarget.o(.ARM.exidx.text._sys_exit) refers (Special) to use_no_semi_2.o(.text) for __use_no_semihosting + retarget.o(.ARM.exidx.text._sys_exit) refers to retarget.o(.text._sys_exit) for [Anonymous Symbol] + retarget.o(.bss.__stdout) refers (Special) to use_no_semi_2.o(.text) for __use_no_semihosting + retarget.o(.bss.__stdin) refers (Special) to use_no_semi_2.o(.text) for __use_no_semihosting + system_stm32g4xx.o(.ARM.exidx.text.SystemInit) refers to system_stm32g4xx.o(.text.SystemInit) for [Anonymous Symbol] + system_stm32g4xx.o(.text.SystemCoreClockUpdate) refers to system_stm32g4xx.o(.rodata.AHBPrescTable) for AHBPrescTable + system_stm32g4xx.o(.text.SystemCoreClockUpdate) refers to system_stm32g4xx.o(.data.SystemCoreClock) for SystemCoreClock + system_stm32g4xx.o(.ARM.exidx.text.SystemCoreClockUpdate) refers to system_stm32g4xx.o(.text.SystemCoreClockUpdate) for [Anonymous Symbol] + use_no_semi_2.o(.text) refers (Special) to use_no_semi.o(.text) for __use_no_semihosting_swi + printf.o(.text) refers (Special) to _printf_a.o(.ARM.Collect$$_printf_percent$$00000006) for _printf_a + printf.o(.text) refers (Special) to _printf_c.o(.ARM.Collect$$_printf_percent$$00000013) for _printf_c + printf.o(.text) refers (Special) to _printf_charcount.o(.text) for _printf_charcount + printf.o(.text) refers (Special) to _printf_d.o(.ARM.Collect$$_printf_percent$$00000009) for _printf_d + printf.o(.text) refers (Special) to _printf_e.o(.ARM.Collect$$_printf_percent$$00000004) for _printf_e + printf.o(.text) refers (Special) to _printf_f.o(.ARM.Collect$$_printf_percent$$00000003) for _printf_f + printf.o(.text) refers (Special) to printf1.o(x$fpl$printf1) for _printf_fp_dec + printf.o(.text) refers (Special) to printf2.o(x$fpl$printf2) for _printf_fp_hex + printf.o(.text) refers (Special) to _printf_g.o(.ARM.Collect$$_printf_percent$$00000005) for _printf_g + printf.o(.text) refers (Special) to _printf_i.o(.ARM.Collect$$_printf_percent$$00000008) for _printf_i + printf.o(.text) refers (Special) to _printf_dec.o(.text) for _printf_int_dec + printf.o(.text) refers (Special) to _printf_l.o(.ARM.Collect$$_printf_percent$$00000012) for _printf_l + printf.o(.text) refers (Special) to _printf_lc.o(.ARM.Collect$$_printf_percent$$00000015) for _printf_lc + printf.o(.text) refers (Special) to _printf_ll.o(.ARM.Collect$$_printf_percent$$00000007) for _printf_ll + printf.o(.text) refers (Special) to _printf_lld.o(.ARM.Collect$$_printf_percent$$0000000E) for _printf_lld + printf.o(.text) refers (Special) to _printf_lli.o(.ARM.Collect$$_printf_percent$$0000000D) for _printf_lli + printf.o(.text) refers (Special) to _printf_llo.o(.ARM.Collect$$_printf_percent$$00000010) for _printf_llo + printf.o(.text) refers (Special) to _printf_llu.o(.ARM.Collect$$_printf_percent$$0000000F) for _printf_llu + printf.o(.text) refers (Special) to _printf_llx.o(.ARM.Collect$$_printf_percent$$00000011) for _printf_llx + printf.o(.text) refers (Special) to _printf_longlong_dec.o(.text) for _printf_longlong_dec + printf.o(.text) refers (Special) to _printf_hex_int_ll_ptr.o(.text) for _printf_longlong_hex + printf.o(.text) refers (Special) to _printf_oct_int_ll.o(.text) for _printf_longlong_oct + printf.o(.text) refers (Special) to _printf_ls.o(.ARM.Collect$$_printf_percent$$00000016) for _printf_ls + printf.o(.text) refers (Special) to _printf_n.o(.ARM.Collect$$_printf_percent$$00000001) for _printf_n + printf.o(.text) refers (Special) to _printf_o.o(.ARM.Collect$$_printf_percent$$0000000B) for _printf_o + printf.o(.text) refers (Special) to _printf_p.o(.ARM.Collect$$_printf_percent$$00000002) for _printf_p + printf.o(.text) refers (Special) to _printf_percent.o(.ARM.Collect$$_printf_percent$$00000000) for _printf_percent + printf.o(.text) refers (Special) to _printf_pad.o(.text) for _printf_post_padding + printf.o(.text) refers (Special) to _printf_s.o(.ARM.Collect$$_printf_percent$$00000014) for _printf_s + printf.o(.text) refers (Special) to _printf_str.o(.text) for _printf_str + printf.o(.text) refers (Special) to _printf_truncate.o(.text) for _printf_truncate_signed + printf.o(.text) refers (Special) to _printf_u.o(.ARM.Collect$$_printf_percent$$0000000A) for _printf_u + printf.o(.text) refers (Special) to _printf_wctomb.o(.text) for _printf_wctomb + printf.o(.text) refers (Special) to _printf_x.o(.ARM.Collect$$_printf_percent$$0000000C) for _printf_x + printf.o(.text) refers to _printf_char_file.o(.text) for _printf_char_file + printf.o(.text) refers to retarget.o(.bss.__stdout) for __stdout + __main.o(!!!main) refers to __rtentry.o(.ARM.Collect$$rtentry$$00000000) for __rt_entry + __rtentry.o(.ARM.Collect$$rtentry$$00000000) refers (Special) to __rtentry2.o(.ARM.Collect$$rtentry$$0000000A) for __rt_entry_li + __rtentry.o(.ARM.Collect$$rtentry$$00000000) refers (Special) to __rtentry2.o(.ARM.Collect$$rtentry$$0000000D) for __rt_entry_main + __rtentry.o(.ARM.Collect$$rtentry$$00000000) refers (Special) to __rtentry2.o(.ARM.Collect$$rtentry$$0000000C) for __rt_entry_postli_1 + __rtentry.o(.ARM.Collect$$rtentry$$00000000) refers (Special) to __rtentry2.o(.ARM.Collect$$rtentry$$00000009) for __rt_entry_postsh_1 + __rtentry.o(.ARM.Collect$$rtentry$$00000000) refers (Special) to __rtentry2.o(.ARM.Collect$$rtentry$$00000002) for __rt_entry_presh_1 + __rtentry.o(.ARM.Collect$$rtentry$$00000000) refers (Special) to __rtentry4.o(.ARM.Collect$$rtentry$$00000004) for __rt_entry_sh + aeabi_ldiv0_sigfpe.o(.text) refers to rt_div0.o(.text) for __rt_div0 + __printf.o(.text) refers to _printf_percent.o(.ARM.Collect$$_printf_percent$$00000000) for _printf_percent + _printf_str.o(.text) refers (Special) to _printf_char.o(.text) for _printf_cs_common + _printf_str.o(.text) refers (Weak) to _printf_pad.o(.text) for _printf_pre_padding + _printf_str.o(.text) refers (Weak) to _printf_pad.o(.text) for _printf_post_padding + _printf_dec.o(.text) refers (Weak) to _printf_truncate.o(.text) for _printf_truncate_signed + _printf_dec.o(.text) refers (Weak) to _printf_truncate.o(.text) for _printf_truncate_unsigned + _printf_dec.o(.text) refers to _printf_intcommon.o(.text) for _printf_int_common + _printf_char_file.o(.text) refers to _printf_char_common.o(.text) for _printf_char_common + _printf_char_file.o(.text) refers to ferror.o(.text) for ferror + _printf_char_file.o(.text) refers to retarget.o(.text.fputc) for fputc + _printf_wctomb.o(.text) refers (Special) to _printf_wchar.o(.text) for _printf_lcs_common + _printf_wctomb.o(.text) refers to _c16rtomb.o(.text) for _wcrtomb + _printf_wctomb.o(.text) refers (Weak) to _printf_pad.o(.text) for _printf_pre_padding + _printf_wctomb.o(.text) refers (Weak) to _printf_pad.o(.text) for _printf_post_padding + _printf_wctomb.o(.text) refers to _printf_wctomb.o(.constdata) for .constdata + _printf_wctomb.o(.constdata) refers (Special) to _printf_wchar.o(.text) for _printf_lcs_common + _printf_longlong_dec.o(.text) refers to lludiv10.o(.text) for _ll_udiv10 + _printf_longlong_dec.o(.text) refers to _printf_intcommon.o(.text) for _printf_int_common + _printf_oct_ll.o(.text) refers to _printf_intcommon.o(.text) for _printf_int_common + _printf_oct_int.o(.text) refers (Weak) to _printf_truncate.o(.text) for _printf_truncate_unsigned + _printf_oct_int.o(.text) refers to _printf_intcommon.o(.text) for _printf_int_common + _printf_oct_int_ll.o(.text) refers to _printf_intcommon.o(.text) for _printf_int_common + _printf_oct_int_ll.o(.text) refers (Weak) to _printf_truncate.o(.text) for _printf_truncate_unsigned + _printf_hex_ll.o(.text) refers to _printf_intcommon.o(.text) for _printf_int_common + _printf_hex_ll.o(.text) refers to _printf_hex_ll.o(.constdata) for .constdata + _printf_hex_int.o(.text) refers (Weak) to _printf_truncate.o(.text) for _printf_truncate_unsigned + _printf_hex_int.o(.text) refers to _printf_intcommon.o(.text) for _printf_int_common + _printf_hex_int.o(.text) refers to _printf_hex_int.o(.constdata) for .constdata + _printf_hex_int_ll.o(.text) refers to _printf_intcommon.o(.text) for _printf_int_common + _printf_hex_int_ll.o(.text) refers (Weak) to _printf_truncate.o(.text) for _printf_truncate_unsigned + _printf_hex_int_ll.o(.text) refers to _printf_hex_int_ll.o(.constdata) for .constdata + _printf_hex_ptr.o(.text) refers to _printf_intcommon.o(.text) for _printf_int_common + _printf_hex_ptr.o(.text) refers to _printf_hex_ptr.o(.constdata) for .constdata + _printf_hex_int_ptr.o(.text) refers to _printf_intcommon.o(.text) for _printf_int_common + _printf_hex_int_ptr.o(.text) refers (Weak) to _printf_truncate.o(.text) for _printf_truncate_unsigned + _printf_hex_int_ptr.o(.text) refers to _printf_hex_int_ptr.o(.constdata) for .constdata + _printf_hex_ll_ptr.o(.text) refers to _printf_intcommon.o(.text) for _printf_int_common + _printf_hex_ll_ptr.o(.text) refers to _printf_hex_ll_ptr.o(.constdata) for .constdata + _printf_hex_int_ll_ptr.o(.text) refers to _printf_intcommon.o(.text) for _printf_int_common + _printf_hex_int_ll_ptr.o(.text) refers (Weak) to _printf_truncate.o(.text) for _printf_truncate_unsigned + _printf_hex_int_ll_ptr.o(.text) refers to _printf_hex_int_ll_ptr.o(.constdata) for .constdata + __printf_flags.o(.text) refers to _printf_percent.o(.ARM.Collect$$_printf_percent$$00000000) for _printf_percent + __printf_flags.o(.text) refers to __printf_flags.o(.constdata) for .constdata + __printf_ss.o(.text) refers to _printf_percent.o(.ARM.Collect$$_printf_percent$$00000000) for _printf_percent + __printf_flags_ss.o(.text) refers to _printf_percent.o(.ARM.Collect$$_printf_percent$$00000000) for _printf_percent + __printf_flags_ss.o(.text) refers to __printf_flags_ss.o(.constdata) for .constdata + __printf_wp.o(.text) refers to __printf_wp.o(i._is_digit) for _is_digit + __printf_wp.o(.text) refers to _printf_percent.o(.ARM.Collect$$_printf_percent$$00000000) for _printf_percent + __printf_flags_wp.o(.text) refers to __printf_wp.o(i._is_digit) for _is_digit + __printf_flags_wp.o(.text) refers to _printf_percent.o(.ARM.Collect$$_printf_percent$$00000000) for _printf_percent + __printf_flags_wp.o(.text) refers to __printf_flags_wp.o(.constdata) for .constdata + __printf_ss_wp.o(.text) refers to __printf_wp.o(i._is_digit) for _is_digit + __printf_ss_wp.o(.text) refers to _printf_percent.o(.ARM.Collect$$_printf_percent$$00000000) for _printf_percent + __printf_flags_ss_wp.o(.text) refers to __printf_wp.o(i._is_digit) for _is_digit + __printf_flags_ss_wp.o(.text) refers to _printf_percent.o(.ARM.Collect$$_printf_percent$$00000000) for _printf_percent + __printf_flags_ss_wp.o(.text) refers to __printf_flags_ss_wp.o(.constdata) for .constdata + _printf_c.o(.ARM.Collect$$_printf_percent$$00000013) refers (Weak) to _printf_char.o(.text) for _printf_char + _printf_s.o(.ARM.Collect$$_printf_percent$$00000014) refers (Weak) to _printf_char.o(.text) for _printf_string + _printf_n.o(.ARM.Collect$$_printf_percent$$00000001) refers (Weak) to _printf_charcount.o(.text) for _printf_charcount + _printf_x.o(.ARM.Collect$$_printf_percent$$0000000C) refers (Weak) to _printf_hex_int_ll_ptr.o(.text) for _printf_int_hex + _printf_p.o(.ARM.Collect$$_printf_percent$$00000002) refers (Weak) to _printf_hex_int_ll_ptr.o(.text) for _printf_hex_ptr + _printf_o.o(.ARM.Collect$$_printf_percent$$0000000B) refers (Weak) to _printf_oct_int_ll.o(.text) for _printf_int_oct + _printf_i.o(.ARM.Collect$$_printf_percent$$00000008) refers (Weak) to _printf_dec.o(.text) for _printf_int_dec + _printf_d.o(.ARM.Collect$$_printf_percent$$00000009) refers (Weak) to _printf_dec.o(.text) for _printf_int_dec + _printf_u.o(.ARM.Collect$$_printf_percent$$0000000A) refers (Weak) to _printf_dec.o(.text) for _printf_int_dec + _printf_f.o(.ARM.Collect$$_printf_percent$$00000003) refers (Weak) to printf1.o(x$fpl$printf1) for _printf_fp_dec + _printf_e.o(.ARM.Collect$$_printf_percent$$00000004) refers (Weak) to printf1.o(x$fpl$printf1) for _printf_fp_dec + _printf_g.o(.ARM.Collect$$_printf_percent$$00000005) refers (Weak) to printf1.o(x$fpl$printf1) for _printf_fp_dec + _printf_a.o(.ARM.Collect$$_printf_percent$$00000006) refers (Weak) to printf2.o(x$fpl$printf2) for _printf_fp_hex + _printf_percent.o(.ARM.Collect$$_printf_percent$$00000000) refers (Special) to _printf_percent_end.o(.ARM.Collect$$_printf_percent$$00000017) for _printf_percent_end + _printf_lli.o(.ARM.Collect$$_printf_percent$$0000000D) refers (Special) to _printf_ll.o(.ARM.Collect$$_printf_percent$$00000007) for _printf_ll + _printf_lli.o(.ARM.Collect$$_printf_percent$$0000000D) refers (Weak) to _printf_longlong_dec.o(.text) for _printf_longlong_dec + _printf_lld.o(.ARM.Collect$$_printf_percent$$0000000E) refers (Special) to _printf_ll.o(.ARM.Collect$$_printf_percent$$00000007) for _printf_ll + _printf_lld.o(.ARM.Collect$$_printf_percent$$0000000E) refers (Weak) to _printf_longlong_dec.o(.text) for _printf_longlong_dec + _printf_llu.o(.ARM.Collect$$_printf_percent$$0000000F) refers (Special) to _printf_ll.o(.ARM.Collect$$_printf_percent$$00000007) for _printf_ll + _printf_llu.o(.ARM.Collect$$_printf_percent$$0000000F) refers (Weak) to _printf_longlong_dec.o(.text) for _printf_longlong_dec + _printf_lc.o(.ARM.Collect$$_printf_percent$$00000015) refers (Special) to _printf_l.o(.ARM.Collect$$_printf_percent$$00000012) for _printf_l + _printf_lc.o(.ARM.Collect$$_printf_percent$$00000015) refers (Weak) to _printf_wchar.o(.text) for _printf_wchar + _printf_ls.o(.ARM.Collect$$_printf_percent$$00000016) refers (Special) to _printf_l.o(.ARM.Collect$$_printf_percent$$00000012) for _printf_l + _printf_ls.o(.ARM.Collect$$_printf_percent$$00000016) refers (Weak) to _printf_wchar.o(.text) for _printf_wstring + _printf_llo.o(.ARM.Collect$$_printf_percent$$00000010) refers (Special) to _printf_ll.o(.ARM.Collect$$_printf_percent$$00000007) for _printf_ll + _printf_llo.o(.ARM.Collect$$_printf_percent$$00000010) refers (Weak) to _printf_oct_int_ll.o(.text) for _printf_ll_oct + _printf_llx.o(.ARM.Collect$$_printf_percent$$00000011) refers (Special) to _printf_ll.o(.ARM.Collect$$_printf_percent$$00000007) for _printf_ll + _printf_llx.o(.ARM.Collect$$_printf_percent$$00000011) refers (Weak) to _printf_hex_int_ll_ptr.o(.text) for _printf_ll_hex + printf1.o(x$fpl$printf1) refers to _printf_fp_dec.o(.text) for _printf_fp_dec_real + printf2.o(x$fpl$printf2) refers to _printf_fp_hex.o(.text) for _printf_fp_hex_real + printf2b.o(x$fpl$printf2) refers to _printf_fp_hex.o(.text) for _printf_fp_hex_real + __rtentry2.o(.ARM.Collect$$rtentry$$00000008) refers to boardinit2.o(.text) for _platform_post_stackheap_init + __rtentry2.o(.ARM.Collect$$rtentry$$0000000A) refers to libinit.o(.ARM.Collect$$libinit$$00000000) for __rt_lib_init + __rtentry2.o(.ARM.Collect$$rtentry$$0000000B) refers to boardinit3.o(.text) for _platform_post_lib_init + __rtentry2.o(.ARM.Collect$$rtentry$$0000000D) refers to main.o(.text.main) for main + __rtentry2.o(.ARM.Collect$$rtentry$$0000000D) refers to exit.o(.text) for exit + __rtentry2.o(.ARM.exidx) refers to __rtentry2.o(.ARM.Collect$$rtentry$$00000001) for .ARM.Collect$$rtentry$$00000001 + __rtentry2.o(.ARM.exidx) refers to __rtentry2.o(.ARM.Collect$$rtentry$$00000008) for .ARM.Collect$$rtentry$$00000008 + __rtentry2.o(.ARM.exidx) refers to __rtentry2.o(.ARM.Collect$$rtentry$$0000000A) for .ARM.Collect$$rtentry$$0000000A + __rtentry2.o(.ARM.exidx) refers to __rtentry2.o(.ARM.Collect$$rtentry$$0000000B) for .ARM.Collect$$rtentry$$0000000B + __rtentry2.o(.ARM.exidx) refers to __rtentry2.o(.ARM.Collect$$rtentry$$0000000D) for .ARM.Collect$$rtentry$$0000000D + __rtentry4.o(.ARM.Collect$$rtentry$$00000004) refers to sys_stackheap_outer.o(.text) for __user_setup_stackheap + __rtentry4.o(.ARM.exidx) refers to __rtentry4.o(.ARM.Collect$$rtentry$$00000004) for .ARM.Collect$$rtentry$$00000004 + rt_div0.o(.text) refers to defsig_fpe_outer.o(.text) for __rt_SIGFPE + _printf_intcommon.o(.text) refers (Weak) to _printf_pad.o(.text) for _printf_pre_padding + _printf_intcommon.o(.text) refers (Weak) to _printf_pad.o(.text) for _printf_pre_padding + _printf_intcommon.o(.text) refers (Weak) to _printf_pad.o(.text) for _printf_post_padding + _printf_fp_dec.o(.text) refers (Special) to usenofp.o(x$fpl$usenofp) for __I$use$fp + _printf_fp_dec.o(.text) refers (Special) to lc_numeric_c.o(locale$$code) for _get_lc_numeric + _printf_fp_dec.o(.text) refers to bigflt0.o(.text) for _btod_etento + _printf_fp_dec.o(.text) refers to btod.o(CL$$btod_d2e) for _btod_d2e + _printf_fp_dec.o(.text) refers to btod.o(CL$$btod_ediv) for _btod_ediv + _printf_fp_dec.o(.text) refers to btod.o(CL$$btod_emul) for _btod_emul + _printf_fp_dec.o(.text) refers to lludiv10.o(.text) for _ll_udiv10 + _printf_fp_dec.o(.text) refers to fpclassify.o(i.__ARM_fpclassify) for __ARM_fpclassify + _printf_fp_dec.o(.text) refers to _printf_fp_infnan.o(.text) for _printf_fp_infnan + _printf_fp_dec.o(.text) refers (Weak) to _printf_pad.o(.text) for _printf_pre_padding + _printf_fp_dec.o(.text) refers (Weak) to _printf_pad.o(.text) for _printf_pre_padding + _printf_fp_dec.o(.text) refers to rt_locale_intlibspace.o(.text) for __rt_locale + _printf_fp_dec.o(.text) refers (Weak) to _printf_pad.o(.text) for _printf_post_padding + _printf_fp_dec_accurate.o(.text) refers (Special) to usenofp.o(x$fpl$usenofp) for __I$use$fp + _printf_fp_dec_accurate.o(.text) refers (Special) to lc_numeric_c.o(locale$$code) for _get_lc_numeric + _printf_fp_dec_accurate.o(.text) refers to btod_accurate.o(.text) for _btod_main + _printf_fp_dec_accurate.o(.text) refers to fpclassify.o(i.__ARM_fpclassify) for __ARM_fpclassify + _printf_fp_dec_accurate.o(.text) refers to _printf_fp_infnan.o(.text) for _printf_fp_infnan + _printf_fp_dec_accurate.o(.text) refers (Weak) to _printf_pad.o(.text) for _printf_pre_padding + _printf_fp_dec_accurate.o(.text) refers (Weak) to _printf_pad.o(.text) for _printf_pre_padding + _printf_fp_dec_accurate.o(.text) refers to rt_locale_intlibspace.o(.text) for __rt_locale + _printf_fp_dec_accurate.o(.text) refers (Weak) to _printf_pad.o(.text) for _printf_post_padding + _printf_fp_hex.o(.text) refers (Special) to usenofp.o(x$fpl$usenofp) for __I$use$fp + _printf_fp_hex.o(.text) refers to fpclassify.o(i.__ARM_fpclassify) for __ARM_fpclassify + _printf_fp_hex.o(.text) refers to _printf_fp_infnan.o(.text) for _printf_fp_infnan + _printf_fp_hex.o(.text) refers (Weak) to _printf_pad.o(.text) for _printf_pre_padding + _printf_fp_hex.o(.text) refers (Weak) to _printf_pad.o(.text) for _printf_pre_padding + _printf_fp_hex.o(.text) refers (Weak) to _printf_pad.o(.text) for _printf_post_padding + _printf_fp_hex.o(.text) refers to _printf_fp_hex.o(.constdata) for .constdata + _printf_fp_hex.o(.constdata) refers (Special) to usenofp.o(x$fpl$usenofp) for __I$use$fp + _printf_char_common.o(.text) refers to __printf_flags_ss_wp.o(.text) for __printf + _printf_char.o(.text) refers (Weak) to _printf_str.o(.text) for _printf_str + _printf_wchar.o(.text) refers (Weak) to _printf_wctomb.o(.text) for _printf_wctomb + _c16rtomb.o(.text) refers to rt_ctype_table.o(.text) for __rt_ctype_table + sys_stackheap_outer.o(.text) refers to libspace.o(.text) for __user_perproc_libspace + sys_stackheap_outer.o(.text) refers to startup_stm32g474xx.o(.text) for __user_initial_stackheap + rt_ctype_table.o(.text) refers to rt_locale_intlibspace.o(.text) for __rt_locale + rt_ctype_table.o(.text) refers to lc_ctype_c.o(locale$$code) for _get_lc_ctype + rt_locale.o(.text) refers to rt_locale.o(.bss) for __rt_locale_data + rt_locale_intlibspace.o(.text) refers to libspace.o(.bss) for __libspace_start + _printf_fp_infnan.o(.text) refers (Weak) to _printf_pad.o(.text) for _printf_pre_padding + _printf_fp_infnan.o(.text) refers (Weak) to _printf_pad.o(.text) for _printf_post_padding + bigflt0.o(.text) refers (Special) to usenofp.o(x$fpl$usenofp) for __I$use$fp + bigflt0.o(.text) refers to btod.o(CL$$btod_emul) for _btod_emul + bigflt0.o(.text) refers to btod.o(CL$$btod_ediv) for _btod_ediv + bigflt0.o(.text) refers to bigflt0.o(.constdata) for .constdata + bigflt0.o(.constdata) refers (Special) to usenofp.o(x$fpl$usenofp) for __I$use$fp + btod.o(CL$$btod_d2e) refers (Special) to usenofp.o(x$fpl$usenofp) for __I$use$fp + btod.o(CL$$btod_d2e) refers to btod.o(CL$$btod_d2e_norm_op1) for _d2e_norm_op1 + btod.o(CL$$btod_d2e_norm_op1) refers (Special) to usenofp.o(x$fpl$usenofp) for __I$use$fp + btod.o(CL$$btod_d2e_norm_op1) refers to btod.o(CL$$btod_d2e_denorm_low) for _d2e_denorm_low + btod.o(CL$$btod_d2e_denorm_low) refers (Special) to usenofp.o(x$fpl$usenofp) for __I$use$fp + btod.o(CL$$btod_emul) refers (Special) to usenofp.o(x$fpl$usenofp) for __I$use$fp + btod.o(CL$$btod_emul) refers to btod.o(CL$$btod_mult_common) for __btod_mult_common + btod.o(CL$$btod_emul) refers to btod.o(CL$$btod_e2e) for _e2e + btod.o(CL$$btod_ediv) refers (Special) to usenofp.o(x$fpl$usenofp) for __I$use$fp + btod.o(CL$$btod_ediv) refers to btod.o(CL$$btod_div_common) for __btod_div_common + btod.o(CL$$btod_ediv) refers to btod.o(CL$$btod_e2e) for _e2e + btod.o(CL$$btod_emuld) refers (Special) to usenofp.o(x$fpl$usenofp) for __I$use$fp + btod.o(CL$$btod_emuld) refers to btod.o(CL$$btod_mult_common) for __btod_mult_common + btod.o(CL$$btod_emuld) refers to btod.o(CL$$btod_e2d) for _e2d + btod.o(CL$$btod_edivd) refers (Special) to usenofp.o(x$fpl$usenofp) for __I$use$fp + btod.o(CL$$btod_edivd) refers to btod.o(CL$$btod_div_common) for __btod_div_common + btod.o(CL$$btod_edivd) refers to btod.o(CL$$btod_e2d) for _e2d + btod.o(CL$$btod_e2e) refers (Special) to usenofp.o(x$fpl$usenofp) for __I$use$fp + btod.o(CL$$btod_e2d) refers (Special) to usenofp.o(x$fpl$usenofp) for __I$use$fp + btod.o(CL$$btod_e2d) refers to btod.o(CL$$btod_e2e) for _e2e + btod.o(CL$$btod_mult_common) refers (Special) to usenofp.o(x$fpl$usenofp) for __I$use$fp + btod.o(CL$$btod_div_common) refers (Special) to usenofp.o(x$fpl$usenofp) for __I$use$fp + btod_accurate.o(.text) refers to btod_accurate_common.o(.text) for _btod_common + lc_numeric_c.o(locale$$data) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000018) for __rt_lib_init_lc_numeric_2 + lc_numeric_c.o(locale$$code) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000018) for __rt_lib_init_lc_numeric_2 + lc_numeric_c.o(locale$$code) refers to strcmpv7em.o(.text) for strcmp + lc_numeric_c.o(locale$$code) refers to lc_numeric_c.o(locale$$data) for __lcnum_c_name + exit.o(.text) refers to rtexit.o(.ARM.Collect$$rtexit$$00000000) for __rt_exit + defsig_fpe_outer.o(.text) refers to defsig_fpe_inner.o(.text) for __rt_SIGFPE_inner + defsig_fpe_outer.o(.text) refers to defsig_exit.o(.text) for __sig_exit + defsig_fpe_formal.o(.text) refers to rt_raise.o(.text) for __rt_raise + libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000030) for __rt_lib_init_alloca_1 + libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$0000002E) for __rt_lib_init_argv_1 + libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$0000001D) for __rt_lib_init_atexit_1 + libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000023) for __rt_lib_init_clock_1 + libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000034) for __rt_lib_init_cpp_1 + libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000032) for __rt_lib_init_exceptions_1 + libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000001) for __rt_lib_init_fp_1 + libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000021) for __rt_lib_init_fp_trap_1 + libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000025) for __rt_lib_init_getenv_1 + libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$0000000C) for __rt_lib_init_heap_1 + libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000013) for __rt_lib_init_lc_collate_1 + libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000015) for __rt_lib_init_lc_ctype_1 + libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000017) for __rt_lib_init_lc_monetary_1 + libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000019) for __rt_lib_init_lc_numeric_1 + libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$0000001B) for __rt_lib_init_lc_time_1 + libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000006) for __rt_lib_init_preinit_1 + libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000010) for __rt_lib_init_rand_1 + libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000004) for __rt_lib_init_relocate_pie_1 + libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000035) for __rt_lib_init_return + libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$0000001F) for __rt_lib_init_signal_1 + libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000027) for __rt_lib_init_stdio_1 + libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$0000000E) for __rt_lib_init_user_alloc_1 + istatus.o(x$fpl$ieeestatus) refers (Special) to usenofp.o(x$fpl$usenofp) for __I$use$fp + fpclassify.o(i.__ARM_fpclassify) refers (Special) to usenofp.o(x$fpl$usenofp) for __I$use$fp + libspace.o(.text) refers to libspace.o(.bss) for __libspace_start + rtexit.o(.ARM.Collect$$rtexit$$00000000) refers (Special) to rtexit2.o(.ARM.Collect$$rtexit$$00000004) for __rt_exit_exit + rtexit.o(.ARM.Collect$$rtexit$$00000000) refers (Special) to rtexit2.o(.ARM.Collect$$rtexit$$00000003) for __rt_exit_ls + rtexit.o(.ARM.Collect$$rtexit$$00000000) refers (Special) to rtexit2.o(.ARM.Collect$$rtexit$$00000002) for __rt_exit_prels_1 + rtexit.o(.ARM.exidx) refers (Special) to rtexit2.o(.ARM.Collect$$rtexit$$00000004) for __rt_exit_exit + rtexit.o(.ARM.exidx) refers (Special) to rtexit2.o(.ARM.Collect$$rtexit$$00000003) for __rt_exit_ls + rtexit.o(.ARM.exidx) refers (Special) to rtexit2.o(.ARM.Collect$$rtexit$$00000002) for __rt_exit_prels_1 + rtexit.o(.ARM.exidx) refers to rtexit.o(.ARM.Collect$$rtexit$$00000000) for .ARM.Collect$$rtexit$$00000000 + rt_raise.o(.text) refers to __raise.o(.text) for __raise + rt_raise.o(.text) refers to retarget.o(.text._sys_exit) for _sys_exit + btod_accurate_common.o(.text) refers to llushr.o(.text) for __aeabi_llsr + lc_ctype_c.o(locale$$data) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000014) for __rt_lib_init_lc_ctype_2 + lc_ctype_c.o(locale$$code) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000014) for __rt_lib_init_lc_ctype_2 + lc_ctype_c.o(locale$$code) refers to strcmpv7em.o(.text) for strcmp + lc_ctype_c.o(locale$$code) refers to lc_ctype_c.o(locale$$data) for __lcctype_c_name + defsig_exit.o(.text) refers to retarget.o(.text._sys_exit) for _sys_exit + defsig_fpe_inner.o(.text) refers to defsig_general.o(.text) for __default_signal_display + libinit2.o(.ARM.Collect$$libinit$$00000001) refers to fpinit.o(x$fpl$fpinit) for _fp_init + libinit2.o(.ARM.Collect$$libinit$$00000011) refers (Weak) to rt_locale_intlibspace.o(.text) for __rt_locale + libinit2.o(.ARM.Collect$$libinit$$00000012) refers to libinit2.o(.ARM.Collect$$libinit$$00000011) for .ARM.Collect$$libinit$$00000011 + libinit2.o(.ARM.Collect$$libinit$$00000014) refers to libinit2.o(.ARM.Collect$$libinit$$00000011) for .ARM.Collect$$libinit$$00000011 + libinit2.o(.ARM.Collect$$libinit$$00000014) refers (Weak) to lc_ctype_c.o(locale$$code) for _get_lc_ctype + libinit2.o(.ARM.Collect$$libinit$$00000016) refers to libinit2.o(.ARM.Collect$$libinit$$00000011) for .ARM.Collect$$libinit$$00000011 + libinit2.o(.ARM.Collect$$libinit$$00000018) refers to libinit2.o(.ARM.Collect$$libinit$$00000011) for .ARM.Collect$$libinit$$00000011 + libinit2.o(.ARM.Collect$$libinit$$00000018) refers (Weak) to lc_numeric_c.o(locale$$code) for _get_lc_numeric + libinit2.o(.ARM.Collect$$libinit$$0000001A) refers to libinit2.o(.ARM.Collect$$libinit$$00000011) for .ARM.Collect$$libinit$$00000011 + libinit2.o(.ARM.Collect$$libinit$$00000028) refers to argv_veneer.o(.emb_text) for __ARM_argv_veneer + libinit2.o(.ARM.Collect$$libinit$$00000029) refers to argv_veneer.o(.emb_text) for __ARM_argv_veneer + rtexit2.o(.ARM.Collect$$rtexit$$00000003) refers to libshutdown.o(.ARM.Collect$$libshutdown$$00000000) for __rt_lib_shutdown + rtexit2.o(.ARM.Collect$$rtexit$$00000004) refers to retarget.o(.text._sys_exit) for _sys_exit + rtexit2.o(.ARM.exidx) refers to rtexit2.o(.ARM.Collect$$rtexit$$00000001) for .ARM.Collect$$rtexit$$00000001 + rtexit2.o(.ARM.exidx) refers to rtexit2.o(.ARM.Collect$$rtexit$$00000003) for .ARM.Collect$$rtexit$$00000003 + rtexit2.o(.ARM.exidx) refers to rtexit2.o(.ARM.Collect$$rtexit$$00000004) for .ARM.Collect$$rtexit$$00000004 + __raise.o(.text) refers to defsig.o(CL$$defsig) for __default_signal_handler + defsig_general.o(.text) refers to retarget.o(.text._ttywrch) for _ttywrch + argv_veneer.o(.emb_text) refers to no_argv.o(.text) for __ARM_get_argv + defsig.o(CL$$defsig) refers to defsig_fpe_inner.o(.text) for __rt_SIGFPE_inner + defsig.o(CL$$defsig) refers to defsig_rtmem_inner.o(.text) for __rt_SIGRTMEM_inner + _get_argv_nomalloc.o(.text) refers (Special) to hrguard.o(.text) for __heap_region$guard + _get_argv_nomalloc.o(.text) refers to defsig_rtmem_outer.o(.text) for __rt_SIGRTMEM + _get_argv_nomalloc.o(.text) refers to sys_command.o(.text) for _sys_command_string + libshutdown.o(.ARM.Collect$$libshutdown$$00000000) refers (Special) to libshutdown2.o(.ARM.Collect$$libshutdown$$00000002) for __rt_lib_shutdown_cpp_1 + libshutdown.o(.ARM.Collect$$libshutdown$$00000000) refers (Special) to libshutdown2.o(.ARM.Collect$$libshutdown$$00000007) for __rt_lib_shutdown_fp_trap_1 + libshutdown.o(.ARM.Collect$$libshutdown$$00000000) refers (Special) to libshutdown2.o(.ARM.Collect$$libshutdown$$0000000F) for __rt_lib_shutdown_heap_1 + libshutdown.o(.ARM.Collect$$libshutdown$$00000000) refers (Special) to libshutdown2.o(.ARM.Collect$$libshutdown$$00000010) for __rt_lib_shutdown_return + libshutdown.o(.ARM.Collect$$libshutdown$$00000000) refers (Special) to libshutdown2.o(.ARM.Collect$$libshutdown$$0000000A) for __rt_lib_shutdown_signal_1 + libshutdown.o(.ARM.Collect$$libshutdown$$00000000) refers (Special) to libshutdown2.o(.ARM.Collect$$libshutdown$$00000004) for __rt_lib_shutdown_stdio_1 + libshutdown.o(.ARM.Collect$$libshutdown$$00000000) refers (Special) to libshutdown2.o(.ARM.Collect$$libshutdown$$0000000C) for __rt_lib_shutdown_user_alloc_1 + sys_command.o(.text) refers (Special) to use_no_semi.o(.text) for __I$use$semihosting + sys_command.o(.text) refers (Special) to indicate_semi.o(.text) for __semihosting_library_function + sys_command_hlt.o(.text) refers (Special) to use_no_semi.o(.text) for __I$use$semihosting + sys_command_hlt.o(.text) refers (Special) to indicate_semi.o(.text) for __semihosting_library_function + defsig_abrt_inner.o(.text) refers to defsig_general.o(.text) for __default_signal_display + defsig_rtred_inner.o(.text) refers to defsig_general.o(.text) for __default_signal_display + defsig_rtmem_inner.o(.text) refers to defsig_general.o(.text) for __default_signal_display + defsig_rtmem_outer.o(.text) refers to defsig_rtmem_inner.o(.text) for __rt_SIGRTMEM_inner + defsig_rtmem_outer.o(.text) refers to defsig_exit.o(.text) for __sig_exit + defsig_rtmem_formal.o(.text) refers to rt_raise.o(.text) for __rt_raise + defsig_stak_inner.o(.text) refers to defsig_general.o(.text) for __default_signal_display + defsig_pvfn_inner.o(.text) refers to defsig_general.o(.text) for __default_signal_display + defsig_cppl_inner.o(.text) refers to defsig_general.o(.text) for __default_signal_display + defsig_segv_inner.o(.text) refers to defsig_general.o(.text) for __default_signal_display + defsig_other.o(.text) refers to defsig_general.o(.text) for __default_signal_display + + +============================================================================== + +Removing Unused input sections from the image. + + Removing main.o(.text), (0 bytes). + Removing main.o(.ARM.exidx.text.main), (8 bytes). + Removing main.o(.ARM.use_no_argv), (4 bytes). + Removing board.o(.text), (0 bytes). + Removing board.o(.ARM.exidx.text.Board_Init), (8 bytes). + Removing board.o(.ARM.exidx.text.SystemClock_Config), (8 bytes). + Removing board.o(.ARM.exidx.text.SysTick_Config), (8 bytes). + Removing board.o(.ARM.exidx.text.Board_FatalError), (8 bytes). + Removing board.o(.ARM.exidx.text.Board_Millis), (8 bytes). + Removing board.o(.ARM.exidx.text.Board_DelayMs), (8 bytes). + Removing board.o(.ARM.exidx.text.SysTick_Handler), (8 bytes). + Removing board.o(.ARM.exidx.text.__NVIC_SetPriority), (8 bytes). + Removing board.o(.ARM.exidx.text.Clock_UseHsi16), (8 bytes). + Removing board.o(.ARM.exidx.text.wait_mask_clear), (8 bytes). + Removing board.o(.ARM.exidx.text.Flash_SetLatency), (8 bytes). + Removing board.o(.ARM.exidx.text.wait_mask_set), (8 bytes). + Removing board.o(.ARM.exidx.text.wait_mask_value), (8 bytes). + Removing dcdc.o(.text), (0 bytes). + Removing dcdc.o(.ARM.exidx.text.DCDC_Init), (8 bytes). + Removing dcdc.o(.ARM.exidx.text.gpio_init_for_dcdc), (8 bytes). + Removing dcdc.o(.ARM.exidx.text.set_usbpd_input_switch), (8 bytes). + Removing dcdc.o(.ARM.exidx.text.set_loads_off), (8 bytes). + Removing dcdc.o(.ARM.exidx.text.adc1_init), (8 bytes). + Removing dcdc.o(.ARM.exidx.text.hrtim1_timer_c_init), (8 bytes). + Removing dcdc.o(.ARM.exidx.text.hrtim1_outputs_enable), (8 bytes). + Removing dcdc.o(.text.DCDC_Start), (100 bytes). + Removing dcdc.o(.ARM.exidx.text.DCDC_Start), (8 bytes). + Removing dcdc.o(.ARM.exidx.text.latch_fault), (8 bytes). + Removing dcdc.o(.ARM.exidx.text.hrtim1_set_duty), (8 bytes). + Removing dcdc.o(.text.DCDC_Stop), (56 bytes). + Removing dcdc.o(.ARM.exidx.text.DCDC_Stop), (8 bytes). + Removing dcdc.o(.ARM.exidx.text.DCDC_ControlStep), (8 bytes). + Removing dcdc.o(.ARM.exidx.text.DCDC_ReadMeasurements), (8 bytes). + Removing dcdc.o(.ARM.exidx.text.hrtim_max_duty_ticks), (8 bytes). + Removing dcdc.o(.ARM.exidx.text.adc1_read_channel), (8 bytes). + Removing dcdc.o(.ARM.exidx.text.adc_raw_to_mv), (8 bytes). + Removing dcdc.o(.ARM.exidx.text.sense_mv_to_voltage_mv), (8 bytes). + Removing dcdc.o(.ARM.exidx.text.sense_mv_to_current_ma), (8 bytes). + Removing dcdc.o(.ARM.exidx.text.DCDC_GetState), (8 bytes). + Removing dcdc.o(.ARM.exidx.text.DCDC_GetFault), (8 bytes). + Removing dcdc.o(.ARM.exidx.text.DCDC_IsHrtimReady), (8 bytes). + Removing dcdc.o(.ARM.exidx.text.DCDC_GetDutyTicks), (8 bytes). + Removing dcdc.o(.ARM.exidx.text.DCDC_GetPeriodTicks), (8 bytes). + Removing dcdc.o(.ARM.exidx.text.DCDC_StateText), (8 bytes). + Removing dcdc.o(.ARM.exidx.text.DCDC_FaultText), (8 bytes). + Removing dcdc.o(.ARM.exidx.text.hrtim_period_from_clock), (8 bytes). + Removing dcdc.o(.ARM.exidx.text.hrtim1_wait_dll_ready), (8 bytes). + Removing retarget.o(.text), (0 bytes). + Removing retarget.o(.ARM.exidx.text.Retarget_Init), (8 bytes). + Removing retarget.o(.ARM.exidx.text.gpio_pc10_pc11_to_usart3), (8 bytes). + Removing retarget.o(.ARM.exidx.text.Retarget_PutChar), (8 bytes). + Removing retarget.o(.ARM.exidx.text.fputc), (8 bytes). + Removing retarget.o(.text.fgetc), (44 bytes). + Removing retarget.o(.ARM.exidx.text.fgetc), (8 bytes). + Removing retarget.o(.text._ttywrch), (18 bytes). + Removing retarget.o(.ARM.exidx.text._ttywrch), (8 bytes). + Removing retarget.o(.ARM.exidx.text._sys_exit), (8 bytes). + Removing retarget.o(.bss.__stdin), (84 bytes). + Removing system_stm32g4xx.o(.text), (0 bytes). + Removing system_stm32g4xx.o(.ARM.exidx.text.SystemInit), (8 bytes). + Removing system_stm32g4xx.o(.ARM.exidx.text.SystemCoreClockUpdate), (8 bytes). + Removing system_stm32g4xx.o(.rodata.APBPrescTable), (8 bytes). + +62 unused section(s) (total 714 bytes) removed from the image. + +============================================================================== + +Image Symbol Table + + Local Symbols + + Symbol Name Value Ov Type Size Object(Section) + + ../clib/angel/boardlib.s 0x00000000 Number 0 boardinit1.o ABSOLUTE + ../clib/angel/boardlib.s 0x00000000 Number 0 boardinit2.o ABSOLUTE + ../clib/angel/boardlib.s 0x00000000 Number 0 boardinit3.o ABSOLUTE + ../clib/angel/boardlib.s 0x00000000 Number 0 boardshut.o ABSOLUTE + ../clib/angel/handlers.s 0x00000000 Number 0 __scatter_copy.o ABSOLUTE + ../clib/angel/handlers.s 0x00000000 Number 0 __scatter_zi.o ABSOLUTE + ../clib/angel/kernel.s 0x00000000 Number 0 __rtentry.o ABSOLUTE + ../clib/angel/kernel.s 0x00000000 Number 0 __rtentry2.o ABSOLUTE + ../clib/angel/kernel.s 0x00000000 Number 0 __rtentry4.o ABSOLUTE + ../clib/angel/kernel.s 0x00000000 Number 0 rtexit.o ABSOLUTE + ../clib/angel/kernel.s 0x00000000 Number 0 rtexit2.o ABSOLUTE + ../clib/angel/rt.s 0x00000000 Number 0 aeabi_ldiv0.o ABSOLUTE + ../clib/angel/rt.s 0x00000000 Number 0 aeabi_ldiv0_sigfpe.o ABSOLUTE + ../clib/angel/rt.s 0x00000000 Number 0 rt_div0.o ABSOLUTE + ../clib/angel/rt.s 0x00000000 Number 0 rt_ctype_table.o ABSOLUTE + ../clib/angel/rt.s 0x00000000 Number 0 rt_locale.o ABSOLUTE + ../clib/angel/rt.s 0x00000000 Number 0 rt_locale_intlibspace.o ABSOLUTE + ../clib/angel/rt.s 0x00000000 Number 0 rt_raise.o ABSOLUTE + ../clib/angel/scatter.s 0x00000000 Number 0 __scatter.o ABSOLUTE + ../clib/angel/startup.s 0x00000000 Number 0 __main.o ABSOLUTE + ../clib/angel/sys.s 0x00000000 Number 0 use_no_semi_2.o ABSOLUTE + ../clib/angel/sys.s 0x00000000 Number 0 use_no_semi.o ABSOLUTE + ../clib/angel/sys.s 0x00000000 Number 0 sys_stackheap_outer.o ABSOLUTE + ../clib/angel/sys.s 0x00000000 Number 0 libspace.o ABSOLUTE + ../clib/angel/sys.s 0x00000000 Number 0 indicate_semi.o ABSOLUTE + ../clib/angel/sysapp.c 0x00000000 Number 0 sys_command.o ABSOLUTE + ../clib/angel/sysapp.c 0x00000000 Number 0 sys_command_hlt.o ABSOLUTE + ../clib/armsys.c 0x00000000 Number 0 argv_veneer.o ABSOLUTE + ../clib/armsys.c 0x00000000 Number 0 argv_veneer.o ABSOLUTE + ../clib/armsys.c 0x00000000 Number 0 _get_argv_nomalloc.o ABSOLUTE + ../clib/armsys.c 0x00000000 Number 0 no_argv.o ABSOLUTE + ../clib/bigflt.c 0x00000000 Number 0 bigflt0.o ABSOLUTE + ../clib/btod.s 0x00000000 Number 0 btod.o ABSOLUTE + ../clib/btod_accurate.c 0x00000000 Number 0 btod_accurate.o ABSOLUTE + ../clib/btod_accurate.c 0x00000000 Number 0 btod_accurate_common.o ABSOLUTE + ../clib/heapalloc.c 0x00000000 Number 0 hrguard.o ABSOLUTE + ../clib/heapaux.c 0x00000000 Number 0 heapauxi.o ABSOLUTE + ../clib/libinit.s 0x00000000 Number 0 libinit.o ABSOLUTE + ../clib/libinit.s 0x00000000 Number 0 libinit2.o ABSOLUTE + ../clib/libinit.s 0x00000000 Number 0 libshutdown.o ABSOLUTE + ../clib/libinit.s 0x00000000 Number 0 libshutdown2.o ABSOLUTE + ../clib/locale.c 0x00000000 Number 0 _c16rtomb.o ABSOLUTE + ../clib/locale.s 0x00000000 Number 0 lc_numeric_c.o ABSOLUTE + ../clib/locale.s 0x00000000 Number 0 lc_ctype_c.o ABSOLUTE + ../clib/longlong.s 0x00000000 Number 0 lludivv7m.o ABSOLUTE + ../clib/longlong.s 0x00000000 Number 0 lludiv10.o ABSOLUTE + ../clib/longlong.s 0x00000000 Number 0 llushr.o ABSOLUTE + ../clib/memcpset.s 0x00000000 Number 0 strcmpv7em.o ABSOLUTE + ../clib/misc.s 0x00000000 Number 0 printf_stubs.o ABSOLUTE + ../clib/printf.c 0x00000000 Number 0 printf.o ABSOLUTE + ../clib/printf.c 0x00000000 Number 0 __printf.o ABSOLUTE + ../clib/printf.c 0x00000000 Number 0 _printf_pad.o ABSOLUTE + ../clib/printf.c 0x00000000 Number 0 _printf_truncate.o ABSOLUTE + ../clib/printf.c 0x00000000 Number 0 _printf_str.o ABSOLUTE + ../clib/printf.c 0x00000000 Number 0 _printf_dec.o ABSOLUTE + ../clib/printf.c 0x00000000 Number 0 _printf_charcount.o ABSOLUTE + ../clib/printf.c 0x00000000 Number 0 _printf_char_file.o ABSOLUTE + ../clib/printf.c 0x00000000 Number 0 _printf_wctomb.o ABSOLUTE + ../clib/printf.c 0x00000000 Number 0 _printf_longlong_dec.o ABSOLUTE + ../clib/printf.c 0x00000000 Number 0 _printf_oct_ll.o ABSOLUTE + ../clib/printf.c 0x00000000 Number 0 _printf_oct_int.o ABSOLUTE + ../clib/printf.c 0x00000000 Number 0 _printf_oct_int_ll.o ABSOLUTE + ../clib/printf.c 0x00000000 Number 0 _printf_hex_ll.o ABSOLUTE + ../clib/printf.c 0x00000000 Number 0 _printf_hex_int.o ABSOLUTE + ../clib/printf.c 0x00000000 Number 0 _printf_hex_int_ll.o ABSOLUTE + ../clib/printf.c 0x00000000 Number 0 _printf_hex_ptr.o ABSOLUTE + ../clib/printf.c 0x00000000 Number 0 _printf_hex_int_ptr.o ABSOLUTE + ../clib/printf.c 0x00000000 Number 0 _printf_hex_ll_ptr.o ABSOLUTE + ../clib/printf.c 0x00000000 Number 0 _printf_hex_int_ll_ptr.o ABSOLUTE + ../clib/printf.c 0x00000000 Number 0 __printf_flags.o ABSOLUTE + ../clib/printf.c 0x00000000 Number 0 __printf_ss.o ABSOLUTE + ../clib/printf.c 0x00000000 Number 0 __printf_flags_ss.o ABSOLUTE + ../clib/printf.c 0x00000000 Number 0 __printf_wp.o ABSOLUTE + ../clib/printf.c 0x00000000 Number 0 __printf_flags_wp.o ABSOLUTE + ../clib/printf.c 0x00000000 Number 0 __printf_ss_wp.o ABSOLUTE + ../clib/printf.c 0x00000000 Number 0 __printf_flags_ss_wp.o ABSOLUTE + ../clib/printf.c 0x00000000 Number 0 _printf_intcommon.o ABSOLUTE + ../clib/printf.c 0x00000000 Number 0 _printf_fp_dec.o ABSOLUTE + ../clib/printf.c 0x00000000 Number 0 _printf_fp_dec_accurate.o ABSOLUTE + ../clib/printf.c 0x00000000 Number 0 _printf_fp_hex.o ABSOLUTE + ../clib/printf.c 0x00000000 Number 0 _printf_char_common.o ABSOLUTE + ../clib/printf.c 0x00000000 Number 0 _printf_char.o ABSOLUTE + ../clib/printf.c 0x00000000 Number 0 _printf_wchar.o ABSOLUTE + ../clib/printf.c 0x00000000 Number 0 _printf_fp_infnan.o ABSOLUTE + ../clib/printf.c 0x00000000 Number 0 __printf_nopercent.o ABSOLUTE + ../clib/printf_percent.s 0x00000000 Number 0 _printf_c.o ABSOLUTE + ../clib/printf_percent.s 0x00000000 Number 0 _printf_s.o ABSOLUTE + ../clib/printf_percent.s 0x00000000 Number 0 _printf_n.o ABSOLUTE + ../clib/printf_percent.s 0x00000000 Number 0 _printf_x.o ABSOLUTE + ../clib/printf_percent.s 0x00000000 Number 0 _printf_p.o ABSOLUTE + ../clib/printf_percent.s 0x00000000 Number 0 _printf_o.o ABSOLUTE + ../clib/printf_percent.s 0x00000000 Number 0 _printf_i.o ABSOLUTE + ../clib/printf_percent.s 0x00000000 Number 0 _printf_d.o ABSOLUTE + ../clib/printf_percent.s 0x00000000 Number 0 _printf_u.o ABSOLUTE + ../clib/printf_percent.s 0x00000000 Number 0 _printf_f.o ABSOLUTE + ../clib/printf_percent.s 0x00000000 Number 0 _printf_e.o ABSOLUTE + ../clib/printf_percent.s 0x00000000 Number 0 _printf_g.o ABSOLUTE + ../clib/printf_percent.s 0x00000000 Number 0 _printf_a.o ABSOLUTE + ../clib/printf_percent.s 0x00000000 Number 0 _printf_percent.o ABSOLUTE + ../clib/printf_percent.s 0x00000000 Number 0 _printf_lli.o ABSOLUTE + ../clib/printf_percent.s 0x00000000 Number 0 _printf_lld.o ABSOLUTE + ../clib/printf_percent.s 0x00000000 Number 0 _printf_llu.o ABSOLUTE + ../clib/printf_percent.s 0x00000000 Number 0 _printf_ll.o ABSOLUTE + ../clib/printf_percent.s 0x00000000 Number 0 _printf_l.o ABSOLUTE + ../clib/printf_percent.s 0x00000000 Number 0 _printf_lc.o ABSOLUTE + ../clib/printf_percent.s 0x00000000 Number 0 _printf_ls.o ABSOLUTE + ../clib/printf_percent.s 0x00000000 Number 0 _printf_llo.o ABSOLUTE + ../clib/printf_percent.s 0x00000000 Number 0 _printf_llx.o ABSOLUTE + ../clib/printf_percent.s 0x00000000 Number 0 _printf_percent_end.o ABSOLUTE + ../clib/signal.c 0x00000000 Number 0 defsig_fpe_outer.o ABSOLUTE + ../clib/signal.c 0x00000000 Number 0 defsig_fpe_formal.o ABSOLUTE + ../clib/signal.c 0x00000000 Number 0 defsig_exit.o ABSOLUTE + ../clib/signal.c 0x00000000 Number 0 defsig_fpe_inner.o ABSOLUTE + ../clib/signal.c 0x00000000 Number 0 __raise.o ABSOLUTE + ../clib/signal.c 0x00000000 Number 0 defsig_general.o ABSOLUTE + ../clib/signal.c 0x00000000 Number 0 defsig_abrt_inner.o ABSOLUTE + ../clib/signal.c 0x00000000 Number 0 defsig_rtred_inner.o ABSOLUTE + ../clib/signal.c 0x00000000 Number 0 defsig_rtmem_inner.o ABSOLUTE + ../clib/signal.c 0x00000000 Number 0 defsig_rtmem_outer.o ABSOLUTE + ../clib/signal.c 0x00000000 Number 0 defsig_rtmem_formal.o ABSOLUTE + ../clib/signal.c 0x00000000 Number 0 defsig_stak_inner.o ABSOLUTE + ../clib/signal.c 0x00000000 Number 0 defsig_pvfn_inner.o ABSOLUTE + ../clib/signal.c 0x00000000 Number 0 defsig_cppl_inner.o ABSOLUTE + ../clib/signal.c 0x00000000 Number 0 defsig_segv_inner.o ABSOLUTE + ../clib/signal.c 0x00000000 Number 0 defsig_other.o ABSOLUTE + ../clib/signal.s 0x00000000 Number 0 defsig.o ABSOLUTE + ../clib/stdio.c 0x00000000 Number 0 ferror.o ABSOLUTE + ../clib/stdio.c 0x00000000 Number 0 ferror_locked.o ABSOLUTE + ../clib/stdlib.c 0x00000000 Number 0 exit.o ABSOLUTE + ../fplib/fpinit.s 0x00000000 Number 0 fpinit.o ABSOLUTE + ../fplib/istatus.s 0x00000000 Number 0 istatus.o ABSOLUTE + ../fplib/printf1.s 0x00000000 Number 0 printf1.o ABSOLUTE + ../fplib/printf2.s 0x00000000 Number 0 printf2.o ABSOLUTE + ../fplib/printf2a.s 0x00000000 Number 0 printf2a.o ABSOLUTE + ../fplib/printf2b.s 0x00000000 Number 0 printf2b.o ABSOLUTE + ../fplib/usenofp.s 0x00000000 Number 0 usenofp.o ABSOLUTE + ../mathlib/fpclassify.c 0x00000000 Number 0 fpclassify.o ABSOLUTE + C:/Keil_v5/ARM/Packs/Keil/STM32G4xx_DFP/1.6.0/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/arm/startup_stm32g474xx.s 0x00000000 Number 0 startup_stm32g474xx.o ABSOLUTE + board.c 0x00000000 Number 0 board.o ABSOLUTE + dc.s 0x00000000 Number 0 dc.o ABSOLUTE + dcdc.c 0x00000000 Number 0 dcdc.o ABSOLUTE + main.c 0x00000000 Number 0 main.o ABSOLUTE + retarget.c 0x00000000 Number 0 retarget.o ABSOLUTE + system_stm32g4xx.c 0x00000000 Number 0 system_stm32g4xx.o ABSOLUTE + RESET 0x08000000 Section 472 startup_stm32g474xx.o(RESET) + !!!main 0x080001d8 Section 8 __main.o(!!!main) + !!!scatter 0x080001e0 Section 92 __scatter.o(!!!scatter) + !!handler_copy 0x0800023c Section 26 __scatter_copy.o(!!handler_copy) + !!handler_null 0x08000258 Section 2 __scatter.o(!!handler_null) + !!handler_zi 0x0800025c Section 28 __scatter_zi.o(!!handler_zi) + .ARM.Collect$$_printf_percent$$00000000 0x08000278 Section 0 _printf_percent.o(.ARM.Collect$$_printf_percent$$00000000) + .ARM.Collect$$_printf_percent$$00000001 0x08000278 Section 6 _printf_n.o(.ARM.Collect$$_printf_percent$$00000001) + .ARM.Collect$$_printf_percent$$00000002 0x0800027e Section 6 _printf_p.o(.ARM.Collect$$_printf_percent$$00000002) + .ARM.Collect$$_printf_percent$$00000003 0x08000284 Section 6 _printf_f.o(.ARM.Collect$$_printf_percent$$00000003) + .ARM.Collect$$_printf_percent$$00000004 0x0800028a Section 6 _printf_e.o(.ARM.Collect$$_printf_percent$$00000004) + .ARM.Collect$$_printf_percent$$00000005 0x08000290 Section 6 _printf_g.o(.ARM.Collect$$_printf_percent$$00000005) + .ARM.Collect$$_printf_percent$$00000006 0x08000296 Section 6 _printf_a.o(.ARM.Collect$$_printf_percent$$00000006) + .ARM.Collect$$_printf_percent$$00000007 0x0800029c Section 10 _printf_ll.o(.ARM.Collect$$_printf_percent$$00000007) + .ARM.Collect$$_printf_percent$$00000008 0x080002a6 Section 6 _printf_i.o(.ARM.Collect$$_printf_percent$$00000008) + .ARM.Collect$$_printf_percent$$00000009 0x080002ac Section 6 _printf_d.o(.ARM.Collect$$_printf_percent$$00000009) + .ARM.Collect$$_printf_percent$$0000000A 0x080002b2 Section 6 _printf_u.o(.ARM.Collect$$_printf_percent$$0000000A) + .ARM.Collect$$_printf_percent$$0000000B 0x080002b8 Section 6 _printf_o.o(.ARM.Collect$$_printf_percent$$0000000B) + .ARM.Collect$$_printf_percent$$0000000C 0x080002be Section 6 _printf_x.o(.ARM.Collect$$_printf_percent$$0000000C) + .ARM.Collect$$_printf_percent$$0000000D 0x080002c4 Section 6 _printf_lli.o(.ARM.Collect$$_printf_percent$$0000000D) + .ARM.Collect$$_printf_percent$$0000000E 0x080002ca Section 6 _printf_lld.o(.ARM.Collect$$_printf_percent$$0000000E) + .ARM.Collect$$_printf_percent$$0000000F 0x080002d0 Section 6 _printf_llu.o(.ARM.Collect$$_printf_percent$$0000000F) + .ARM.Collect$$_printf_percent$$00000010 0x080002d6 Section 6 _printf_llo.o(.ARM.Collect$$_printf_percent$$00000010) + .ARM.Collect$$_printf_percent$$00000011 0x080002dc Section 6 _printf_llx.o(.ARM.Collect$$_printf_percent$$00000011) + .ARM.Collect$$_printf_percent$$00000012 0x080002e2 Section 10 _printf_l.o(.ARM.Collect$$_printf_percent$$00000012) + .ARM.Collect$$_printf_percent$$00000013 0x080002ec Section 6 _printf_c.o(.ARM.Collect$$_printf_percent$$00000013) + .ARM.Collect$$_printf_percent$$00000014 0x080002f2 Section 6 _printf_s.o(.ARM.Collect$$_printf_percent$$00000014) + .ARM.Collect$$_printf_percent$$00000015 0x080002f8 Section 6 _printf_lc.o(.ARM.Collect$$_printf_percent$$00000015) + .ARM.Collect$$_printf_percent$$00000016 0x080002fe Section 6 _printf_ls.o(.ARM.Collect$$_printf_percent$$00000016) + .ARM.Collect$$_printf_percent$$00000017 0x08000304 Section 4 _printf_percent_end.o(.ARM.Collect$$_printf_percent$$00000017) + .ARM.Collect$$libinit$$00000000 0x08000308 Section 2 libinit.o(.ARM.Collect$$libinit$$00000000) + .ARM.Collect$$libinit$$00000001 0x0800030a Section 4 libinit2.o(.ARM.Collect$$libinit$$00000001) + .ARM.Collect$$libinit$$00000004 0x0800030e Section 0 libinit2.o(.ARM.Collect$$libinit$$00000004) + .ARM.Collect$$libinit$$00000006 0x0800030e Section 0 libinit2.o(.ARM.Collect$$libinit$$00000006) + .ARM.Collect$$libinit$$0000000C 0x0800030e Section 0 libinit2.o(.ARM.Collect$$libinit$$0000000C) + .ARM.Collect$$libinit$$0000000E 0x0800030e Section 0 libinit2.o(.ARM.Collect$$libinit$$0000000E) + .ARM.Collect$$libinit$$00000010 0x0800030e Section 0 libinit2.o(.ARM.Collect$$libinit$$00000010) + .ARM.Collect$$libinit$$00000011 0x0800030e Section 6 libinit2.o(.ARM.Collect$$libinit$$00000011) + .ARM.Collect$$libinit$$00000013 0x08000314 Section 0 libinit2.o(.ARM.Collect$$libinit$$00000013) + .ARM.Collect$$libinit$$00000014 0x08000314 Section 12 libinit2.o(.ARM.Collect$$libinit$$00000014) + .ARM.Collect$$libinit$$00000015 0x08000320 Section 0 libinit2.o(.ARM.Collect$$libinit$$00000015) + .ARM.Collect$$libinit$$00000017 0x08000320 Section 0 libinit2.o(.ARM.Collect$$libinit$$00000017) + .ARM.Collect$$libinit$$00000018 0x08000320 Section 10 libinit2.o(.ARM.Collect$$libinit$$00000018) + .ARM.Collect$$libinit$$00000019 0x0800032a Section 0 libinit2.o(.ARM.Collect$$libinit$$00000019) + .ARM.Collect$$libinit$$0000001B 0x0800032a Section 0 libinit2.o(.ARM.Collect$$libinit$$0000001B) + .ARM.Collect$$libinit$$0000001D 0x0800032a Section 0 libinit2.o(.ARM.Collect$$libinit$$0000001D) + .ARM.Collect$$libinit$$0000001F 0x0800032a Section 0 libinit2.o(.ARM.Collect$$libinit$$0000001F) + .ARM.Collect$$libinit$$00000021 0x0800032a Section 0 libinit2.o(.ARM.Collect$$libinit$$00000021) + .ARM.Collect$$libinit$$00000023 0x0800032a Section 0 libinit2.o(.ARM.Collect$$libinit$$00000023) + .ARM.Collect$$libinit$$00000025 0x0800032a Section 0 libinit2.o(.ARM.Collect$$libinit$$00000025) + .ARM.Collect$$libinit$$00000027 0x0800032a Section 0 libinit2.o(.ARM.Collect$$libinit$$00000027) + .ARM.Collect$$libinit$$0000002E 0x0800032a Section 0 libinit2.o(.ARM.Collect$$libinit$$0000002E) + .ARM.Collect$$libinit$$00000030 0x0800032a Section 0 libinit2.o(.ARM.Collect$$libinit$$00000030) + .ARM.Collect$$libinit$$00000032 0x0800032a Section 0 libinit2.o(.ARM.Collect$$libinit$$00000032) + .ARM.Collect$$libinit$$00000034 0x0800032a Section 0 libinit2.o(.ARM.Collect$$libinit$$00000034) + .ARM.Collect$$libinit$$00000035 0x0800032a Section 2 libinit2.o(.ARM.Collect$$libinit$$00000035) + .ARM.Collect$$libshutdown$$00000000 0x0800032c Section 2 libshutdown.o(.ARM.Collect$$libshutdown$$00000000) + .ARM.Collect$$libshutdown$$00000002 0x0800032e Section 0 libshutdown2.o(.ARM.Collect$$libshutdown$$00000002) + .ARM.Collect$$libshutdown$$00000004 0x0800032e Section 0 libshutdown2.o(.ARM.Collect$$libshutdown$$00000004) + .ARM.Collect$$libshutdown$$00000007 0x0800032e Section 0 libshutdown2.o(.ARM.Collect$$libshutdown$$00000007) + .ARM.Collect$$libshutdown$$0000000A 0x0800032e Section 0 libshutdown2.o(.ARM.Collect$$libshutdown$$0000000A) + .ARM.Collect$$libshutdown$$0000000C 0x0800032e Section 0 libshutdown2.o(.ARM.Collect$$libshutdown$$0000000C) + .ARM.Collect$$libshutdown$$0000000F 0x0800032e Section 0 libshutdown2.o(.ARM.Collect$$libshutdown$$0000000F) + .ARM.Collect$$libshutdown$$00000010 0x0800032e Section 2 libshutdown2.o(.ARM.Collect$$libshutdown$$00000010) + .ARM.Collect$$rtentry$$00000000 0x08000330 Section 0 __rtentry.o(.ARM.Collect$$rtentry$$00000000) + .ARM.Collect$$rtentry$$00000002 0x08000330 Section 0 __rtentry2.o(.ARM.Collect$$rtentry$$00000002) + .ARM.Collect$$rtentry$$00000004 0x08000330 Section 6 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__rt_lib_shutdown_fp_trap_1 0x0800032f Thumb Code 0 libshutdown2.o(.ARM.Collect$$libshutdown$$00000007) + __rt_lib_shutdown_heap_1 0x0800032f Thumb Code 0 libshutdown2.o(.ARM.Collect$$libshutdown$$0000000F) + __rt_lib_shutdown_return 0x0800032f Thumb Code 0 libshutdown2.o(.ARM.Collect$$libshutdown$$00000010) + __rt_lib_shutdown_signal_1 0x0800032f Thumb Code 0 libshutdown2.o(.ARM.Collect$$libshutdown$$0000000A) + __rt_lib_shutdown_stdio_1 0x0800032f Thumb Code 0 libshutdown2.o(.ARM.Collect$$libshutdown$$00000004) + __rt_lib_shutdown_user_alloc_1 0x0800032f Thumb Code 0 libshutdown2.o(.ARM.Collect$$libshutdown$$0000000C) + __rt_entry 0x08000331 Thumb Code 0 __rtentry.o(.ARM.Collect$$rtentry$$00000000) + __rt_entry_presh_1 0x08000331 Thumb Code 0 __rtentry2.o(.ARM.Collect$$rtentry$$00000002) + __rt_entry_sh 0x08000331 Thumb Code 0 __rtentry4.o(.ARM.Collect$$rtentry$$00000004) + __rt_entry_li 0x08000337 Thumb Code 0 __rtentry2.o(.ARM.Collect$$rtentry$$0000000A) + __rt_entry_postsh_1 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startup_stm32g474xx.o(.text) + SVC_Handler 0x08000363 Thumb Code 2 startup_stm32g474xx.o(.text) + DebugMon_Handler 0x08000365 Thumb Code 2 startup_stm32g474xx.o(.text) + PendSV_Handler 0x08000367 Thumb Code 2 startup_stm32g474xx.o(.text) + ADC1_2_IRQHandler 0x0800036b Thumb Code 0 startup_stm32g474xx.o(.text) + ADC3_IRQHandler 0x0800036b Thumb Code 0 startup_stm32g474xx.o(.text) + ADC4_IRQHandler 0x0800036b Thumb Code 0 startup_stm32g474xx.o(.text) + ADC5_IRQHandler 0x0800036b Thumb Code 0 startup_stm32g474xx.o(.text) + COMP1_2_3_IRQHandler 0x0800036b Thumb Code 0 startup_stm32g474xx.o(.text) + COMP4_5_6_IRQHandler 0x0800036b Thumb Code 0 startup_stm32g474xx.o(.text) + COMP7_IRQHandler 0x0800036b Thumb Code 0 startup_stm32g474xx.o(.text) + CORDIC_IRQHandler 0x0800036b Thumb Code 0 startup_stm32g474xx.o(.text) + CRS_IRQHandler 0x0800036b Thumb Code 0 startup_stm32g474xx.o(.text) + DMA1_Channel1_IRQHandler 0x0800036b Thumb Code 0 startup_stm32g474xx.o(.text) + DMA1_Channel2_IRQHandler 0x0800036b Thumb Code 0 startup_stm32g474xx.o(.text) + DMA1_Channel3_IRQHandler 0x0800036b Thumb Code 0 startup_stm32g474xx.o(.text) + DMA1_Channel4_IRQHandler 0x0800036b Thumb Code 0 startup_stm32g474xx.o(.text) + DMA1_Channel5_IRQHandler 0x0800036b Thumb Code 0 startup_stm32g474xx.o(.text) + DMA1_Channel6_IRQHandler 0x0800036b Thumb Code 0 startup_stm32g474xx.o(.text) + DMA1_Channel7_IRQHandler 0x0800036b Thumb Code 0 startup_stm32g474xx.o(.text) + DMA1_Channel8_IRQHandler 0x0800036b Thumb Code 0 startup_stm32g474xx.o(.text) + DMA2_Channel1_IRQHandler 0x0800036b Thumb Code 0 startup_stm32g474xx.o(.text) + DMA2_Channel2_IRQHandler 0x0800036b Thumb Code 0 startup_stm32g474xx.o(.text) + DMA2_Channel3_IRQHandler 0x0800036b Thumb Code 0 startup_stm32g474xx.o(.text) + DMA2_Channel4_IRQHandler 0x0800036b Thumb Code 0 startup_stm32g474xx.o(.text) + DMA2_Channel5_IRQHandler 0x0800036b Thumb Code 0 startup_stm32g474xx.o(.text) + DMA2_Channel6_IRQHandler 0x0800036b Thumb Code 0 startup_stm32g474xx.o(.text) + DMA2_Channel7_IRQHandler 0x0800036b Thumb Code 0 startup_stm32g474xx.o(.text) + DMA2_Channel8_IRQHandler 0x0800036b Thumb Code 0 startup_stm32g474xx.o(.text) + DMAMUX_OVR_IRQHandler 0x0800036b Thumb Code 0 startup_stm32g474xx.o(.text) + EXTI0_IRQHandler 0x0800036b Thumb Code 0 startup_stm32g474xx.o(.text) + EXTI15_10_IRQHandler 0x0800036b Thumb Code 0 startup_stm32g474xx.o(.text) + EXTI1_IRQHandler 0x0800036b Thumb Code 0 startup_stm32g474xx.o(.text) + EXTI2_IRQHandler 0x0800036b Thumb Code 0 startup_stm32g474xx.o(.text) + EXTI3_IRQHandler 0x0800036b Thumb Code 0 startup_stm32g474xx.o(.text) + EXTI4_IRQHandler 0x0800036b Thumb Code 0 startup_stm32g474xx.o(.text) + EXTI9_5_IRQHandler 0x0800036b Thumb Code 0 startup_stm32g474xx.o(.text) + FDCAN1_IT0_IRQHandler 0x0800036b Thumb Code 0 startup_stm32g474xx.o(.text) + FDCAN1_IT1_IRQHandler 0x0800036b Thumb Code 0 startup_stm32g474xx.o(.text) + FDCAN2_IT0_IRQHandler 0x0800036b Thumb Code 0 startup_stm32g474xx.o(.text) + FDCAN2_IT1_IRQHandler 0x0800036b Thumb Code 0 startup_stm32g474xx.o(.text) + FDCAN3_IT0_IRQHandler 0x0800036b Thumb Code 0 startup_stm32g474xx.o(.text) + FDCAN3_IT1_IRQHandler 0x0800036b Thumb Code 0 startup_stm32g474xx.o(.text) + FLASH_IRQHandler 0x0800036b Thumb Code 0 startup_stm32g474xx.o(.text) + FMAC_IRQHandler 0x0800036b Thumb Code 0 startup_stm32g474xx.o(.text) + FMC_IRQHandler 0x0800036b Thumb Code 0 startup_stm32g474xx.o(.text) + FPU_IRQHandler 0x0800036b Thumb Code 0 startup_stm32g474xx.o(.text) + HRTIM1_FLT_IRQHandler 0x0800036b Thumb Code 0 startup_stm32g474xx.o(.text) + HRTIM1_Master_IRQHandler 0x0800036b Thumb Code 0 startup_stm32g474xx.o(.text) + HRTIM1_TIMA_IRQHandler 0x0800036b Thumb Code 0 startup_stm32g474xx.o(.text) + HRTIM1_TIMB_IRQHandler 0x0800036b Thumb Code 0 startup_stm32g474xx.o(.text) + HRTIM1_TIMC_IRQHandler 0x0800036b Thumb Code 0 startup_stm32g474xx.o(.text) + HRTIM1_TIMD_IRQHandler 0x0800036b Thumb Code 0 startup_stm32g474xx.o(.text) + HRTIM1_TIME_IRQHandler 0x0800036b Thumb Code 0 startup_stm32g474xx.o(.text) + HRTIM1_TIMF_IRQHandler 0x0800036b Thumb Code 0 startup_stm32g474xx.o(.text) + I2C1_ER_IRQHandler 0x0800036b Thumb Code 0 startup_stm32g474xx.o(.text) + I2C1_EV_IRQHandler 0x0800036b Thumb Code 0 startup_stm32g474xx.o(.text) + I2C2_ER_IRQHandler 0x0800036b Thumb Code 0 startup_stm32g474xx.o(.text) + I2C2_EV_IRQHandler 0x0800036b Thumb Code 0 startup_stm32g474xx.o(.text) + I2C3_ER_IRQHandler 0x0800036b Thumb Code 0 startup_stm32g474xx.o(.text) + I2C3_EV_IRQHandler 0x0800036b Thumb Code 0 startup_stm32g474xx.o(.text) + I2C4_ER_IRQHandler 0x0800036b Thumb Code 0 startup_stm32g474xx.o(.text) + I2C4_EV_IRQHandler 0x0800036b Thumb Code 0 startup_stm32g474xx.o(.text) + LPTIM1_IRQHandler 0x0800036b Thumb Code 0 startup_stm32g474xx.o(.text) + LPUART1_IRQHandler 0x0800036b Thumb Code 0 startup_stm32g474xx.o(.text) + PVD_PVM_IRQHandler 0x0800036b Thumb Code 0 startup_stm32g474xx.o(.text) + QUADSPI_IRQHandler 0x0800036b Thumb Code 0 startup_stm32g474xx.o(.text) + RCC_IRQHandler 0x0800036b Thumb Code 0 startup_stm32g474xx.o(.text) + RNG_IRQHandler 0x0800036b Thumb Code 0 startup_stm32g474xx.o(.text) + RTC_Alarm_IRQHandler 0x0800036b Thumb Code 0 startup_stm32g474xx.o(.text) + RTC_TAMP_LSECSS_IRQHandler 0x0800036b Thumb Code 0 startup_stm32g474xx.o(.text) + RTC_WKUP_IRQHandler 0x0800036b Thumb Code 0 startup_stm32g474xx.o(.text) + SAI1_IRQHandler 0x0800036b Thumb Code 0 startup_stm32g474xx.o(.text) + SPI1_IRQHandler 0x0800036b Thumb Code 0 startup_stm32g474xx.o(.text) + SPI2_IRQHandler 0x0800036b Thumb Code 0 startup_stm32g474xx.o(.text) + SPI3_IRQHandler 0x0800036b Thumb Code 0 startup_stm32g474xx.o(.text) + SPI4_IRQHandler 0x0800036b Thumb Code 0 startup_stm32g474xx.o(.text) + TIM1_BRK_TIM15_IRQHandler 0x0800036b Thumb Code 0 startup_stm32g474xx.o(.text) + TIM1_CC_IRQHandler 0x0800036b Thumb Code 0 startup_stm32g474xx.o(.text) + TIM1_TRG_COM_TIM17_IRQHandler 0x0800036b Thumb Code 0 startup_stm32g474xx.o(.text) + TIM1_UP_TIM16_IRQHandler 0x0800036b Thumb Code 0 startup_stm32g474xx.o(.text) + TIM20_BRK_IRQHandler 0x0800036b Thumb Code 0 startup_stm32g474xx.o(.text) + TIM20_CC_IRQHandler 0x0800036b Thumb Code 0 startup_stm32g474xx.o(.text) + TIM20_TRG_COM_IRQHandler 0x0800036b Thumb Code 0 startup_stm32g474xx.o(.text) + TIM20_UP_IRQHandler 0x0800036b Thumb Code 0 startup_stm32g474xx.o(.text) + TIM2_IRQHandler 0x0800036b Thumb Code 0 startup_stm32g474xx.o(.text) + TIM3_IRQHandler 0x0800036b Thumb Code 0 startup_stm32g474xx.o(.text) + TIM4_IRQHandler 0x0800036b Thumb Code 0 startup_stm32g474xx.o(.text) + TIM5_IRQHandler 0x0800036b Thumb Code 0 startup_stm32g474xx.o(.text) + TIM6_DAC_IRQHandler 0x0800036b Thumb Code 0 startup_stm32g474xx.o(.text) + TIM7_DAC_IRQHandler 0x0800036b Thumb Code 0 startup_stm32g474xx.o(.text) + TIM8_BRK_IRQHandler 0x0800036b Thumb Code 0 startup_stm32g474xx.o(.text) + TIM8_CC_IRQHandler 0x0800036b Thumb Code 0 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__fplib_config_pureend_doubles 0x08002da5 Thumb Code 0 fpinit.o(x$fpl$fpinit) + _printf_fp_dec 0x08002da7 Thumb Code 4 printf1.o(x$fpl$printf1) + _printf_fp_hex 0x08002dab Thumb Code 4 printf2.o(x$fpl$printf2) + __I$use$fp 0x08002dae Number 0 usenofp.o(x$fpl$usenofp) + AHBPrescTable 0x08002eac Data 16 system_stm32g4xx.o(.rodata.AHBPrescTable) + Region$$Table$$Base 0x08003050 Number 0 anon$$obj.o(Region$$Table) + Region$$Table$$Limit 0x08003070 Number 0 anon$$obj.o(Region$$Table) + __ctype 0x08003099 Data 0 lc_ctype_c.o(locale$$data) + SystemCoreClock 0x20000000 Data 4 system_stm32g4xx.o(.data.SystemCoreClock) + __libspace_start 0x20000010 Data 96 libspace.o(.bss) + __stdout 0x20000070 Data 84 retarget.o(.bss.__stdout) + __temporary_stack_top$libspace 0x20000070 Data 0 libspace.o(.bss) + + + +============================================================================== + +Memory Map of the image + + Image Entry point : 0x080001d9 + + Load Region LR_IROM1 (Base: 0x08000000, Size: 0x000031b0, Max: 0x00080000, ABSOLUTE) + + Execution Region ER_IROM1 (Exec base: 0x08000000, Load base: 0x08000000, Size: 0x0000319c, Max: 0x00080000, ABSOLUTE) + + Exec Addr Load Addr Size Type Attr Idx E Section Name Object + + 0x08000000 0x08000000 0x000001d8 Data RO 3 RESET startup_stm32g474xx.o + 0x080001d8 0x080001d8 0x00000008 Code RO 169 * !!!main c_w.l(__main.o) + 0x080001e0 0x080001e0 0x0000005c Code RO 512 !!!scatter c_w.l(__scatter.o) + 0x0800023c 0x0800023c 0x0000001a Code RO 516 !!handler_copy c_w.l(__scatter_copy.o) + 0x08000256 0x08000256 0x00000002 PAD + 0x08000258 0x08000258 0x00000002 Code RO 513 !!handler_null c_w.l(__scatter.o) + 0x0800025a 0x0800025a 0x00000002 PAD + 0x0800025c 0x0800025c 0x0000001c Code RO 518 !!handler_zi c_w.l(__scatter_zi.o) + 0x08000278 0x08000278 0x00000000 Code RO 257 .ARM.Collect$$_printf_percent$$00000000 c_w.l(_printf_percent.o) + 0x08000278 0x08000278 0x00000006 Code RO 246 .ARM.Collect$$_printf_percent$$00000001 c_w.l(_printf_n.o) + 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.text.hrtim1_wait_dll_ready dcdc.o + 0x0800217c 0x0800217c 0x00000042 Code RO 81 .text.hrtim_max_duty_ticks dcdc.o + 0x080021be 0x080021be 0x00000002 PAD + 0x080021c0 0x080021c0 0x0000007a Code RO 105 .text.hrtim_period_from_clock dcdc.o + 0x0800223a 0x0800223a 0x00000002 PAD + 0x0800223c 0x0800223c 0x0000004a Code RO 71 .text.latch_fault dcdc.o + 0x08002286 0x08002286 0x00000002 PAD + 0x08002288 0x08002288 0x0000016a Code RO 11 .text.main main.o + 0x080023f2 0x080023f2 0x00000002 PAD + 0x080023f4 0x080023f4 0x0000001e Code RO 89 .text.sense_mv_to_current_ma dcdc.o + 0x08002412 0x08002412 0x00000002 PAD + 0x08002414 0x08002414 0x00000022 Code RO 87 .text.sense_mv_to_voltage_mv dcdc.o + 0x08002436 0x08002436 0x00000002 PAD + 0x08002438 0x08002438 0x00000010 Code RO 61 .text.set_loads_off dcdc.o + 0x08002448 0x08002448 0x00000030 Code RO 59 .text.set_usbpd_input_switch dcdc.o + 0x08002478 0x08002478 0x0000004a Code RO 39 .text.wait_mask_clear board.o + 0x080024c2 0x080024c2 0x00000002 PAD + 0x080024c4 0x080024c4 0x0000004e Code RO 43 .text.wait_mask_set board.o + 0x08002512 0x08002512 0x00000002 PAD + 0x08002514 0x08002514 0x00000050 Code RO 45 .text.wait_mask_value board.o + 0x08002564 0x08002564 0x0000003e Code RO 332 CL$$btod_d2e c_w.l(btod.o) + 0x080025a2 0x080025a2 0x00000046 Code RO 334 CL$$btod_d2e_denorm_low c_w.l(btod.o) + 0x080025e8 0x080025e8 0x00000060 Code RO 333 CL$$btod_d2e_norm_op1 c_w.l(btod.o) + 0x08002648 0x08002648 0x00000338 Code RO 342 CL$$btod_div_common c_w.l(btod.o) + 0x08002980 0x08002980 0x000000dc Code RO 339 CL$$btod_e2e c_w.l(btod.o) + 0x08002a5c 0x08002a5c 0x0000002a Code RO 336 CL$$btod_ediv c_w.l(btod.o) + 0x08002a86 0x08002a86 0x0000002a Code RO 335 CL$$btod_emul c_w.l(btod.o) + 0x08002ab0 0x08002ab0 0x00000244 Code RO 341 CL$$btod_mult_common c_w.l(btod.o) + 0x08002cf4 0x08002cf4 0x00000030 Code RO 374 i.__ARM_fpclassify m_wm.l(fpclassify.o) + 0x08002d24 0x08002d24 0x0000000e Code RO 234 i._is_digit c_w.l(__printf_wp.o) + 0x08002d32 0x08002d32 0x00000002 PAD + 0x08002d34 0x08002d34 0x0000002c Code RO 357 locale$$code c_w.l(lc_numeric_c.o) + 0x08002d60 0x08002d60 0x0000002c Code RO 386 locale$$code c_w.l(lc_ctype_c.o) + 0x08002d8c 0x08002d8c 0x0000001a Code RO 456 x$fpl$fpinit fz_wm.l(fpinit.o) + 0x08002da6 0x08002da6 0x00000004 Code RO 267 x$fpl$printf1 fz_wm.l(printf1.o) + 0x08002daa 0x08002daa 0x00000004 Code RO 269 x$fpl$printf2 fz_wm.l(printf2.o) + 0x08002dae 0x08002dae 0x00000000 Code RO 373 x$fpl$usenofp fz_wm.l(usenofp.o) + 0x08002dae 0x08002dae 0x00000002 PAD + 0x08002db0 0x08002db0 0x00000008 Data RO 193 .constdata c_w.l(_printf_wctomb.o) + 0x08002db8 0x08002db8 0x00000028 Data RO 222 .constdata c_w.l(_printf_hex_int_ll_ptr.o) + 0x08002de0 0x08002de0 0x00000011 Data RO 242 .constdata c_w.l(__printf_flags_ss_wp.o) + 0x08002df1 0x08002df1 0x00000026 Data RO 301 .constdata c_w.l(_printf_fp_hex.o) + 0x08002e17 0x08002e17 0x00000001 PAD + 0x08002e18 0x08002e18 0x00000094 Data RO 330 .constdata c_w.l(bigflt0.o) + 0x08002eac 0x08002eac 0x00000010 Data RO 151 .rodata.AHBPrescTable system_stm32g4xx.o + 0x08002ebc 0x08002ebc 0x0000012a Data RO 13 .rodata.str1.1 main.o + 0x08002fe6 0x08002fe6 0x00000069 Data RO 115 .rodata.str1.1 dcdc.o + 0x0800304f 0x0800304f 0x00000001 PAD + 0x08003050 0x08003050 0x00000020 Data RO 511 Region$$Table anon$$obj.o + 0x08003070 0x08003070 0x0000001c Data RO 356 locale$$data c_w.l(lc_numeric_c.o) + 0x0800308c 0x0800308c 0x00000110 Data RO 385 locale$$data c_w.l(lc_ctype_c.o) + + + Execution Region RW_IRAM1 (Exec base: 0x20000000, Load base: 0x080031a0, Size: 0x000006d8, Max: 0x00020000, ABSOLUTE) + + Exec Addr Load Addr Size Type Attr Idx E Section Name Object + + 0x20000000 0x080031a0 0x00000004 Data RW 150 .data.SystemCoreClock system_stm32g4xx.o + 0x20000004 0x080031a4 0x00000004 Data RW 114 .data.s_duty_ticks dcdc.o + 0x20000008 0x080031a8 0x00000004 Data RW 113 .data.s_period_ticks dcdc.o + 0x2000000c 0x080031ac 0x00000004 PAD + 0x20000010 - 0x00000060 Zero RW 377 .bss c_w.l(libspace.o) + 0x20000070 - 0x00000054 Zero RW 137 .bss.__stdout retarget.o + 0x200000c4 - 0x00000001 Zero RW 111 .bss.s_fault dcdc.o + 0x200000c5 - 0x00000001 Zero RW 109 .bss.s_hrtim_ready dcdc.o + 0x200000c6 0x080031ac 0x00000002 PAD + 0x200000c8 - 0x00000004 Zero RW 112 .bss.s_integrator_ticks dcdc.o + 0x200000cc - 0x00000004 Zero RW 47 .bss.s_ms_ticks board.o + 0x200000d0 - 0x00000001 Zero RW 110 .bss.s_state dcdc.o + 0x200000d1 0x080031ac 0x00000007 PAD + 0x200000d8 - 0x00000200 Zero RW 2 HEAP startup_stm32g474xx.o + 0x200002d8 - 0x00000400 Zero RW 1 STACK startup_stm32g474xx.o + + +============================================================================== + +Image component sizes + + + Code (inc. data) RO Data RW Data ZI Data Debug Object Name + + 934 0 0 0 4 8239 board.o + 2178 10 105 8 7 9738 dcdc.o + 362 0 298 0 0 1407 main.o + 310 0 0 0 84 3260 retarget.o + 64 26 472 0 1536 1048 startup_stm32g474xx.o + 238 0 16 4 0 2925 system_stm32g4xx.o + + ---------------------------------------------------------------------- + 4136 36 924 12 1644 26617 Object Totals + 0 0 32 0 0 0 (incl. Generated) + 50 0 1 0 13 0 (incl. Padding) + + ---------------------------------------------------------------------- + + Code (inc. data) RO Data RW Data ZI Data Debug Library Member Name + + 8 0 0 0 0 68 __main.o + 392 4 17 0 0 92 __printf_flags_ss_wp.o + 14 0 0 0 0 68 __printf_wp.o + 0 0 0 0 0 0 __rtentry.o + 12 0 0 0 0 0 __rtentry2.o + 6 0 0 0 0 0 __rtentry4.o + 94 8 0 0 0 0 __scatter.o + 26 0 0 0 0 0 __scatter_copy.o + 28 0 0 0 0 0 __scatter_zi.o + 72 0 0 0 0 96 _c16rtomb.o + 6 0 0 0 0 0 _printf_a.o + 6 0 0 0 0 0 _printf_c.o + 44 0 0 0 0 108 _printf_char.o + 48 6 0 0 0 96 _printf_char_common.o + 36 4 0 0 0 80 _printf_char_file.o + 40 0 0 0 0 68 _printf_charcount.o + 6 0 0 0 0 0 _printf_d.o + 120 16 0 0 0 92 _printf_dec.o + 6 0 0 0 0 0 _printf_e.o + 6 0 0 0 0 0 _printf_f.o + 1052 0 0 0 0 148 _printf_fp_dec.o + 764 8 38 0 0 100 _printf_fp_hex.o + 128 16 0 0 0 84 _printf_fp_infnan.o + 6 0 0 0 0 0 _printf_g.o + 148 4 40 0 0 160 _printf_hex_int_ll_ptr.o + 6 0 0 0 0 0 _printf_i.o + 178 0 0 0 0 88 _printf_intcommon.o + 10 0 0 0 0 0 _printf_l.o + 6 0 0 0 0 0 _printf_lc.o + 10 0 0 0 0 0 _printf_ll.o + 6 0 0 0 0 0 _printf_lld.o + 6 0 0 0 0 0 _printf_lli.o + 6 0 0 0 0 0 _printf_llo.o + 6 0 0 0 0 0 _printf_llu.o + 6 0 0 0 0 0 _printf_llx.o + 124 16 0 0 0 92 _printf_longlong_dec.o + 6 0 0 0 0 0 _printf_ls.o + 6 0 0 0 0 0 _printf_n.o + 6 0 0 0 0 0 _printf_o.o + 112 8 0 0 0 124 _printf_oct_int_ll.o + 6 0 0 0 0 0 _printf_p.o + 78 0 0 0 0 108 _printf_pad.o + 0 0 0 0 0 0 _printf_percent.o + 4 0 0 0 0 0 _printf_percent_end.o + 6 0 0 0 0 0 _printf_s.o + 82 0 0 0 0 80 _printf_str.o + 36 0 0 0 0 84 _printf_truncate.o + 6 0 0 0 0 0 _printf_u.o + 44 0 0 0 0 108 _printf_wchar.o + 188 6 8 0 0 92 _printf_wctomb.o + 6 0 0 0 0 0 _printf_x.o + 228 4 148 0 0 96 bigflt0.o + 1936 128 0 0 0 668 btod.o + 18 0 0 0 0 80 exit.o + 8 0 0 0 0 68 ferror.o + 6 0 0 0 0 152 heapauxi.o + 44 10 272 0 0 76 lc_ctype_c.o + 44 10 28 0 0 76 lc_numeric_c.o + 2 0 0 0 0 0 libinit.o + 34 0 0 0 0 0 libinit2.o + 2 0 0 0 0 0 libshutdown.o + 2 0 0 0 0 0 libshutdown2.o + 8 4 0 0 96 68 libspace.o + 138 0 0 0 0 80 lludiv10.o + 240 0 0 0 0 100 lludivv7m.o + 24 4 0 0 0 84 printf.o + 16 4 0 0 0 76 rt_ctype_table.o + 8 4 0 0 0 68 rt_locale_intlibspace.o + 2 0 0 0 0 0 rtexit.o + 10 0 0 0 0 0 rtexit2.o + 124 0 0 0 0 88 strcmpv7em.o + 74 0 0 0 0 80 sys_stackheap_outer.o + 2 0 0 0 0 68 use_no_semi.o + 2 0 0 0 0 68 use_no_semi_2.o + 26 0 0 0 0 116 fpinit.o + 4 0 0 0 0 116 printf1.o + 4 0 0 0 0 116 printf2.o + 0 0 0 0 0 0 usenofp.o + 48 0 0 0 0 124 fpclassify.o + + ---------------------------------------------------------------------- + 7088 264 552 0 96 4504 Library Totals + 16 0 1 0 0 0 (incl. Padding) + + ---------------------------------------------------------------------- + + Code (inc. data) RO Data RW Data ZI Data Debug Library Name + + 6990 264 551 0 96 4032 c_w.l + 34 0 0 0 0 348 fz_wm.l + 48 0 0 0 0 124 m_wm.l + + ---------------------------------------------------------------------- + 7088 264 552 0 96 4504 Library Totals + + ---------------------------------------------------------------------- + +============================================================================== + + + Code (inc. data) RO Data RW Data ZI Data Debug + + 11224 300 1476 12 1740 28777 Grand Totals + 11224 300 1476 12 1740 28777 ELF Image Totals + 11224 300 1476 12 0 0 ROM Totals + +============================================================================== + + Total RO Size (Code + RO Data) 12700 ( 12.40kB) + Total RW Size (RW Data + ZI Data) 1752 ( 1.71kB) + Total ROM Size (Code + RO Data + RW Data) 12712 ( 12.41kB) + +============================================================================== + diff --git a/B-G474E-DPOW1_Keil/Objects/B-G474E-DPOW1_DCDC.axf b/B-G474E-DPOW1_Keil/Objects/B-G474E-DPOW1_DCDC.axf new file mode 100644 index 0000000..1d3c864 Binary files /dev/null and b/B-G474E-DPOW1_Keil/Objects/B-G474E-DPOW1_DCDC.axf differ diff --git a/B-G474E-DPOW1_Keil/Objects/B-G474E-DPOW1_DCDC.build_log.htm b/B-G474E-DPOW1_Keil/Objects/B-G474E-DPOW1_DCDC.build_log.htm new file mode 100644 index 0000000..1bcb8b1 --- /dev/null +++ b/B-G474E-DPOW1_Keil/Objects/B-G474E-DPOW1_DCDC.build_log.htm @@ -0,0 +1,55 @@ + + +
+
�Vision Build Log
+
Tool Versions:
+IDE-Version: �Vision V5.41.0.0 +Copyright (C) 2024 ARM Ltd and ARM Germany GmbH. All rights reserved. +License Information: a s, d, LIC=SDA0P-MERAN-SB8EJ-U2W64-5KID0-PFBN3 + +Tool Versions: +Toolchain: MDK-ARM Plus Version: 5.41.0.0 +Toolchain Path: C:\Keil_v5_41\ARM\ARMCLANG\Bin +C Compiler: ArmClang.exe V6.22 +Assembler: Armasm.exe V6.22 +Linker/Locator: ArmLink.exe V6.22 +Library Manager: ArmAr.exe V6.22 +Hex Converter: FromElf.exe V6.22 +CPU DLL: SARMCM3.DLL V5.41.0.0 +Dialog DLL: DCM.DLL V1.17.5.0 +Target DLL: STLink\ST-LINKIII-KEIL_SWO.dll V3.3.0.0 +Dialog DLL: TCM.DLL V1.56.4.0 + +
Project:
+C:\Users\z\Documents\embedded\B-G474E-DPOW1_Keil\B-G474E-DPOW1_DCDC.uvprojx +Project File Date: 05/23/2026 + +
Output:
+*** Using Compiler 'V6.22', folder: 'C:\Keil_v5_41\ARM\ARMCLANG\Bin' +Rebuild target 'B-G474E-DPOW1_DCDC' +compiling retarget.c... +compiling main.c... +compiling system_stm32g4xx.c... +compiling dcdc.c... +assembling startup_stm32g474xx.s... +compiling board.c... +linking... +Program Size: Code=11224 RO-data=1476 RW-data=12 ZI-data=1740 +FromELF: creating hex file... +"Objects\B-G474E-DPOW1_DCDC.axf" - 0 Error(s), 0 Warning(s). + +
Software Packages used:
+ +Package Vendor: Keil + https://www.keil.com/pack/Keil.STM32G4xx_DFP.1.6.0.pack + Keil::STM32G4xx_DFP@1.6.0 + STMicroelectronics STM32G4 Series Device Support, Drivers and Examples + +
Collection of Component include folders:
+ C:/Keil_v5_41/ARM/Packs/Keil/STM32G4xx_DFP/1.6.0/Drivers/CMSIS/Device/ST/STM32G4xx/Include + +
Collection of Component Files used:
+Build Time Elapsed: 00:00:01 +
+ + diff --git a/B-G474E-DPOW1_Keil/Objects/B-G474E-DPOW1_DCDC.hex b/B-G474E-DPOW1_Keil/Objects/B-G474E-DPOW1_DCDC.hex new file mode 100644 index 0000000..31b8a64 --- /dev/null +++ b/B-G474E-DPOW1_Keil/Objects/B-G474E-DPOW1_DCDC.hex @@ -0,0 +1,798 @@ +:020000040800F2 +:10000000D806002051030008590300085B030008CC +:100010005D0300085F0300086103000800000000A2 +:100020000000000000000000000000006303000862 +:10003000650300080000000067030008B11A00080B +:100040006B0300086B0300086B0300086B030008D8 +:100050006B0300086B0300086B0300086B030008C8 +:100060006B0300086B0300086B0300086B030008B8 +:100070006B0300086B0300086B0300086B030008A8 +:100080006B0300086B0300086B0300086B03000898 +:100090006B0300086B0300086B0300086B03000888 +:1000A0006B0300086B0300086B0300086B03000878 +:1000B0006B0300086B0300086B0300086B03000868 +:1000C0006B0300086B0300086B0300086B03000858 +:1000D0006B0300086B0300086B0300086B03000848 +:1000E0006B0300086B0300086B0300086B03000838 +:1000F0006B0300086B0300086B0300086B03000828 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+:10312000000000000000000000000000000000009F +:10313000000000000000000000000000000000008F +:10314000000000000000000000000000000000007F +:10315000000000000000000000000000000000006F +:10316000000000000000000000000000000000005F +:10317000000000000000000000000000000000004F +:10318000000000000000000000000000000000003F +:10319000000000000000000000000000000000002F +:1031A0000024F40090010000406A000000000000CC +:04000005080001D915 +:00000001FF diff --git a/B-G474E-DPOW1_Keil/Objects/B-G474E-DPOW1_DCDC.htm b/B-G474E-DPOW1_Keil/Objects/B-G474E-DPOW1_DCDC.htm new file mode 100644 index 0000000..9f9d625 --- /dev/null +++ b/B-G474E-DPOW1_Keil/Objects/B-G474E-DPOW1_DCDC.htm @@ -0,0 +1,1668 @@ + + +Static Call Graph - [Objects\B-G474E-DPOW1_DCDC.axf] +
+
Static Call Graph for image Objects\B-G474E-DPOW1_DCDC.axf
+
#<CALLGRAPH># ARM Linker, 6220000: Last Updated: Sat May 23 17:51:30 2026 +
+
Maximum Stack Usage = 324 bytes + Unknown(Functions without stacksize, Cycles, Untraceable Function Pointers)
+Call chain for Maximum Stack Depth:
+_printf_f ⇒ _printf_fp_dec ⇒ _printf_fp_dec_real ⇒ _fp_digits ⇒ _btod_etento ⇒ _btod_emul ⇒ _e2e +
+
+Functions with no stack information +
+
__user_initial_stackheap +
+ +
+
+Mutually Recursive functions +

NMI_Handler   ⇒   NMI_Handler
+
HardFault_Handler   ⇒   HardFault_Handler
+
MemManage_Handler   ⇒   MemManage_Handler
+
BusFault_Handler   ⇒   BusFault_Handler
+
UsageFault_Handler   ⇒   UsageFault_Handler
+
SVC_Handler   ⇒   SVC_Handler
+
DebugMon_Handler   ⇒   DebugMon_Handler
+
PendSV_Handler   ⇒   PendSV_Handler
+
ADC1_2_IRQHandler   ⇒   ADC1_2_IRQHandler
+ +
+
+Function Pointers +
+
ADC1_2_IRQHandler from startup_stm32g474xx.o(.text) referenced from startup_stm32g474xx.o(RESET) +
ADC3_IRQHandler from startup_stm32g474xx.o(.text) referenced from startup_stm32g474xx.o(RESET) +
ADC4_IRQHandler from startup_stm32g474xx.o(.text) referenced from startup_stm32g474xx.o(RESET) +
ADC5_IRQHandler from startup_stm32g474xx.o(.text) referenced from startup_stm32g474xx.o(RESET) +
BusFault_Handler from startup_stm32g474xx.o(.text) referenced from startup_stm32g474xx.o(RESET) +
COMP1_2_3_IRQHandler from startup_stm32g474xx.o(.text) referenced from startup_stm32g474xx.o(RESET) +
COMP4_5_6_IRQHandler from startup_stm32g474xx.o(.text) referenced from startup_stm32g474xx.o(RESET) +
COMP7_IRQHandler from startup_stm32g474xx.o(.text) referenced from startup_stm32g474xx.o(RESET) +
CORDIC_IRQHandler from startup_stm32g474xx.o(.text) referenced from startup_stm32g474xx.o(RESET) +
CRS_IRQHandler from startup_stm32g474xx.o(.text) referenced from startup_stm32g474xx.o(RESET) +
DMA1_Channel1_IRQHandler from startup_stm32g474xx.o(.text) referenced from startup_stm32g474xx.o(RESET) +
DMA1_Channel2_IRQHandler from startup_stm32g474xx.o(.text) referenced from startup_stm32g474xx.o(RESET) +
DMA1_Channel3_IRQHandler from startup_stm32g474xx.o(.text) referenced from startup_stm32g474xx.o(RESET) +
DMA1_Channel4_IRQHandler from startup_stm32g474xx.o(.text) referenced from startup_stm32g474xx.o(RESET) +
DMA1_Channel5_IRQHandler from startup_stm32g474xx.o(.text) referenced from startup_stm32g474xx.o(RESET) +
DMA1_Channel6_IRQHandler from startup_stm32g474xx.o(.text) referenced from startup_stm32g474xx.o(RESET) +
DMA1_Channel7_IRQHandler from startup_stm32g474xx.o(.text) referenced from startup_stm32g474xx.o(RESET) +
DMA1_Channel8_IRQHandler from startup_stm32g474xx.o(.text) referenced from startup_stm32g474xx.o(RESET) +
DMA2_Channel1_IRQHandler from startup_stm32g474xx.o(.text) referenced from startup_stm32g474xx.o(RESET) +
DMA2_Channel2_IRQHandler from startup_stm32g474xx.o(.text) referenced from startup_stm32g474xx.o(RESET) +
DMA2_Channel3_IRQHandler from startup_stm32g474xx.o(.text) referenced from startup_stm32g474xx.o(RESET) +
DMA2_Channel4_IRQHandler from startup_stm32g474xx.o(.text) referenced from startup_stm32g474xx.o(RESET) +
DMA2_Channel5_IRQHandler from startup_stm32g474xx.o(.text) referenced from startup_stm32g474xx.o(RESET) +
DMA2_Channel6_IRQHandler from startup_stm32g474xx.o(.text) referenced from startup_stm32g474xx.o(RESET) +
DMA2_Channel7_IRQHandler from startup_stm32g474xx.o(.text) referenced from startup_stm32g474xx.o(RESET) +
DMA2_Channel8_IRQHandler from startup_stm32g474xx.o(.text) referenced from startup_stm32g474xx.o(RESET) +
DMAMUX_OVR_IRQHandler from startup_stm32g474xx.o(.text) referenced from startup_stm32g474xx.o(RESET) +
DebugMon_Handler from startup_stm32g474xx.o(.text) referenced from startup_stm32g474xx.o(RESET) +
EXTI0_IRQHandler from startup_stm32g474xx.o(.text) referenced from startup_stm32g474xx.o(RESET) +
EXTI15_10_IRQHandler from startup_stm32g474xx.o(.text) referenced from startup_stm32g474xx.o(RESET) +
EXTI1_IRQHandler from startup_stm32g474xx.o(.text) referenced from startup_stm32g474xx.o(RESET) +
EXTI2_IRQHandler from startup_stm32g474xx.o(.text) referenced from startup_stm32g474xx.o(RESET) +
EXTI3_IRQHandler from startup_stm32g474xx.o(.text) referenced from startup_stm32g474xx.o(RESET) +
EXTI4_IRQHandler from startup_stm32g474xx.o(.text) referenced from startup_stm32g474xx.o(RESET) +
EXTI9_5_IRQHandler from startup_stm32g474xx.o(.text) referenced from startup_stm32g474xx.o(RESET) +
FDCAN1_IT0_IRQHandler from startup_stm32g474xx.o(.text) referenced from startup_stm32g474xx.o(RESET) +
FDCAN1_IT1_IRQHandler from startup_stm32g474xx.o(.text) referenced from startup_stm32g474xx.o(RESET) +
FDCAN2_IT0_IRQHandler from startup_stm32g474xx.o(.text) referenced from startup_stm32g474xx.o(RESET) +
FDCAN2_IT1_IRQHandler from startup_stm32g474xx.o(.text) referenced from startup_stm32g474xx.o(RESET) +
FDCAN3_IT0_IRQHandler from startup_stm32g474xx.o(.text) referenced from startup_stm32g474xx.o(RESET) +
FDCAN3_IT1_IRQHandler from startup_stm32g474xx.o(.text) referenced from startup_stm32g474xx.o(RESET) +
FLASH_IRQHandler from startup_stm32g474xx.o(.text) referenced from startup_stm32g474xx.o(RESET) +
FMAC_IRQHandler from startup_stm32g474xx.o(.text) referenced from startup_stm32g474xx.o(RESET) +
FMC_IRQHandler from startup_stm32g474xx.o(.text) referenced from startup_stm32g474xx.o(RESET) +
FPU_IRQHandler from startup_stm32g474xx.o(.text) referenced from startup_stm32g474xx.o(RESET) +
HRTIM1_FLT_IRQHandler from startup_stm32g474xx.o(.text) referenced from startup_stm32g474xx.o(RESET) +
HRTIM1_Master_IRQHandler from startup_stm32g474xx.o(.text) referenced from startup_stm32g474xx.o(RESET) +
HRTIM1_TIMA_IRQHandler from startup_stm32g474xx.o(.text) referenced from startup_stm32g474xx.o(RESET) +
HRTIM1_TIMB_IRQHandler from startup_stm32g474xx.o(.text) referenced from startup_stm32g474xx.o(RESET) +
HRTIM1_TIMC_IRQHandler from startup_stm32g474xx.o(.text) referenced from startup_stm32g474xx.o(RESET) +
HRTIM1_TIMD_IRQHandler from startup_stm32g474xx.o(.text) referenced from startup_stm32g474xx.o(RESET) +
HRTIM1_TIME_IRQHandler from startup_stm32g474xx.o(.text) referenced from startup_stm32g474xx.o(RESET) +
HRTIM1_TIMF_IRQHandler from startup_stm32g474xx.o(.text) referenced from startup_stm32g474xx.o(RESET) +
HardFault_Handler from startup_stm32g474xx.o(.text) referenced from startup_stm32g474xx.o(RESET) +
I2C1_ER_IRQHandler from startup_stm32g474xx.o(.text) referenced from startup_stm32g474xx.o(RESET) +
I2C1_EV_IRQHandler from startup_stm32g474xx.o(.text) referenced from startup_stm32g474xx.o(RESET) +
I2C2_ER_IRQHandler from startup_stm32g474xx.o(.text) referenced from startup_stm32g474xx.o(RESET) +
I2C2_EV_IRQHandler from startup_stm32g474xx.o(.text) referenced from startup_stm32g474xx.o(RESET) +
I2C3_ER_IRQHandler from startup_stm32g474xx.o(.text) referenced from startup_stm32g474xx.o(RESET) +
I2C3_EV_IRQHandler from startup_stm32g474xx.o(.text) referenced from startup_stm32g474xx.o(RESET) +
I2C4_ER_IRQHandler from startup_stm32g474xx.o(.text) referenced from startup_stm32g474xx.o(RESET) +
I2C4_EV_IRQHandler from startup_stm32g474xx.o(.text) referenced from startup_stm32g474xx.o(RESET) +
LPTIM1_IRQHandler from startup_stm32g474xx.o(.text) referenced from startup_stm32g474xx.o(RESET) +
LPUART1_IRQHandler from startup_stm32g474xx.o(.text) referenced from startup_stm32g474xx.o(RESET) +
MemManage_Handler from startup_stm32g474xx.o(.text) referenced from startup_stm32g474xx.o(RESET) +
NMI_Handler from startup_stm32g474xx.o(.text) referenced from startup_stm32g474xx.o(RESET) +
PVD_PVM_IRQHandler from startup_stm32g474xx.o(.text) referenced from startup_stm32g474xx.o(RESET) +
PendSV_Handler from startup_stm32g474xx.o(.text) referenced from startup_stm32g474xx.o(RESET) +
QUADSPI_IRQHandler from startup_stm32g474xx.o(.text) referenced from startup_stm32g474xx.o(RESET) +
RCC_IRQHandler from startup_stm32g474xx.o(.text) referenced from startup_stm32g474xx.o(RESET) +
RNG_IRQHandler from startup_stm32g474xx.o(.text) referenced from startup_stm32g474xx.o(RESET) +
RTC_Alarm_IRQHandler from startup_stm32g474xx.o(.text) referenced from startup_stm32g474xx.o(RESET) +
RTC_TAMP_LSECSS_IRQHandler from startup_stm32g474xx.o(.text) referenced from startup_stm32g474xx.o(RESET) +
RTC_WKUP_IRQHandler from startup_stm32g474xx.o(.text) referenced from startup_stm32g474xx.o(RESET) +
Reset_Handler from startup_stm32g474xx.o(.text) referenced from startup_stm32g474xx.o(RESET) +
SAI1_IRQHandler from startup_stm32g474xx.o(.text) referenced from startup_stm32g474xx.o(RESET) +
SPI1_IRQHandler from startup_stm32g474xx.o(.text) referenced from startup_stm32g474xx.o(RESET) +
SPI2_IRQHandler from startup_stm32g474xx.o(.text) referenced from startup_stm32g474xx.o(RESET) +
SPI3_IRQHandler from startup_stm32g474xx.o(.text) referenced from startup_stm32g474xx.o(RESET) +
SPI4_IRQHandler from startup_stm32g474xx.o(.text) referenced from startup_stm32g474xx.o(RESET) +
SVC_Handler from startup_stm32g474xx.o(.text) referenced from startup_stm32g474xx.o(RESET) +
SysTick_Handler from board.o(.text.SysTick_Handler) referenced from startup_stm32g474xx.o(RESET) +
SystemInit from system_stm32g4xx.o(.text.SystemInit) referenced from startup_stm32g474xx.o(.text) +
TIM1_BRK_TIM15_IRQHandler from startup_stm32g474xx.o(.text) referenced from startup_stm32g474xx.o(RESET) +
TIM1_CC_IRQHandler from startup_stm32g474xx.o(.text) referenced from startup_stm32g474xx.o(RESET) +
TIM1_TRG_COM_TIM17_IRQHandler from startup_stm32g474xx.o(.text) referenced from startup_stm32g474xx.o(RESET) +
TIM1_UP_TIM16_IRQHandler from startup_stm32g474xx.o(.text) referenced from startup_stm32g474xx.o(RESET) +
TIM20_BRK_IRQHandler from startup_stm32g474xx.o(.text) referenced from startup_stm32g474xx.o(RESET) +
TIM20_CC_IRQHandler from startup_stm32g474xx.o(.text) referenced from startup_stm32g474xx.o(RESET) +
TIM20_TRG_COM_IRQHandler from startup_stm32g474xx.o(.text) referenced from startup_stm32g474xx.o(RESET) +
TIM20_UP_IRQHandler from startup_stm32g474xx.o(.text) referenced from startup_stm32g474xx.o(RESET) +
TIM2_IRQHandler from startup_stm32g474xx.o(.text) referenced from startup_stm32g474xx.o(RESET) +
TIM3_IRQHandler from startup_stm32g474xx.o(.text) referenced from startup_stm32g474xx.o(RESET) +
TIM4_IRQHandler from startup_stm32g474xx.o(.text) referenced from startup_stm32g474xx.o(RESET) +
TIM5_IRQHandler from startup_stm32g474xx.o(.text) referenced from startup_stm32g474xx.o(RESET) +
TIM6_DAC_IRQHandler from startup_stm32g474xx.o(.text) referenced from startup_stm32g474xx.o(RESET) +
TIM7_DAC_IRQHandler from startup_stm32g474xx.o(.text) referenced from startup_stm32g474xx.o(RESET) +
TIM8_BRK_IRQHandler from startup_stm32g474xx.o(.text) referenced from startup_stm32g474xx.o(RESET) +
TIM8_CC_IRQHandler from startup_stm32g474xx.o(.text) referenced from startup_stm32g474xx.o(RESET) +
TIM8_TRG_COM_IRQHandler from startup_stm32g474xx.o(.text) referenced from startup_stm32g474xx.o(RESET) +
TIM8_UP_IRQHandler from startup_stm32g474xx.o(.text) referenced from startup_stm32g474xx.o(RESET) +
UART4_IRQHandler from startup_stm32g474xx.o(.text) referenced from startup_stm32g474xx.o(RESET) +
UART5_IRQHandler from startup_stm32g474xx.o(.text) referenced from startup_stm32g474xx.o(RESET) +
UCPD1_IRQHandler from startup_stm32g474xx.o(.text) referenced from startup_stm32g474xx.o(RESET) +
USART1_IRQHandler from startup_stm32g474xx.o(.text) referenced from startup_stm32g474xx.o(RESET) +
USART2_IRQHandler from startup_stm32g474xx.o(.text) referenced from startup_stm32g474xx.o(RESET) +
USART3_IRQHandler from startup_stm32g474xx.o(.text) referenced from startup_stm32g474xx.o(RESET) +
USBWakeUp_IRQHandler from startup_stm32g474xx.o(.text) referenced from startup_stm32g474xx.o(RESET) +
USB_HP_IRQHandler from startup_stm32g474xx.o(.text) referenced from startup_stm32g474xx.o(RESET) +
USB_LP_IRQHandler from startup_stm32g474xx.o(.text) referenced from startup_stm32g474xx.o(RESET) +
UsageFault_Handler from startup_stm32g474xx.o(.text) referenced from startup_stm32g474xx.o(RESET) +
WWDG_IRQHandler from startup_stm32g474xx.o(.text) referenced from startup_stm32g474xx.o(RESET) +
__main from __main.o(!!!main) referenced from startup_stm32g474xx.o(.text) +
_get_lc_ctype from lc_ctype_c.o(locale$$code) referenced from rt_ctype_table.o(.text) +
_printf_input_char from _printf_char_common.o(.text) referenced from _printf_char_common.o(.text) +
fputc from retarget.o(.text.fputc) referenced from _printf_char_file.o(.text) +
+
+
+Global Symbols +
+
__main (Thumb, 8 bytes, Stack size 0 bytes, __main.o(!!!main)) +

[Calls]
>>   __rt_entry +
>>   __scatterload +
+
[Address Reference Count : 1]
startup_stm32g474xx.o(.text) +
+
__scatterload (Thumb, 0 bytes, Stack size unknown bytes, __scatter.o(!!!scatter)) +

[Called By]
>>   __main +
+ +
__scatterload_rt2 (Thumb, 84 bytes, Stack size unknown bytes, __scatter.o(!!!scatter), UNUSED) +

[Calls]
>>   __rt_entry +
+ +
__scatterload_rt2_thumb_only (Thumb, 0 bytes, Stack size unknown bytes, __scatter.o(!!!scatter), UNUSED) + +
__scatterload_loop (Thumb, 0 bytes, Stack size unknown bytes, __scatter.o(!!!scatter), UNUSED) + +
__scatterload_copy (Thumb, 26 bytes, Stack size unknown bytes, __scatter_copy.o(!!handler_copy), UNUSED) +

[Calls]
>>   __scatterload_copy +
+
[Called By]
>>   __scatterload_copy +
+ +
__scatterload_null (Thumb, 2 bytes, Stack size unknown bytes, __scatter.o(!!handler_null), UNUSED) + +
__scatterload_zeroinit (Thumb, 28 bytes, Stack size unknown bytes, __scatter_zi.o(!!handler_zi), UNUSED) + +
_printf_n (Thumb, 0 bytes, Stack size unknown bytes, _printf_n.o(.ARM.Collect$$_printf_percent$$00000001)) +

[Calls]
>>   _printf_charcount +
+ +
_printf_percent (Thumb, 0 bytes, Stack size unknown bytes, _printf_percent.o(.ARM.Collect$$_printf_percent$$00000000)) +

[Called By]
>>   __printf +
+ +
_printf_p (Thumb, 0 bytes, Stack size unknown bytes, _printf_p.o(.ARM.Collect$$_printf_percent$$00000002)) +

[Stack]
Max Depth = 64 + Unknown Stack Size +
Call Chain = _printf_p ⇒ _printf_hex_ptr ⇒ _printf_longlong_hex ⇒ _printf_int_common ⇒ _printf_post_padding +
+
[Calls]
>>   _printf_hex_ptr +
+ +
_printf_f (Thumb, 0 bytes, Stack size unknown bytes, _printf_f.o(.ARM.Collect$$_printf_percent$$00000003)) +

[Stack]
Max Depth = 324 + Unknown Stack Size +
Call Chain = _printf_f ⇒ _printf_fp_dec ⇒ _printf_fp_dec_real ⇒ _fp_digits ⇒ _btod_etento ⇒ _btod_emul ⇒ _e2e +
+
[Calls]
>>   _printf_fp_dec +
+ +
_printf_e (Thumb, 0 bytes, Stack size unknown bytes, _printf_e.o(.ARM.Collect$$_printf_percent$$00000004)) +

[Stack]
Max Depth = 324 + Unknown Stack Size +
Call Chain = _printf_e ⇒ _printf_fp_dec ⇒ _printf_fp_dec_real ⇒ _fp_digits ⇒ _btod_etento ⇒ _btod_emul ⇒ _e2e +
+
[Calls]
>>   _printf_fp_dec +
+ +
_printf_g (Thumb, 0 bytes, Stack size unknown bytes, _printf_g.o(.ARM.Collect$$_printf_percent$$00000005)) +

[Stack]
Max Depth = 324 + Unknown Stack Size +
Call Chain = _printf_g ⇒ _printf_fp_dec ⇒ _printf_fp_dec_real ⇒ _fp_digits ⇒ _btod_etento ⇒ _btod_emul ⇒ _e2e +
+
[Calls]
>>   _printf_fp_dec +
+ +
_printf_a (Thumb, 0 bytes, Stack size unknown bytes, _printf_a.o(.ARM.Collect$$_printf_percent$$00000006)) +

[Stack]
Max Depth = 112 + Unknown Stack Size +
Call Chain = _printf_a ⇒ _printf_fp_hex ⇒ _printf_fp_hex_real ⇒ _printf_fp_infnan ⇒ _printf_post_padding +
+
[Calls]
>>   _printf_fp_hex +
+ +
_printf_ll (Thumb, 0 bytes, Stack size unknown bytes, _printf_ll.o(.ARM.Collect$$_printf_percent$$00000007)) + +
_printf_i (Thumb, 0 bytes, Stack size unknown bytes, _printf_i.o(.ARM.Collect$$_printf_percent$$00000008)) +

[Stack]
Max Depth = 72 + Unknown Stack Size +
Call Chain = _printf_i ⇒ _printf_int_dec ⇒ _printf_int_common ⇒ _printf_post_padding +
+
[Calls]
>>   _printf_int_dec +
+ +
_printf_d (Thumb, 0 bytes, Stack size unknown bytes, _printf_d.o(.ARM.Collect$$_printf_percent$$00000009)) +

[Stack]
Max Depth = 72 + Unknown Stack Size +
Call Chain = _printf_d ⇒ _printf_int_dec ⇒ _printf_int_common ⇒ _printf_post_padding +
+
[Calls]
>>   _printf_int_dec +
+ +
_printf_u (Thumb, 0 bytes, Stack size unknown bytes, _printf_u.o(.ARM.Collect$$_printf_percent$$0000000A)) +

[Stack]
Max Depth = 72 + Unknown Stack Size +
Call Chain = _printf_u ⇒ _printf_int_dec ⇒ _printf_int_common ⇒ _printf_post_padding +
+
[Calls]
>>   _printf_int_dec +
+ +
_printf_o (Thumb, 0 bytes, Stack size unknown bytes, _printf_o.o(.ARM.Collect$$_printf_percent$$0000000B)) +

[Stack]
Max Depth = 64 + Unknown Stack Size +
Call Chain = _printf_o ⇒ _printf_int_oct ⇒ _printf_longlong_oct ⇒ _printf_int_common ⇒ _printf_post_padding +
+
[Calls]
>>   _printf_int_oct +
+ +
_printf_x (Thumb, 0 bytes, Stack size unknown bytes, _printf_x.o(.ARM.Collect$$_printf_percent$$0000000C)) +

[Stack]
Max Depth = 80 + Unknown Stack Size +
Call Chain = _printf_x ⇒ _printf_int_hex ⇒ _printf_longlong_hex ⇒ _printf_int_common ⇒ _printf_post_padding +
+
[Calls]
>>   _printf_int_hex +
+ +
_printf_lli (Thumb, 0 bytes, Stack size unknown bytes, _printf_lli.o(.ARM.Collect$$_printf_percent$$0000000D)) +

[Stack]
Max Depth = 72 + Unknown Stack Size +
Call Chain = _printf_lli ⇒ _printf_longlong_dec ⇒ _printf_int_common ⇒ _printf_post_padding +
+
[Calls]
>>   _printf_longlong_dec +
+ +
_printf_lld (Thumb, 0 bytes, Stack size unknown bytes, _printf_lld.o(.ARM.Collect$$_printf_percent$$0000000E)) +

[Stack]
Max Depth = 72 + Unknown Stack Size +
Call Chain = _printf_lld ⇒ _printf_longlong_dec ⇒ _printf_int_common ⇒ _printf_post_padding +
+
[Calls]
>>   _printf_longlong_dec +
+ +
_printf_llu (Thumb, 0 bytes, Stack size unknown bytes, _printf_llu.o(.ARM.Collect$$_printf_percent$$0000000F)) +

[Stack]
Max Depth = 72 + Unknown Stack Size +
Call Chain = _printf_llu ⇒ _printf_longlong_dec ⇒ _printf_int_common ⇒ _printf_post_padding +
+
[Calls]
>>   _printf_longlong_dec +
+ +
_printf_llo (Thumb, 0 bytes, Stack size unknown bytes, _printf_llo.o(.ARM.Collect$$_printf_percent$$00000010)) +

[Stack]
Max Depth = 56 + Unknown Stack Size +
Call Chain = _printf_llo ⇒ _printf_ll_oct ⇒ _printf_longlong_oct ⇒ _printf_int_common ⇒ _printf_post_padding +
+
[Calls]
>>   _printf_ll_oct +
+ +
_printf_llx (Thumb, 0 bytes, Stack size unknown bytes, _printf_llx.o(.ARM.Collect$$_printf_percent$$00000011)) +

[Stack]
Max Depth = 64 + Unknown Stack Size +
Call Chain = _printf_llx ⇒ _printf_ll_hex ⇒ _printf_longlong_hex ⇒ _printf_int_common ⇒ _printf_post_padding +
+
[Calls]
>>   _printf_ll_hex +
+ +
_printf_l (Thumb, 0 bytes, Stack size unknown bytes, _printf_l.o(.ARM.Collect$$_printf_percent$$00000012)) + +
_printf_c (Thumb, 0 bytes, Stack size unknown bytes, _printf_c.o(.ARM.Collect$$_printf_percent$$00000013)) +

[Stack]
Max Depth = 40 + Unknown Stack Size +
Call Chain = _printf_c ⇒ _printf_char ⇒ _printf_cs_common ⇒ _printf_str ⇒ _printf_post_padding +
+
[Calls]
>>   _printf_char +
+ +
_printf_s (Thumb, 0 bytes, Stack size unknown bytes, _printf_s.o(.ARM.Collect$$_printf_percent$$00000014)) +

[Stack]
Max Depth = 40 + Unknown Stack Size +
Call Chain = _printf_s ⇒ _printf_string ⇒ _printf_cs_common ⇒ _printf_str ⇒ _printf_post_padding +
+
[Calls]
>>   _printf_string +
+ +
_printf_lc (Thumb, 0 bytes, Stack size unknown bytes, _printf_lc.o(.ARM.Collect$$_printf_percent$$00000015)) +

[Stack]
Max Depth = 88 + Unknown Stack Size +
Call Chain = _printf_lc ⇒ _printf_wchar ⇒ _printf_lcs_common ⇒ _printf_wctomb ⇒ _wcrtomb +
+
[Calls]
>>   _printf_wchar +
+ +
_printf_ls (Thumb, 0 bytes, Stack size unknown bytes, _printf_ls.o(.ARM.Collect$$_printf_percent$$00000016)) +

[Stack]
Max Depth = 88 + Unknown Stack Size +
Call Chain = _printf_ls ⇒ _printf_wstring ⇒ _printf_lcs_common ⇒ _printf_wctomb ⇒ _wcrtomb +
+
[Calls]
>>   _printf_wstring +
+ +
_printf_percent_end (Thumb, 0 bytes, Stack size unknown bytes, _printf_percent_end.o(.ARM.Collect$$_printf_percent$$00000017)) + +
__rt_lib_init (Thumb, 0 bytes, Stack size unknown bytes, libinit.o(.ARM.Collect$$libinit$$00000000)) +

[Called By]
>>   __rt_entry_li +
+ +
__rt_lib_init_fp_1 (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000001)) +

[Calls]
>>   _fp_init +
+ +
__rt_lib_init_heap_1 (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$0000000C)) + +
__rt_lib_init_lc_common (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000011)) +

[Calls]
>>   __rt_locale +
+ +
__rt_lib_init_preinit_1 (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000006)) + +
__rt_lib_init_rand_1 (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000010)) + +
__rt_lib_init_relocate_pie_1 (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000004)) + +
__rt_lib_init_user_alloc_1 (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$0000000E)) + +
__rt_lib_init_lc_collate_1 (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000013)) + +
__rt_lib_init_lc_ctype_2 (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000014)) +

[Stack]
Max Depth = 16 + Unknown Stack Size +
Call Chain = __rt_lib_init_lc_ctype_2 ⇒ _get_lc_ctype ⇒ strcmp +
+
[Calls]
>>   _get_lc_ctype +
+ +
__rt_lib_init_lc_ctype_1 (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000015)) + +
__rt_lib_init_lc_monetary_1 (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000017)) + +
__rt_lib_init_lc_numeric_2 (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000018)) +

[Stack]
Max Depth = 16 + Unknown Stack Size +
Call Chain = __rt_lib_init_lc_numeric_2 ⇒ _get_lc_numeric ⇒ strcmp +
+
[Calls]
>>   _get_lc_numeric +
+ +
__rt_lib_init_alloca_1 (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000030)) + +
__rt_lib_init_argv_1 (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$0000002E)) + +
__rt_lib_init_atexit_1 (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$0000001D)) + +
__rt_lib_init_clock_1 (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000023)) + +
__rt_lib_init_cpp_1 (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000034)) + +
__rt_lib_init_exceptions_1 (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000032)) + +
__rt_lib_init_fp_trap_1 (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000021)) + +
__rt_lib_init_getenv_1 (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000025)) + +
__rt_lib_init_lc_numeric_1 (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000019)) + +
__rt_lib_init_lc_time_1 (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$0000001B)) + +
__rt_lib_init_return (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000035)) + +
__rt_lib_init_signal_1 (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$0000001F)) + +
__rt_lib_init_stdio_1 (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000027)) + +
__rt_lib_shutdown (Thumb, 0 bytes, Stack size unknown bytes, libshutdown.o(.ARM.Collect$$libshutdown$$00000000)) +

[Called By]
>>   __rt_exit_ls +
+ +
__rt_lib_shutdown_cpp_1 (Thumb, 0 bytes, Stack size unknown bytes, libshutdown2.o(.ARM.Collect$$libshutdown$$00000002)) + +
__rt_lib_shutdown_fp_trap_1 (Thumb, 0 bytes, Stack size unknown bytes, libshutdown2.o(.ARM.Collect$$libshutdown$$00000007)) + +
__rt_lib_shutdown_heap_1 (Thumb, 0 bytes, Stack size unknown bytes, libshutdown2.o(.ARM.Collect$$libshutdown$$0000000F)) + +
__rt_lib_shutdown_return (Thumb, 0 bytes, Stack size unknown bytes, libshutdown2.o(.ARM.Collect$$libshutdown$$00000010)) + +
__rt_lib_shutdown_signal_1 (Thumb, 0 bytes, Stack size unknown bytes, libshutdown2.o(.ARM.Collect$$libshutdown$$0000000A)) + +
__rt_lib_shutdown_stdio_1 (Thumb, 0 bytes, Stack size unknown bytes, libshutdown2.o(.ARM.Collect$$libshutdown$$00000004)) + +
__rt_lib_shutdown_user_alloc_1 (Thumb, 0 bytes, Stack size unknown bytes, libshutdown2.o(.ARM.Collect$$libshutdown$$0000000C)) + +
__rt_entry (Thumb, 0 bytes, Stack size unknown bytes, __rtentry.o(.ARM.Collect$$rtentry$$00000000)) +

[Called By]
>>   __main +
>>   __scatterload_rt2 +
+ +
__rt_entry_presh_1 (Thumb, 0 bytes, Stack size unknown bytes, __rtentry2.o(.ARM.Collect$$rtentry$$00000002)) + +
__rt_entry_sh (Thumb, 0 bytes, Stack size unknown bytes, __rtentry4.o(.ARM.Collect$$rtentry$$00000004)) +

[Stack]
Max Depth = 8 + Unknown Stack Size +
Call Chain = __rt_entry_sh ⇒ __user_setup_stackheap +
+
[Calls]
>>   __user_setup_stackheap +
+ +
__rt_entry_li (Thumb, 0 bytes, Stack size unknown bytes, __rtentry2.o(.ARM.Collect$$rtentry$$0000000A)) +

[Calls]
>>   __rt_lib_init +
+ +
__rt_entry_postsh_1 (Thumb, 0 bytes, Stack size unknown bytes, __rtentry2.o(.ARM.Collect$$rtentry$$00000009)) + +
__rt_entry_main (Thumb, 0 bytes, Stack size unknown bytes, __rtentry2.o(.ARM.Collect$$rtentry$$0000000D)) +

[Stack]
Max Depth = 248 + Unknown Stack Size +
Call Chain = __rt_entry_main ⇒ main ⇒ printf ⇒ _printf_char_file ⇒ _printf_char_common ⇒ __printf +
+
[Calls]
>>   exit +
>>   main +
+ +
__rt_entry_postli_1 (Thumb, 0 bytes, Stack size unknown bytes, __rtentry2.o(.ARM.Collect$$rtentry$$0000000C)) + +
__rt_exit (Thumb, 0 bytes, Stack size unknown bytes, rtexit.o(.ARM.Collect$$rtexit$$00000000)) +

[Called By]
>>   exit +
+ +
__rt_exit_ls (Thumb, 0 bytes, Stack size unknown bytes, rtexit2.o(.ARM.Collect$$rtexit$$00000003)) +

[Calls]
>>   __rt_lib_shutdown +
+ +
__rt_exit_prels_1 (Thumb, 0 bytes, Stack size unknown bytes, rtexit2.o(.ARM.Collect$$rtexit$$00000002)) + +
__rt_exit_exit (Thumb, 0 bytes, Stack size unknown bytes, rtexit2.o(.ARM.Collect$$rtexit$$00000004)) +

[Stack]
Max Depth = 4 + Unknown Stack Size +
Call Chain = __rt_exit_exit ⇒ _sys_exit +
+
[Calls]
>>   _sys_exit +
+ +
Reset_Handler (Thumb, 8 bytes, Stack size 0 bytes, startup_stm32g474xx.o(.text)) +
[Address Reference Count : 1]
startup_stm32g474xx.o(RESET) +
+
NMI_Handler (Thumb, 2 bytes, Stack size 0 bytes, startup_stm32g474xx.o(.text)) +

[Calls]
>>   NMI_Handler +
+
[Called By]
>>   NMI_Handler +
+
[Address Reference Count : 1]
startup_stm32g474xx.o(RESET) +
+
HardFault_Handler (Thumb, 2 bytes, Stack size 0 bytes, startup_stm32g474xx.o(.text)) +

[Calls]
>>   HardFault_Handler +
+
[Called By]
>>   HardFault_Handler +
+
[Address Reference Count : 1]
startup_stm32g474xx.o(RESET) +
+
MemManage_Handler (Thumb, 2 bytes, Stack size 0 bytes, startup_stm32g474xx.o(.text)) +

[Calls]
>>   MemManage_Handler +
+
[Called By]
>>   MemManage_Handler +
+
[Address Reference Count : 1]
startup_stm32g474xx.o(RESET) +
+
BusFault_Handler (Thumb, 2 bytes, Stack size 0 bytes, startup_stm32g474xx.o(.text)) +

[Calls]
>>   BusFault_Handler +
+
[Called By]
>>   BusFault_Handler +
+
[Address Reference Count : 1]
startup_stm32g474xx.o(RESET) +
+
UsageFault_Handler (Thumb, 2 bytes, Stack size 0 bytes, startup_stm32g474xx.o(.text)) +

[Calls]
>>   UsageFault_Handler +
+
[Called By]
>>   UsageFault_Handler +
+
[Address Reference Count : 1]
startup_stm32g474xx.o(RESET) +
+
SVC_Handler (Thumb, 2 bytes, Stack size 0 bytes, startup_stm32g474xx.o(.text)) +

[Calls]
>>   SVC_Handler +
+
[Called By]
>>   SVC_Handler +
+
[Address Reference Count : 1]
startup_stm32g474xx.o(RESET) +
+
DebugMon_Handler (Thumb, 2 bytes, Stack size 0 bytes, startup_stm32g474xx.o(.text)) +

[Calls]
>>   DebugMon_Handler +
+
[Called By]
>>   DebugMon_Handler +
+
[Address Reference Count : 1]
startup_stm32g474xx.o(RESET) +
+
PendSV_Handler (Thumb, 2 bytes, Stack size 0 bytes, startup_stm32g474xx.o(.text)) +

[Calls]
>>   PendSV_Handler +
+
[Called By]
>>   PendSV_Handler +
+
[Address Reference Count : 1]
startup_stm32g474xx.o(RESET) +
+
ADC1_2_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32g474xx.o(.text)) +

[Calls]
>>   ADC1_2_IRQHandler +
+
[Called By]
>>   ADC1_2_IRQHandler +
+
[Address Reference Count : 1]
startup_stm32g474xx.o(RESET) +
+
ADC3_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32g474xx.o(.text)) +
[Address Reference Count : 1]
startup_stm32g474xx.o(RESET) +
+
ADC4_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32g474xx.o(.text)) +
[Address Reference Count : 1]
startup_stm32g474xx.o(RESET) +
+
ADC5_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32g474xx.o(.text)) +
[Address Reference Count : 1]
startup_stm32g474xx.o(RESET) +
+
COMP1_2_3_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32g474xx.o(.text)) +
[Address Reference Count : 1]
startup_stm32g474xx.o(RESET) +
+
COMP4_5_6_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32g474xx.o(.text)) +
[Address Reference Count : 1]
startup_stm32g474xx.o(RESET) +
+
COMP7_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32g474xx.o(.text)) +
[Address Reference Count : 1]
startup_stm32g474xx.o(RESET) +
+
CORDIC_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32g474xx.o(.text)) +
[Address Reference Count : 1]
startup_stm32g474xx.o(RESET) +
+
CRS_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32g474xx.o(.text)) +
[Address Reference Count : 1]
startup_stm32g474xx.o(RESET) +
+
DMA1_Channel1_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32g474xx.o(.text)) +
[Address Reference Count : 1]
startup_stm32g474xx.o(RESET) +
+
DMA1_Channel2_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32g474xx.o(.text)) +
[Address Reference Count : 1]
startup_stm32g474xx.o(RESET) +
+
DMA1_Channel3_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32g474xx.o(.text)) +
[Address Reference Count : 1]
startup_stm32g474xx.o(RESET) +
+
DMA1_Channel4_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32g474xx.o(.text)) +
[Address Reference Count : 1]
startup_stm32g474xx.o(RESET) +
+
DMA1_Channel5_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32g474xx.o(.text)) +
[Address Reference Count : 1]
startup_stm32g474xx.o(RESET) +
+
DMA1_Channel6_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32g474xx.o(.text)) +
[Address Reference Count : 1]
startup_stm32g474xx.o(RESET) +
+
DMA1_Channel7_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32g474xx.o(.text)) +
[Address Reference Count : 1]
startup_stm32g474xx.o(RESET) +
+
DMA1_Channel8_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32g474xx.o(.text)) +
[Address Reference Count : 1]
startup_stm32g474xx.o(RESET) +
+
DMA2_Channel1_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32g474xx.o(.text)) +
[Address Reference Count : 1]
startup_stm32g474xx.o(RESET) +
+
DMA2_Channel2_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32g474xx.o(.text)) +
[Address Reference Count : 1]
startup_stm32g474xx.o(RESET) +
+
DMA2_Channel3_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32g474xx.o(.text)) +
[Address Reference Count : 1]
startup_stm32g474xx.o(RESET) +
+
DMA2_Channel4_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32g474xx.o(.text)) +
[Address Reference Count : 1]
startup_stm32g474xx.o(RESET) +
+
DMA2_Channel5_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32g474xx.o(.text)) +
[Address Reference Count : 1]
startup_stm32g474xx.o(RESET) +
+
DMA2_Channel6_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32g474xx.o(.text)) +
[Address Reference Count : 1]
startup_stm32g474xx.o(RESET) +
+
DMA2_Channel7_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32g474xx.o(.text)) +
[Address Reference Count : 1]
startup_stm32g474xx.o(RESET) +
+
DMA2_Channel8_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32g474xx.o(.text)) +
[Address Reference Count : 1]
startup_stm32g474xx.o(RESET) +
+
DMAMUX_OVR_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32g474xx.o(.text)) +
[Address Reference Count : 1]
startup_stm32g474xx.o(RESET) +
+
EXTI0_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32g474xx.o(.text)) +
[Address Reference Count : 1]
startup_stm32g474xx.o(RESET) +
+
EXTI15_10_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32g474xx.o(.text)) +
[Address Reference Count : 1]
startup_stm32g474xx.o(RESET) +
+
EXTI1_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32g474xx.o(.text)) +
[Address Reference Count : 1]
startup_stm32g474xx.o(RESET) +
+
EXTI2_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32g474xx.o(.text)) +
[Address Reference Count : 1]
startup_stm32g474xx.o(RESET) +
+
EXTI3_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32g474xx.o(.text)) +
[Address Reference Count : 1]
startup_stm32g474xx.o(RESET) +
+
EXTI4_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32g474xx.o(.text)) +
[Address Reference Count : 1]
startup_stm32g474xx.o(RESET) +
+
EXTI9_5_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32g474xx.o(.text)) +
[Address Reference Count : 1]
startup_stm32g474xx.o(RESET) +
+
FDCAN1_IT0_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32g474xx.o(.text)) +
[Address Reference Count : 1]
startup_stm32g474xx.o(RESET) +
+
FDCAN1_IT1_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32g474xx.o(.text)) +
[Address Reference Count : 1]
startup_stm32g474xx.o(RESET) +
+
FDCAN2_IT0_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32g474xx.o(.text)) +
[Address Reference Count : 1]
startup_stm32g474xx.o(RESET) +
+
FDCAN2_IT1_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32g474xx.o(.text)) +
[Address Reference Count : 1]
startup_stm32g474xx.o(RESET) +
+
FDCAN3_IT0_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32g474xx.o(.text)) +
[Address Reference Count : 1]
startup_stm32g474xx.o(RESET) +
+
FDCAN3_IT1_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32g474xx.o(.text)) +
[Address Reference Count : 1]
startup_stm32g474xx.o(RESET) +
+
FLASH_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32g474xx.o(.text)) +
[Address Reference Count : 1]
startup_stm32g474xx.o(RESET) +
+
FMAC_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32g474xx.o(.text)) +
[Address Reference Count : 1]
startup_stm32g474xx.o(RESET) +
+
FMC_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32g474xx.o(.text)) +
[Address Reference Count : 1]
startup_stm32g474xx.o(RESET) +
+
FPU_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32g474xx.o(.text)) +
[Address Reference Count : 1]
startup_stm32g474xx.o(RESET) +
+
HRTIM1_FLT_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32g474xx.o(.text)) +
[Address Reference Count : 1]
startup_stm32g474xx.o(RESET) +
+
HRTIM1_Master_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32g474xx.o(.text)) +
[Address Reference Count : 1]
startup_stm32g474xx.o(RESET) +
+
HRTIM1_TIMA_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32g474xx.o(.text)) +
[Address Reference Count : 1]
startup_stm32g474xx.o(RESET) +
+
HRTIM1_TIMB_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32g474xx.o(.text)) +
[Address Reference Count : 1]
startup_stm32g474xx.o(RESET) +
+
HRTIM1_TIMC_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32g474xx.o(.text)) +
[Address Reference Count : 1]
startup_stm32g474xx.o(RESET) +
+
HRTIM1_TIMD_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32g474xx.o(.text)) +
[Address Reference Count : 1]
startup_stm32g474xx.o(RESET) +
+
HRTIM1_TIME_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32g474xx.o(.text)) +
[Address Reference Count : 1]
startup_stm32g474xx.o(RESET) +
+
HRTIM1_TIMF_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32g474xx.o(.text)) +
[Address Reference Count : 1]
startup_stm32g474xx.o(RESET) +
+
I2C1_ER_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32g474xx.o(.text)) +
[Address Reference Count : 1]
startup_stm32g474xx.o(RESET) +
+
I2C1_EV_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32g474xx.o(.text)) +
[Address Reference Count : 1]
startup_stm32g474xx.o(RESET) +
+
I2C2_ER_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32g474xx.o(.text)) +
[Address Reference Count : 1]
startup_stm32g474xx.o(RESET) +
+
I2C2_EV_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32g474xx.o(.text)) +
[Address Reference Count : 1]
startup_stm32g474xx.o(RESET) +
+
I2C3_ER_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32g474xx.o(.text)) +
[Address Reference Count : 1]
startup_stm32g474xx.o(RESET) +
+
I2C3_EV_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32g474xx.o(.text)) +
[Address Reference Count : 1]
startup_stm32g474xx.o(RESET) +
+
I2C4_ER_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32g474xx.o(.text)) +
[Address Reference Count : 1]
startup_stm32g474xx.o(RESET) +
+
I2C4_EV_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32g474xx.o(.text)) +
[Address Reference Count : 1]
startup_stm32g474xx.o(RESET) +
+
LPTIM1_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32g474xx.o(.text)) +
[Address Reference Count : 1]
startup_stm32g474xx.o(RESET) +
+
LPUART1_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32g474xx.o(.text)) +
[Address Reference Count : 1]
startup_stm32g474xx.o(RESET) +
+
PVD_PVM_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32g474xx.o(.text)) +
[Address Reference Count : 1]
startup_stm32g474xx.o(RESET) +
+
QUADSPI_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32g474xx.o(.text)) +
[Address Reference Count : 1]
startup_stm32g474xx.o(RESET) +
+
RCC_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32g474xx.o(.text)) +
[Address Reference Count : 1]
startup_stm32g474xx.o(RESET) +
+
RNG_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32g474xx.o(.text)) +
[Address Reference Count : 1]
startup_stm32g474xx.o(RESET) +
+
RTC_Alarm_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32g474xx.o(.text)) +
[Address Reference Count : 1]
startup_stm32g474xx.o(RESET) +
+
RTC_TAMP_LSECSS_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32g474xx.o(.text)) +
[Address Reference Count : 1]
startup_stm32g474xx.o(RESET) +
+
RTC_WKUP_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32g474xx.o(.text)) +
[Address Reference Count : 1]
startup_stm32g474xx.o(RESET) +
+
SAI1_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32g474xx.o(.text)) +
[Address Reference Count : 1]
startup_stm32g474xx.o(RESET) +
+
SPI1_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32g474xx.o(.text)) +
[Address Reference Count : 1]
startup_stm32g474xx.o(RESET) +
+
SPI2_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32g474xx.o(.text)) +
[Address Reference Count : 1]
startup_stm32g474xx.o(RESET) +
+
SPI3_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32g474xx.o(.text)) +
[Address Reference Count : 1]
startup_stm32g474xx.o(RESET) +
+
SPI4_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32g474xx.o(.text)) +
[Address Reference Count : 1]
startup_stm32g474xx.o(RESET) +
+
TIM1_BRK_TIM15_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32g474xx.o(.text)) +
[Address Reference Count : 1]
startup_stm32g474xx.o(RESET) +
+
TIM1_CC_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32g474xx.o(.text)) +
[Address Reference Count : 1]
startup_stm32g474xx.o(RESET) +
+
TIM1_TRG_COM_TIM17_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32g474xx.o(.text)) +
[Address Reference Count : 1]
startup_stm32g474xx.o(RESET) +
+
TIM1_UP_TIM16_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32g474xx.o(.text)) +
[Address Reference Count : 1]
startup_stm32g474xx.o(RESET) +
+
TIM20_BRK_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32g474xx.o(.text)) +
[Address Reference Count : 1]
startup_stm32g474xx.o(RESET) +
+
TIM20_CC_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32g474xx.o(.text)) +
[Address Reference Count : 1]
startup_stm32g474xx.o(RESET) +
+
TIM20_TRG_COM_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32g474xx.o(.text)) +
[Address Reference Count : 1]
startup_stm32g474xx.o(RESET) +
+
TIM20_UP_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32g474xx.o(.text)) +
[Address Reference Count : 1]
startup_stm32g474xx.o(RESET) +
+
TIM2_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32g474xx.o(.text)) +
[Address Reference Count : 1]
startup_stm32g474xx.o(RESET) +
+
TIM3_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32g474xx.o(.text)) +
[Address Reference Count : 1]
startup_stm32g474xx.o(RESET) +
+
TIM4_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32g474xx.o(.text)) +
[Address Reference Count : 1]
startup_stm32g474xx.o(RESET) +
+
TIM5_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32g474xx.o(.text)) +
[Address Reference Count : 1]
startup_stm32g474xx.o(RESET) +
+
TIM6_DAC_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32g474xx.o(.text)) +
[Address Reference Count : 1]
startup_stm32g474xx.o(RESET) +
+
TIM7_DAC_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32g474xx.o(.text)) +
[Address Reference Count : 1]
startup_stm32g474xx.o(RESET) +
+
TIM8_BRK_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32g474xx.o(.text)) +
[Address Reference Count : 1]
startup_stm32g474xx.o(RESET) +
+
TIM8_CC_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32g474xx.o(.text)) +
[Address Reference Count : 1]
startup_stm32g474xx.o(RESET) +
+
TIM8_TRG_COM_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32g474xx.o(.text)) +
[Address Reference Count : 1]
startup_stm32g474xx.o(RESET) +
+
TIM8_UP_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32g474xx.o(.text)) +
[Address Reference Count : 1]
startup_stm32g474xx.o(RESET) +
+
UART4_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32g474xx.o(.text)) +
[Address Reference Count : 1]
startup_stm32g474xx.o(RESET) +
+
UART5_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32g474xx.o(.text)) +
[Address Reference Count : 1]
startup_stm32g474xx.o(RESET) +
+
UCPD1_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32g474xx.o(.text)) +
[Address Reference Count : 1]
startup_stm32g474xx.o(RESET) +
+
USART1_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32g474xx.o(.text)) +
[Address Reference Count : 1]
startup_stm32g474xx.o(RESET) +
+
USART2_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32g474xx.o(.text)) +
[Address Reference Count : 1]
startup_stm32g474xx.o(RESET) +
+
USART3_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32g474xx.o(.text)) +
[Address Reference Count : 1]
startup_stm32g474xx.o(RESET) +
+
USBWakeUp_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32g474xx.o(.text)) +
[Address Reference Count : 1]
startup_stm32g474xx.o(RESET) +
+
USB_HP_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32g474xx.o(.text)) +
[Address Reference Count : 1]
startup_stm32g474xx.o(RESET) +
+
USB_LP_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32g474xx.o(.text)) +
[Address Reference Count : 1]
startup_stm32g474xx.o(RESET) +
+
WWDG_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32g474xx.o(.text)) +
[Address Reference Count : 1]
startup_stm32g474xx.o(RESET) +
+
__user_initial_stackheap (Thumb, 0 bytes, Stack size unknown bytes, startup_stm32g474xx.o(.text)) +

[Called By]
>>   __user_setup_stackheap +
+ +
__use_no_semihosting (Thumb, 2 bytes, Stack size 0 bytes, use_no_semi_2.o(.text), UNUSED) + +
__aeabi_uldivmod (Thumb, 0 bytes, Stack size 48 bytes, lludivv7m.o(.text)) +

[Stack]
Max Depth = 48
Call Chain = __aeabi_uldivmod +
+
[Called By]
>>   sense_mv_to_voltage_mv +
>>   hrtim_period_from_clock +
>>   DCDC_ControlStep +
+ +
_ll_udiv (Thumb, 240 bytes, Stack size 48 bytes, lludivv7m.o(.text), UNUSED) + +
printf (Thumb, 20 bytes, Stack size 24 bytes, printf.o(.text)) +

[Stack]
Max Depth = 144 + Unknown Stack Size +
Call Chain = printf ⇒ _printf_char_file ⇒ _printf_char_common ⇒ __printf +
+
[Calls]
>>   _printf_char_file +
+
[Called By]
>>   main +
+ +
__use_two_region_memory (Thumb, 2 bytes, Stack size 0 bytes, heapauxi.o(.text), UNUSED) + +
__rt_heap_escrow$2region (Thumb, 2 bytes, Stack size 0 bytes, heapauxi.o(.text), UNUSED) + +
__rt_heap_expand$2region (Thumb, 2 bytes, Stack size 0 bytes, heapauxi.o(.text), UNUSED) + +
__I$use$semihosting (Thumb, 0 bytes, Stack size 0 bytes, use_no_semi.o(.text), UNUSED) + +
__use_no_semihosting_swi (Thumb, 2 bytes, Stack size 0 bytes, use_no_semi.o(.text), UNUSED) + +
_printf_pre_padding (Thumb, 44 bytes, Stack size 16 bytes, _printf_pad.o(.text)) +

[Stack]
Max Depth = 16
Call Chain = _printf_pre_padding +
+
[Called By]
>>   _printf_fp_infnan +
>>   _printf_fp_hex_real +
>>   _printf_fp_dec_real +
>>   _printf_int_common +
>>   _printf_wctomb +
>>   _printf_str +
+ +
_printf_post_padding (Thumb, 34 bytes, Stack size 16 bytes, _printf_pad.o(.text)) +

[Stack]
Max Depth = 16
Call Chain = _printf_post_padding +
+
[Called By]
>>   _printf_fp_infnan +
>>   _printf_fp_hex_real +
>>   _printf_fp_dec_real +
>>   _printf_int_common +
>>   _printf_wctomb +
>>   _printf_str +
+ +
_printf_truncate_signed (Thumb, 18 bytes, Stack size 0 bytes, _printf_truncate.o(.text)) +

[Called By]
>>   _printf_int_dec +
+ +
_printf_truncate_unsigned (Thumb, 18 bytes, Stack size 0 bytes, _printf_truncate.o(.text)) +

[Called By]
>>   _printf_int_hex +
>>   _printf_int_oct +
>>   _printf_int_dec +
+ +
_printf_str (Thumb, 82 bytes, Stack size 16 bytes, _printf_str.o(.text)) +

[Stack]
Max Depth = 32
Call Chain = _printf_str ⇒ _printf_post_padding +
+
[Calls]
>>   _printf_post_padding +
>>   _printf_pre_padding +
+
[Called By]
>>   _printf_cs_common +
+ +
_printf_int_dec (Thumb, 104 bytes, Stack size 24 bytes, _printf_dec.o(.text)) +

[Stack]
Max Depth = 72
Call Chain = _printf_int_dec ⇒ _printf_int_common ⇒ _printf_post_padding +
+
[Calls]
>>   _printf_int_common +
>>   _printf_truncate_unsigned +
>>   _printf_truncate_signed +
+
[Called By]
>>   _printf_u +
>>   _printf_d +
>>   _printf_i +
+ +
_printf_charcount (Thumb, 40 bytes, Stack size 0 bytes, _printf_charcount.o(.text)) +

[Called By]
>>   _printf_n +
+ +
_printf_char_file (Thumb, 32 bytes, Stack size 16 bytes, _printf_char_file.o(.text)) +

[Stack]
Max Depth = 120 + Unknown Stack Size +
Call Chain = _printf_char_file ⇒ _printf_char_common ⇒ __printf +
+
[Calls]
>>   ferror +
>>   _printf_char_common +
+
[Called By]
>>   printf +
+ +
_printf_wctomb (Thumb, 182 bytes, Stack size 56 bytes, _printf_wctomb.o(.text)) +

[Stack]
Max Depth = 80
Call Chain = _printf_wctomb ⇒ _wcrtomb +
+
[Calls]
>>   _wcrtomb +
>>   _printf_post_padding +
>>   _printf_pre_padding +
+
[Called By]
>>   _printf_lcs_common +
+ +
_printf_longlong_dec (Thumb, 108 bytes, Stack size 24 bytes, _printf_longlong_dec.o(.text)) +

[Stack]
Max Depth = 72
Call Chain = _printf_longlong_dec ⇒ _printf_int_common ⇒ _printf_post_padding +
+
[Calls]
>>   _printf_int_common +
>>   _ll_udiv10 +
+
[Called By]
>>   _printf_llu +
>>   _printf_lld +
>>   _printf_lli +
+ +
_printf_longlong_oct (Thumb, 68 bytes, Stack size 8 bytes, _printf_oct_int_ll.o(.text)) +

[Stack]
Max Depth = 56
Call Chain = _printf_longlong_oct ⇒ _printf_int_common ⇒ _printf_post_padding +
+
[Calls]
>>   _printf_int_common +
+
[Called By]
>>   _printf_ll_oct +
>>   _printf_int_oct +
+ +
_printf_int_oct (Thumb, 24 bytes, Stack size 8 bytes, _printf_oct_int_ll.o(.text)) +

[Stack]
Max Depth = 64
Call Chain = _printf_int_oct ⇒ _printf_longlong_oct ⇒ _printf_int_common ⇒ _printf_post_padding +
+
[Calls]
>>   _printf_longlong_oct +
>>   _printf_truncate_unsigned +
+
[Called By]
>>   _printf_o +
+ +
_printf_ll_oct (Thumb, 12 bytes, Stack size 0 bytes, _printf_oct_int_ll.o(.text)) +

[Stack]
Max Depth = 56
Call Chain = _printf_ll_oct ⇒ _printf_longlong_oct ⇒ _printf_int_common ⇒ _printf_post_padding +
+
[Calls]
>>   _printf_longlong_oct +
+
[Called By]
>>   _printf_llo +
+ +
_printf_longlong_hex (Thumb, 86 bytes, Stack size 16 bytes, _printf_hex_int_ll_ptr.o(.text)) +

[Stack]
Max Depth = 64
Call Chain = _printf_longlong_hex ⇒ _printf_int_common ⇒ _printf_post_padding +
+
[Calls]
>>   _printf_int_common +
+
[Called By]
>>   _printf_hex_ptr +
>>   _printf_ll_hex +
>>   _printf_int_hex +
+ +
_printf_int_hex (Thumb, 28 bytes, Stack size 16 bytes, _printf_hex_int_ll_ptr.o(.text)) +

[Stack]
Max Depth = 80
Call Chain = _printf_int_hex ⇒ _printf_longlong_hex ⇒ _printf_int_common ⇒ _printf_post_padding +
+
[Calls]
>>   _printf_longlong_hex +
>>   _printf_truncate_unsigned +
+
[Called By]
>>   _printf_x +
+ +
_printf_ll_hex (Thumb, 12 bytes, Stack size 0 bytes, _printf_hex_int_ll_ptr.o(.text)) +

[Stack]
Max Depth = 64
Call Chain = _printf_ll_hex ⇒ _printf_longlong_hex ⇒ _printf_int_common ⇒ _printf_post_padding +
+
[Calls]
>>   _printf_longlong_hex +
+
[Called By]
>>   _printf_llx +
+ +
_printf_hex_ptr (Thumb, 18 bytes, Stack size 0 bytes, _printf_hex_int_ll_ptr.o(.text)) +

[Stack]
Max Depth = 64
Call Chain = _printf_hex_ptr ⇒ _printf_longlong_hex ⇒ _printf_int_common ⇒ _printf_post_padding +
+
[Calls]
>>   _printf_longlong_hex +
+
[Called By]
>>   _printf_p +
+ +
__printf (Thumb, 388 bytes, Stack size 40 bytes, __printf_flags_ss_wp.o(.text)) +

[Stack]
Max Depth = 40 + Unknown Stack Size +
Call Chain = __printf +
+
[Calls]
>>   _printf_percent +
>>   _is_digit +
+
[Called By]
>>   _printf_char_common +
+ +
_ll_udiv10 (Thumb, 138 bytes, Stack size 12 bytes, lludiv10.o(.text)) +

[Stack]
Max Depth = 12
Call Chain = _ll_udiv10 +
+
[Called By]
>>   _fp_digits +
>>   _printf_longlong_dec +
+ +
_printf_int_common (Thumb, 178 bytes, Stack size 32 bytes, _printf_intcommon.o(.text)) +

[Stack]
Max Depth = 48
Call Chain = _printf_int_common ⇒ _printf_post_padding +
+
[Calls]
>>   _printf_post_padding +
>>   _printf_pre_padding +
+
[Called By]
>>   _printf_longlong_hex +
>>   _printf_longlong_oct +
>>   _printf_longlong_dec +
>>   _printf_int_dec +
+ +
_printf_fp_dec_real (Thumb, 620 bytes, Stack size 104 bytes, _printf_fp_dec.o(.text)) +

[Stack]
Max Depth = 324
Call Chain = _printf_fp_dec_real ⇒ _fp_digits ⇒ _btod_etento ⇒ _btod_emul ⇒ _e2e +
+
[Calls]
>>   __ARM_fpclassify +
>>   _printf_fp_infnan +
>>   __rt_locale +
>>   _fp_digits +
>>   _printf_post_padding +
>>   _printf_pre_padding +
+
[Called By]
>>   _printf_fp_dec +
+ +
_printf_fp_hex_real (Thumb, 756 bytes, Stack size 72 bytes, _printf_fp_hex.o(.text)) +

[Stack]
Max Depth = 112
Call Chain = _printf_fp_hex_real ⇒ _printf_fp_infnan ⇒ _printf_post_padding +
+
[Calls]
>>   __ARM_fpclassify +
>>   _printf_fp_infnan +
>>   _printf_post_padding +
>>   _printf_pre_padding +
+
[Called By]
>>   _printf_fp_hex +
+ +
_printf_char_common (Thumb, 32 bytes, Stack size 64 bytes, _printf_char_common.o(.text)) +

[Stack]
Max Depth = 104 + Unknown Stack Size +
Call Chain = _printf_char_common ⇒ __printf +
+
[Calls]
>>   __printf +
+
[Called By]
>>   _printf_char_file +
+ +
_printf_cs_common (Thumb, 20 bytes, Stack size 8 bytes, _printf_char.o(.text)) +

[Stack]
Max Depth = 40
Call Chain = _printf_cs_common ⇒ _printf_str ⇒ _printf_post_padding +
+
[Calls]
>>   _printf_str +
+
[Called By]
>>   _printf_string +
>>   _printf_char +
+ +
_printf_char (Thumb, 16 bytes, Stack size 0 bytes, _printf_char.o(.text)) +

[Stack]
Max Depth = 40
Call Chain = _printf_char ⇒ _printf_cs_common ⇒ _printf_str ⇒ _printf_post_padding +
+
[Calls]
>>   _printf_cs_common +
+
[Called By]
>>   _printf_c +
+ +
_printf_string (Thumb, 8 bytes, Stack size 0 bytes, _printf_char.o(.text)) +

[Stack]
Max Depth = 40
Call Chain = _printf_string ⇒ _printf_cs_common ⇒ _printf_str ⇒ _printf_post_padding +
+
[Calls]
>>   _printf_cs_common +
+
[Called By]
>>   _printf_s +
+ +
_printf_lcs_common (Thumb, 20 bytes, Stack size 8 bytes, _printf_wchar.o(.text)) +

[Stack]
Max Depth = 88
Call Chain = _printf_lcs_common ⇒ _printf_wctomb ⇒ _wcrtomb +
+
[Calls]
>>   _printf_wctomb +
+
[Called By]
>>   _printf_wstring +
>>   _printf_wchar +
+ +
_printf_wchar (Thumb, 16 bytes, Stack size 0 bytes, _printf_wchar.o(.text)) +

[Stack]
Max Depth = 88
Call Chain = _printf_wchar ⇒ _printf_lcs_common ⇒ _printf_wctomb ⇒ _wcrtomb +
+
[Calls]
>>   _printf_lcs_common +
+
[Called By]
>>   _printf_lc +
+ +
_printf_wstring (Thumb, 8 bytes, Stack size 0 bytes, _printf_wchar.o(.text)) +

[Stack]
Max Depth = 88
Call Chain = _printf_wstring ⇒ _printf_lcs_common ⇒ _printf_wctomb ⇒ _wcrtomb +
+
[Calls]
>>   _printf_lcs_common +
+
[Called By]
>>   _printf_ls +
+ +
ferror (Thumb, 8 bytes, Stack size 0 bytes, ferror.o(.text)) +

[Called By]
>>   _printf_char_file +
+ +
_c16rtomb (Thumb, 72 bytes, Stack size 24 bytes, _c16rtomb.o(.text), UNUSED) +

[Calls]
>>   __rt_ctype_table +
+ +
_wcrtomb (Thumb, 0 bytes, Stack size 24 bytes, _c16rtomb.o(.text)) +

[Stack]
Max Depth = 24
Call Chain = _wcrtomb +
+
[Called By]
>>   _printf_wctomb +
+ +
__user_setup_stackheap (Thumb, 74 bytes, Stack size 8 bytes, sys_stackheap_outer.o(.text)) +

[Stack]
Max Depth = 8 + Unknown Stack Size +
Call Chain = __user_setup_stackheap +
+
[Calls]
>>   __user_perproc_libspace +
>>   __user_initial_stackheap +
+
[Called By]
>>   __rt_entry_sh +
+ +
__rt_ctype_table (Thumb, 16 bytes, Stack size 8 bytes, rt_ctype_table.o(.text), UNUSED) +

[Calls]
>>   __rt_locale +
+
[Called By]
>>   _c16rtomb +
+ +
__rt_locale (Thumb, 8 bytes, Stack size 0 bytes, rt_locale_intlibspace.o(.text)) +

[Called By]
>>   __rt_ctype_table +
>>   _printf_fp_dec_real +
>>   __rt_lib_init_lc_common +
+ +
_printf_fp_infnan (Thumb, 112 bytes, Stack size 24 bytes, _printf_fp_infnan.o(.text)) +

[Stack]
Max Depth = 40
Call Chain = _printf_fp_infnan ⇒ _printf_post_padding +
+
[Calls]
>>   _printf_post_padding +
>>   _printf_pre_padding +
+
[Called By]
>>   _printf_fp_hex_real +
>>   _printf_fp_dec_real +
+ +
_btod_etento (Thumb, 224 bytes, Stack size 72 bytes, bigflt0.o(.text)) +

[Stack]
Max Depth = 124
Call Chain = _btod_etento ⇒ _btod_emul ⇒ _e2e +
+
[Calls]
>>   _btod_emul +
>>   _btod_ediv +
+
[Called By]
>>   _fp_digits +
+ +
exit (Thumb, 18 bytes, Stack size 8 bytes, exit.o(.text)) +

[Stack]
Max Depth = 8 + Unknown Stack Size +
Call Chain = exit +
+
[Calls]
>>   __rt_exit +
+
[Called By]
>>   __rt_entry_main +
+ +
__user_libspace (Thumb, 8 bytes, Stack size 0 bytes, libspace.o(.text), UNUSED) + +
__user_perproc_libspace (Thumb, 0 bytes, Stack size 0 bytes, libspace.o(.text)) +

[Called By]
>>   __user_setup_stackheap +
+ +
__user_perthread_libspace (Thumb, 0 bytes, Stack size 0 bytes, libspace.o(.text), UNUSED) + +
strcmp (Thumb, 124 bytes, Stack size 8 bytes, strcmpv7em.o(.text)) +

[Stack]
Max Depth = 8
Call Chain = strcmp +
+
[Called By]
>>   _get_lc_ctype +
>>   _get_lc_numeric +
+ +
Board_DelayMs (Thumb, 38 bytes, Stack size 16 bytes, board.o(.text.Board_DelayMs)) +

[Stack]
Max Depth = 16
Call Chain = Board_DelayMs +
+
[Calls]
>>   Board_Millis +
+
[Called By]
>>   adc1_init +
+ +
Board_FatalError (Thumb, 8 bytes, Stack size 0 bytes, board.o(.text.Board_FatalError)) +

[Called By]
>>   Board_Init +
+ +
Board_Init (Thumb, 46 bytes, Stack size 8 bytes, board.o(.text.Board_Init)) +

[Stack]
Max Depth = 56
Call Chain = Board_Init ⇒ SystemClock_Config ⇒ Clock_UseHsi16 ⇒ SystemCoreClockUpdate +
+
[Calls]
>>   Board_FatalError +
>>   SysTick_Config +
>>   SystemClock_Config +
+
[Called By]
>>   main +
+ +
Board_Millis (Thumb, 12 bytes, Stack size 0 bytes, board.o(.text.Board_Millis)) +

[Called By]
>>   Board_DelayMs +
>>   main +
+ +
DCDC_ControlStep (Thumb, 366 bytes, Stack size 48 bytes, dcdc.o(.text.DCDC_ControlStep)) +

[Stack]
Max Depth = 144
Call Chain = DCDC_ControlStep ⇒ DCDC_ReadMeasurements ⇒ sense_mv_to_voltage_mv ⇒ __aeabi_uldivmod +
+
[Calls]
>>   __aeabi_uldivmod +
>>   hrtim1_set_duty +
>>   latch_fault +
>>   hrtim_max_duty_ticks +
>>   DCDC_ReadMeasurements +
+
[Called By]
>>   main +
+ +
DCDC_FaultText (Thumb, 108 bytes, Stack size 12 bytes, dcdc.o(.text.DCDC_FaultText)) +

[Stack]
Max Depth = 12
Call Chain = DCDC_FaultText +
+
[Called By]
>>   main +
+ +
DCDC_GetDutyTicks (Thumb, 12 bytes, Stack size 0 bytes, dcdc.o(.text.DCDC_GetDutyTicks)) +

[Called By]
>>   main +
+ +
DCDC_GetFault (Thumb, 12 bytes, Stack size 0 bytes, dcdc.o(.text.DCDC_GetFault)) +

[Called By]
>>   main +
+ +
DCDC_GetPeriodTicks (Thumb, 12 bytes, Stack size 0 bytes, dcdc.o(.text.DCDC_GetPeriodTicks)) +

[Called By]
>>   main +
+ +
DCDC_GetState (Thumb, 12 bytes, Stack size 0 bytes, dcdc.o(.text.DCDC_GetState)) +

[Called By]
>>   main +
+ +
DCDC_Init (Thumb, 78 bytes, Stack size 8 bytes, dcdc.o(.text.DCDC_Init)) +

[Stack]
Max Depth = 104
Call Chain = DCDC_Init ⇒ hrtim1_timer_c_init ⇒ hrtim_period_from_clock ⇒ __aeabi_uldivmod +
+
[Calls]
>>   hrtim1_outputs_enable +
>>   hrtim1_timer_c_init +
>>   adc1_init +
>>   set_loads_off +
>>   set_usbpd_input_switch +
>>   gpio_init_for_dcdc +
+
[Called By]
>>   main +
+ +
DCDC_IsHrtimReady (Thumb, 16 bytes, Stack size 0 bytes, dcdc.o(.text.DCDC_IsHrtimReady)) +

[Called By]
>>   main +
+ +
DCDC_ReadMeasurements (Thumb, 112 bytes, Stack size 32 bytes, dcdc.o(.text.DCDC_ReadMeasurements)) +

[Stack]
Max Depth = 96
Call Chain = DCDC_ReadMeasurements ⇒ sense_mv_to_voltage_mv ⇒ __aeabi_uldivmod +
+
[Calls]
>>   sense_mv_to_current_ma +
>>   sense_mv_to_voltage_mv +
>>   adc_raw_to_mv +
>>   adc1_read_channel +
+
[Called By]
>>   DCDC_ControlStep +
>>   main +
+ +
DCDC_StateText (Thumb, 94 bytes, Stack size 12 bytes, dcdc.o(.text.DCDC_StateText)) +

[Stack]
Max Depth = 12
Call Chain = DCDC_StateText +
+
[Called By]
>>   main +
+ +
Retarget_Init (Thumb, 98 bytes, Stack size 16 bytes, retarget.o(.text.Retarget_Init)) +

[Stack]
Max Depth = 16
Call Chain = Retarget_Init +
+
[Calls]
>>   gpio_pc10_pc11_to_usart3 +
+
[Called By]
>>   main +
+ +
Retarget_PutChar (Thumb, 48 bytes, Stack size 4 bytes, retarget.o(.text.Retarget_PutChar)) +

[Stack]
Max Depth = 4
Call Chain = Retarget_PutChar +
+
[Called By]
>>   fputc +
+ +
SysTick_Handler (Thumb, 16 bytes, Stack size 0 bytes, board.o(.text.SysTick_Handler)) +
[Address Reference Count : 1]
startup_stm32g474xx.o(RESET) +
+
SystemCoreClockUpdate (Thumb, 206 bytes, Stack size 32 bytes, system_stm32g4xx.o(.text.SystemCoreClockUpdate)) +

[Stack]
Max Depth = 32
Call Chain = SystemCoreClockUpdate +
+
[Called By]
>>   Clock_UseHsi16 +
>>   SystemClock_Config +
+ +
SystemInit (Thumb, 32 bytes, Stack size 0 bytes, system_stm32g4xx.o(.text.SystemInit)) +
[Address Reference Count : 1]
startup_stm32g474xx.o(.text) +
+
_sys_exit (Thumb, 10 bytes, Stack size 4 bytes, retarget.o(.text._sys_exit)) +

[Stack]
Max Depth = 4
Call Chain = _sys_exit +
+
[Called By]
>>   __rt_exit_exit +
+ +
fputc (Thumb, 38 bytes, Stack size 16 bytes, retarget.o(.text.fputc)) +

[Stack]
Max Depth = 20
Call Chain = fputc ⇒ Retarget_PutChar +
+
[Calls]
>>   Retarget_PutChar +
+
[Address Reference Count : 1]
_printf_char_file.o(.text) +
+
main (Thumb, 362 bytes, Stack size 104 bytes, main.o(.text.main)) +

[Stack]
Max Depth = 248 + Unknown Stack Size +
Call Chain = main ⇒ printf ⇒ _printf_char_file ⇒ _printf_char_common ⇒ __printf +
+
[Calls]
>>   printf +
>>   DCDC_GetDutyTicks +
>>   DCDC_FaultText +
>>   DCDC_GetFault +
>>   DCDC_StateText +
>>   DCDC_GetState +
>>   DCDC_ReadMeasurements +
>>   DCDC_ControlStep +
>>   Board_Millis +
>>   DCDC_IsHrtimReady +
>>   DCDC_GetPeriodTicks +
>>   DCDC_Init +
>>   Retarget_Init +
>>   Board_Init +
+
[Called By]
>>   __rt_entry_main +
+ +
_btod_d2e (Thumb, 62 bytes, Stack size 0 bytes, btod.o(CL$$btod_d2e)) +

[Calls]
>>   _d2e_norm_op1 +
+
[Called By]
>>   _fp_digits +
+ +
_d2e_denorm_low (Thumb, 70 bytes, Stack size 0 bytes, btod.o(CL$$btod_d2e_denorm_low)) +

[Called By]
>>   _d2e_norm_op1 +
+ +
_d2e_norm_op1 (Thumb, 96 bytes, Stack size 0 bytes, btod.o(CL$$btod_d2e_norm_op1)) +

[Calls]
>>   _d2e_denorm_low +
+
[Called By]
>>   _btod_d2e +
+ +
__btod_div_common (Thumb, 696 bytes, Stack size 24 bytes, btod.o(CL$$btod_div_common)) +

[Stack]
Max Depth = 24
Call Chain = __btod_div_common +
+
[Called By]
>>   _btod_ediv +
+ +
_e2e (Thumb, 220 bytes, Stack size 24 bytes, btod.o(CL$$btod_e2e)) +

[Stack]
Max Depth = 24
Call Chain = _e2e +
+
[Called By]
>>   _btod_emul +
>>   _btod_ediv +
+ +
_btod_ediv (Thumb, 42 bytes, Stack size 28 bytes, btod.o(CL$$btod_ediv)) +

[Stack]
Max Depth = 52
Call Chain = _btod_ediv ⇒ _e2e +
+
[Calls]
>>   _e2e +
>>   __btod_div_common +
+
[Called By]
>>   _btod_etento +
>>   _fp_digits +
+ +
_btod_emul (Thumb, 42 bytes, Stack size 28 bytes, btod.o(CL$$btod_emul)) +

[Stack]
Max Depth = 52
Call Chain = _btod_emul ⇒ _e2e +
+
[Calls]
>>   __btod_mult_common +
>>   _e2e +
+
[Called By]
>>   _btod_etento +
>>   _fp_digits +
+ +
__btod_mult_common (Thumb, 580 bytes, Stack size 16 bytes, btod.o(CL$$btod_mult_common)) +

[Stack]
Max Depth = 16
Call Chain = __btod_mult_common +
+
[Called By]
>>   _btod_emul +
+ +
__ARM_fpclassify (Thumb, 48 bytes, Stack size 8 bytes, fpclassify.o(i.__ARM_fpclassify)) +

[Stack]
Max Depth = 8
Call Chain = __ARM_fpclassify +
+
[Called By]
>>   _printf_fp_hex_real +
>>   _printf_fp_dec_real +
+ +
_is_digit (Thumb, 14 bytes, Stack size 0 bytes, __printf_wp.o(i._is_digit)) +

[Called By]
>>   __printf +
+ +
_get_lc_numeric (Thumb, 44 bytes, Stack size 8 bytes, lc_numeric_c.o(locale$$code)) +

[Stack]
Max Depth = 16
Call Chain = _get_lc_numeric ⇒ strcmp +
+
[Calls]
>>   strcmp +
+
[Called By]
>>   __rt_lib_init_lc_numeric_2 +
+ +
_get_lc_ctype (Thumb, 44 bytes, Stack size 8 bytes, lc_ctype_c.o(locale$$code)) +

[Stack]
Max Depth = 16
Call Chain = _get_lc_ctype ⇒ strcmp +
+
[Calls]
>>   strcmp +
+
[Called By]
>>   __rt_lib_init_lc_ctype_2 +
+
[Address Reference Count : 1]
rt_ctype_table.o(.text) +
+
_fp_init (Thumb, 26 bytes, Stack size 0 bytes, fpinit.o(x$fpl$fpinit)) +

[Called By]
>>   __rt_lib_init_fp_1 +
+ +
__fplib_config_fpu_vfp (Thumb, 0 bytes, Stack size unknown bytes, fpinit.o(x$fpl$fpinit), UNUSED) + +
__fplib_config_pureend_doubles (Thumb, 0 bytes, Stack size unknown bytes, fpinit.o(x$fpl$fpinit), UNUSED) + +
_printf_fp_dec (Thumb, 4 bytes, Stack size 0 bytes, printf1.o(x$fpl$printf1)) +

[Stack]
Max Depth = 324
Call Chain = _printf_fp_dec ⇒ _printf_fp_dec_real ⇒ _fp_digits ⇒ _btod_etento ⇒ _btod_emul ⇒ _e2e +
+
[Calls]
>>   _printf_fp_dec_real +
+
[Called By]
>>   _printf_g +
>>   _printf_e +
>>   _printf_f +
+ +
_printf_fp_hex (Thumb, 4 bytes, Stack size 0 bytes, printf2.o(x$fpl$printf2)) +

[Stack]
Max Depth = 112
Call Chain = _printf_fp_hex ⇒ _printf_fp_hex_real ⇒ _printf_fp_infnan ⇒ _printf_post_padding +
+
[Calls]
>>   _printf_fp_hex_real +
+
[Called By]
>>   _printf_a +
+
+
+Local Symbols +
+
SystemClock_Config (Thumb, 274 bytes, Stack size 8 bytes, board.o(.text.SystemClock_Config)) +

[Stack]
Max Depth = 48
Call Chain = SystemClock_Config ⇒ Clock_UseHsi16 ⇒ SystemCoreClockUpdate +
+
[Calls]
>>   SystemCoreClockUpdate +
>>   wait_mask_value +
>>   wait_mask_set +
>>   Flash_SetLatency +
>>   wait_mask_clear +
>>   Clock_UseHsi16 +
+
[Called By]
>>   Board_Init +
+ +
SysTick_Config (Thumb, 82 bytes, Stack size 16 bytes, board.o(.text.SysTick_Config)) +

[Stack]
Max Depth = 24
Call Chain = SysTick_Config ⇒ __NVIC_SetPriority +
+
[Calls]
>>   __NVIC_SetPriority +
+
[Called By]
>>   Board_Init +
+ +
Clock_UseHsi16 (Thumb, 58 bytes, Stack size 8 bytes, board.o(.text.Clock_UseHsi16)) +

[Stack]
Max Depth = 40
Call Chain = Clock_UseHsi16 ⇒ SystemCoreClockUpdate +
+
[Calls]
>>   SystemCoreClockUpdate +
>>   wait_mask_value +
>>   wait_mask_set +
>>   Flash_SetLatency +
+
[Called By]
>>   SystemClock_Config +
+ +
wait_mask_clear (Thumb, 74 bytes, Stack size 16 bytes, board.o(.text.wait_mask_clear)) +

[Stack]
Max Depth = 16
Call Chain = wait_mask_clear +
+
[Called By]
>>   SystemClock_Config +
+ +
Flash_SetLatency (Thumb, 102 bytes, Stack size 12 bytes, board.o(.text.Flash_SetLatency)) +

[Stack]
Max Depth = 12
Call Chain = Flash_SetLatency +
+
[Called By]
>>   Clock_UseHsi16 +
>>   SystemClock_Config +
+ +
wait_mask_set (Thumb, 78 bytes, Stack size 16 bytes, board.o(.text.wait_mask_set)) +

[Stack]
Max Depth = 16
Call Chain = wait_mask_set +
+
[Called By]
>>   Clock_UseHsi16 +
>>   SystemClock_Config +
+ +
wait_mask_value (Thumb, 80 bytes, Stack size 20 bytes, board.o(.text.wait_mask_value)) +

[Stack]
Max Depth = 20
Call Chain = wait_mask_value +
+
[Called By]
>>   Clock_UseHsi16 +
>>   SystemClock_Config +
+ +
__NVIC_SetPriority (Thumb, 66 bytes, Stack size 8 bytes, board.o(.text.__NVIC_SetPriority)) +

[Stack]
Max Depth = 8
Call Chain = __NVIC_SetPriority +
+
[Called By]
>>   SysTick_Config +
+ +
gpio_init_for_dcdc (Thumb, 228 bytes, Stack size 0 bytes, dcdc.o(.text.gpio_init_for_dcdc)) +

[Called By]
>>   DCDC_Init +
+ +
set_usbpd_input_switch (Thumb, 48 bytes, Stack size 4 bytes, dcdc.o(.text.set_usbpd_input_switch)) +

[Stack]
Max Depth = 4
Call Chain = set_usbpd_input_switch +
+
[Called By]
>>   latch_fault +
>>   DCDC_Init +
+ +
set_loads_off (Thumb, 16 bytes, Stack size 0 bytes, dcdc.o(.text.set_loads_off)) +

[Called By]
>>   DCDC_Init +
+ +
adc1_init (Thumb, 166 bytes, Stack size 16 bytes, dcdc.o(.text.adc1_init)) +

[Stack]
Max Depth = 32
Call Chain = adc1_init ⇒ Board_DelayMs +
+
[Calls]
>>   Board_DelayMs +
+
[Called By]
>>   DCDC_Init +
+ +
hrtim1_timer_c_init (Thumb, 266 bytes, Stack size 24 bytes, dcdc.o(.text.hrtim1_timer_c_init)) +

[Stack]
Max Depth = 96
Call Chain = hrtim1_timer_c_init ⇒ hrtim_period_from_clock ⇒ __aeabi_uldivmod +
+
[Calls]
>>   hrtim_max_duty_ticks +
>>   hrtim1_wait_dll_ready +
>>   hrtim_period_from_clock +
+
[Called By]
>>   DCDC_Init +
+ +
hrtim1_outputs_enable (Thumb, 48 bytes, Stack size 4 bytes, dcdc.o(.text.hrtim1_outputs_enable)) +

[Stack]
Max Depth = 4
Call Chain = hrtim1_outputs_enable +
+
[Called By]
>>   latch_fault +
>>   DCDC_Init +
+ +
hrtim_period_from_clock (Thumb, 122 bytes, Stack size 24 bytes, dcdc.o(.text.hrtim_period_from_clock)) +

[Stack]
Max Depth = 72
Call Chain = hrtim_period_from_clock ⇒ __aeabi_uldivmod +
+
[Calls]
>>   __aeabi_uldivmod +
+
[Called By]
>>   hrtim1_timer_c_init +
+ +
hrtim1_wait_dll_ready (Thumb, 76 bytes, Stack size 8 bytes, dcdc.o(.text.hrtim1_wait_dll_ready)) +

[Stack]
Max Depth = 8
Call Chain = hrtim1_wait_dll_ready +
+
[Called By]
>>   hrtim1_timer_c_init +
+ +
hrtim_max_duty_ticks (Thumb, 66 bytes, Stack size 4 bytes, dcdc.o(.text.hrtim_max_duty_ticks)) +

[Stack]
Max Depth = 4
Call Chain = hrtim_max_duty_ticks +
+
[Called By]
>>   hrtim1_set_duty +
>>   hrtim1_timer_c_init +
>>   DCDC_ControlStep +
+ +
latch_fault (Thumb, 74 bytes, Stack size 16 bytes, dcdc.o(.text.latch_fault)) +

[Stack]
Max Depth = 36
Call Chain = latch_fault ⇒ hrtim1_set_duty ⇒ hrtim_max_duty_ticks +
+
[Calls]
>>   hrtim1_set_duty +
>>   hrtim1_outputs_enable +
>>   set_usbpd_input_switch +
+
[Called By]
>>   DCDC_ControlStep +
+ +
hrtim1_set_duty (Thumb, 76 bytes, Stack size 16 bytes, dcdc.o(.text.hrtim1_set_duty)) +

[Stack]
Max Depth = 20
Call Chain = hrtim1_set_duty ⇒ hrtim_max_duty_ticks +
+
[Calls]
>>   hrtim_max_duty_ticks +
+
[Called By]
>>   latch_fault +
>>   DCDC_ControlStep +
+ +
adc1_read_channel (Thumb, 74 bytes, Stack size 4 bytes, dcdc.o(.text.adc1_read_channel)) +

[Stack]
Max Depth = 4
Call Chain = adc1_read_channel +
+
[Called By]
>>   DCDC_ReadMeasurements +
+ +
adc_raw_to_mv (Thumb, 32 bytes, Stack size 4 bytes, dcdc.o(.text.adc_raw_to_mv)) +

[Stack]
Max Depth = 4
Call Chain = adc_raw_to_mv +
+
[Called By]
>>   DCDC_ReadMeasurements +
+ +
sense_mv_to_voltage_mv (Thumb, 34 bytes, Stack size 16 bytes, dcdc.o(.text.sense_mv_to_voltage_mv)) +

[Stack]
Max Depth = 64
Call Chain = sense_mv_to_voltage_mv ⇒ __aeabi_uldivmod +
+
[Calls]
>>   __aeabi_uldivmod +
+
[Called By]
>>   DCDC_ReadMeasurements +
+ +
sense_mv_to_current_ma (Thumb, 30 bytes, Stack size 4 bytes, dcdc.o(.text.sense_mv_to_current_ma)) +

[Stack]
Max Depth = 4
Call Chain = sense_mv_to_current_ma +
+
[Called By]
>>   DCDC_ReadMeasurements +
+ +
gpio_pc10_pc11_to_usart3 (Thumb, 116 bytes, Stack size 0 bytes, retarget.o(.text.gpio_pc10_pc11_to_usart3)) +

[Called By]
>>   Retarget_Init +
+ +
_fp_digits (Thumb, 432 bytes, Stack size 96 bytes, _printf_fp_dec.o(.text)) +

[Stack]
Max Depth = 220
Call Chain = _fp_digits ⇒ _btod_etento ⇒ _btod_emul ⇒ _e2e +
+
[Calls]
>>   _btod_emul +
>>   _btod_ediv +
>>   _btod_d2e +
>>   _btod_etento +
>>   _ll_udiv10 +
+
[Called By]
>>   _printf_fp_dec_real +
+ +
_printf_input_char (Thumb, 10 bytes, Stack size 0 bytes, _printf_char_common.o(.text)) +
[Address Reference Count : 1]
_printf_char_common.o(.text) +
+
+Undefined Global Symbols +
diff --git a/B-G474E-DPOW1_Keil/Objects/B-G474E-DPOW1_DCDC.lnp b/B-G474E-DPOW1_Keil/Objects/B-G474E-DPOW1_DCDC.lnp new file mode 100644 index 0000000..cd7af3a --- /dev/null +++ b/B-G474E-DPOW1_Keil/Objects/B-G474E-DPOW1_DCDC.lnp @@ -0,0 +1,11 @@ +--cpu=Cortex-M4.fp.sp +"objects\startup_stm32g474xx.o" +"objects\main.o" +"objects\board.o" +"objects\dcdc.o" +"objects\retarget.o" +"objects\system_stm32g4xx.o" +--strict --scatter "Objects\B-G474E-DPOW1_DCDC.sct" +--summary_stderr --info summarysizes --map --load_addr_map_info --xref --callgraph --symbols +--info sizes --info totals --info unused --info veneers +--list "Listings\B-G474E-DPOW1_DCDC.map" -o Objects\B-G474E-DPOW1_DCDC.axf \ No newline at end of file diff --git a/B-G474E-DPOW1_Keil/Objects/B-G474E-DPOW1_DCDC.sct b/B-G474E-DPOW1_Keil/Objects/B-G474E-DPOW1_DCDC.sct new file mode 100644 index 0000000..eab6f57 --- /dev/null +++ b/B-G474E-DPOW1_Keil/Objects/B-G474E-DPOW1_DCDC.sct @@ -0,0 +1,16 @@ +; ************************************************************* +; *** Scatter-Loading Description File generated by uVision *** +; ************************************************************* + +LR_IROM1 0x08000000 0x00080000 { ; load region size_region + ER_IROM1 0x08000000 0x00080000 { ; load address = execution address + *.o (RESET, +First) + *(InRoot$$Sections) + .ANY (+RO) + .ANY (+XO) + } + RW_IRAM1 0x20000000 0x00020000 { ; RW data + .ANY (+RW +ZI) + } +} + diff --git a/B-G474E-DPOW1_Keil/Objects/B-G474E-DPOW1_DCDC_B-G474E-DPOW1_DCDC.dep b/B-G474E-DPOW1_Keil/Objects/B-G474E-DPOW1_DCDC_B-G474E-DPOW1_DCDC.dep new file mode 100644 index 0000000..5f2147e --- /dev/null +++ b/B-G474E-DPOW1_Keil/Objects/B-G474E-DPOW1_DCDC_B-G474E-DPOW1_DCDC.dep @@ -0,0 +1,35 @@ +Dependencies for Project 'B-G474E-DPOW1_DCDC', Target 'B-G474E-DPOW1_DCDC': (DO NOT MODIFY !) +CompilerVersion: 6220000::V6.22::ARMCLANG +F (C:\Keil_v5\ARM\Packs\Keil\STM32G4xx_DFP\1.6.0\Drivers\CMSIS\Device\ST\STM32G4xx\Source\Templates\arm\startup_stm32g474xx.s)(0x65DDA5FC)(--target=arm-arm-none-eabi -mcpu=cortex-m4 -mfpu=fpv4-sp-d16 -mfloat-abi=hard -masm=auto -Wa,armasm,--diag_suppress=A1950W -c -gdwarf-4 -IC:/Keil_v5_41/ARM/Packs/Keil/STM32G4xx_DFP/1.6.0/Drivers/CMSIS/Device/ST/STM32G4xx/Include -Wa,armasm,--pd,"__UVISION_VERSION SETA 541" -Wa,armasm,--pd,"STM32G474xx SETA 1" -o objects/startup_stm32g474xx.o) +F (Core\Src\main.c)(0x6A11BEDB)(-xc -std=c99 --target=arm-arm-none-eabi -mcpu=cortex-m4 -mfpu=fpv4-sp-d16 -mfloat-abi=hard -c -fno-rtti -funsigned-char -fshort-enums -fshort-wchar -gdwarf-4 -O0 -ffunction-sections -Wno-packed -Wno-missing-variable-declarations -Wno-missing-prototypes -Wno-missing-noreturn -Wno-sign-conversion -Wno-nonportable-include-path -Wno-reserved-id-macro -Wno-unused-macros -Wno-documentation-unknown-command -Wno-documentation -Wno-license-management -Wno-parentheses-equality -Wno-reserved-identifier -I Core/Inc -I C:/Keil_v5/ARM/Packs/Keil/STM32G4xx_DFP/1.6.0/Drivers/CMSIS/Device/ST/STM32G4xx/Include -I C:/Keil_v5/ARM/Packs/ARM/CMSIS/6.1.0/CMSIS/Core/Include -IC:/Keil_v5_41/ARM/Packs/Keil/STM32G4xx_DFP/1.6.0/Drivers/CMSIS/Device/ST/STM32G4xx/Include -D__UVISION_VERSION="541" -DSTM32G474xx -DSTM32G474xx -o objects/main.o -MMD) +I (Core\Inc\app_config.h)(0x6A11BECA) +I (Core\Inc\board.h)(0x6A1198E7) +I (Core\Inc\dcdc.h)(0x6A11BECE) +I (Core\Inc\retarget.h)(0x6A1198E7) +I (C:\Keil_v5\ARM\Packs\Keil\STM32G4xx_DFP\1.6.0\Drivers\CMSIS\Device\ST\STM32G4xx\Include\stm32g474xx.h)(0x65DDA5FC) +I (C:\Keil_v5\ARM\Packs\ARM\CMSIS\6.1.0\CMSIS\Core\Include\core_cm4.h)(0x664C1ED8) +I (C:\Keil_v5\ARM\Packs\Keil\STM32G4xx_DFP\1.6.0\Drivers\CMSIS\Device\ST\STM32G4xx\Include\system_stm32g4xx.h)(0x65DDA5FC) +F (Core\Src\board.c)(0x6A11B765)(-xc -std=c99 --target=arm-arm-none-eabi -mcpu=cortex-m4 -mfpu=fpv4-sp-d16 -mfloat-abi=hard -c -fno-rtti -funsigned-char -fshort-enums -fshort-wchar -gdwarf-4 -O0 -ffunction-sections -Wno-packed -Wno-missing-variable-declarations -Wno-missing-prototypes -Wno-missing-noreturn -Wno-sign-conversion -Wno-nonportable-include-path -Wno-reserved-id-macro -Wno-unused-macros -Wno-documentation-unknown-command -Wno-documentation -Wno-license-management -Wno-parentheses-equality -Wno-reserved-identifier -I Core/Inc -I C:/Keil_v5/ARM/Packs/Keil/STM32G4xx_DFP/1.6.0/Drivers/CMSIS/Device/ST/STM32G4xx/Include -I C:/Keil_v5/ARM/Packs/ARM/CMSIS/6.1.0/CMSIS/Core/Include -IC:/Keil_v5_41/ARM/Packs/Keil/STM32G4xx_DFP/1.6.0/Drivers/CMSIS/Device/ST/STM32G4xx/Include -D__UVISION_VERSION="541" -DSTM32G474xx -DSTM32G474xx -o objects/board.o -MMD) +I (Core\Inc\board.h)(0x6A1198E7) +I (Core\Inc\app_config.h)(0x6A11BECA) +I (C:\Keil_v5\ARM\Packs\Keil\STM32G4xx_DFP\1.6.0\Drivers\CMSIS\Device\ST\STM32G4xx\Include\stm32g474xx.h)(0x65DDA5FC) +I (C:\Keil_v5\ARM\Packs\ARM\CMSIS\6.1.0\CMSIS\Core\Include\core_cm4.h)(0x664C1ED8) +I (C:\Keil_v5\ARM\Packs\Keil\STM32G4xx_DFP\1.6.0\Drivers\CMSIS\Device\ST\STM32G4xx\Include\system_stm32g4xx.h)(0x65DDA5FC) +F (Core\Src\dcdc.c)(0x6A11BED2)(-xc -std=c99 --target=arm-arm-none-eabi -mcpu=cortex-m4 -mfpu=fpv4-sp-d16 -mfloat-abi=hard -c -fno-rtti -funsigned-char -fshort-enums -fshort-wchar -gdwarf-4 -O0 -ffunction-sections -Wno-packed -Wno-missing-variable-declarations -Wno-missing-prototypes -Wno-missing-noreturn -Wno-sign-conversion -Wno-nonportable-include-path -Wno-reserved-id-macro -Wno-unused-macros -Wno-documentation-unknown-command -Wno-documentation -Wno-license-management -Wno-parentheses-equality -Wno-reserved-identifier -I Core/Inc -I C:/Keil_v5/ARM/Packs/Keil/STM32G4xx_DFP/1.6.0/Drivers/CMSIS/Device/ST/STM32G4xx/Include -I C:/Keil_v5/ARM/Packs/ARM/CMSIS/6.1.0/CMSIS/Core/Include -IC:/Keil_v5_41/ARM/Packs/Keil/STM32G4xx_DFP/1.6.0/Drivers/CMSIS/Device/ST/STM32G4xx/Include -D__UVISION_VERSION="541" -DSTM32G474xx -DSTM32G474xx -o objects/dcdc.o -MMD) +I (Core\Inc\dcdc.h)(0x6A11BECE) +I (Core\Inc\app_config.h)(0x6A11BECA) +I (Core\Inc\board.h)(0x6A1198E7) +I (C:\Keil_v5\ARM\Packs\Keil\STM32G4xx_DFP\1.6.0\Drivers\CMSIS\Device\ST\STM32G4xx\Include\stm32g474xx.h)(0x65DDA5FC) +I (C:\Keil_v5\ARM\Packs\ARM\CMSIS\6.1.0\CMSIS\Core\Include\core_cm4.h)(0x664C1ED8) +I (C:\Keil_v5\ARM\Packs\Keil\STM32G4xx_DFP\1.6.0\Drivers\CMSIS\Device\ST\STM32G4xx\Include\system_stm32g4xx.h)(0x65DDA5FC) +F (Core\Src\retarget.c)(0x6A11B63D)(-xc -std=c99 --target=arm-arm-none-eabi -mcpu=cortex-m4 -mfpu=fpv4-sp-d16 -mfloat-abi=hard -c -fno-rtti -funsigned-char -fshort-enums -fshort-wchar -gdwarf-4 -O0 -ffunction-sections -Wno-packed -Wno-missing-variable-declarations -Wno-missing-prototypes -Wno-missing-noreturn -Wno-sign-conversion -Wno-nonportable-include-path -Wno-reserved-id-macro -Wno-unused-macros -Wno-documentation-unknown-command -Wno-documentation -Wno-license-management -Wno-parentheses-equality -Wno-reserved-identifier -I Core/Inc -I C:/Keil_v5/ARM/Packs/Keil/STM32G4xx_DFP/1.6.0/Drivers/CMSIS/Device/ST/STM32G4xx/Include -I C:/Keil_v5/ARM/Packs/ARM/CMSIS/6.1.0/CMSIS/Core/Include -IC:/Keil_v5_41/ARM/Packs/Keil/STM32G4xx_DFP/1.6.0/Drivers/CMSIS/Device/ST/STM32G4xx/Include -D__UVISION_VERSION="541" -DSTM32G474xx -DSTM32G474xx -o objects/retarget.o -MMD) +I (Core\Inc\retarget.h)(0x6A1198E7) +I (Core\Inc\app_config.h)(0x6A11BECA) +I (C:\Keil_v5\ARM\Packs\Keil\STM32G4xx_DFP\1.6.0\Drivers\CMSIS\Device\ST\STM32G4xx\Include\stm32g474xx.h)(0x65DDA5FC) +I (C:\Keil_v5\ARM\Packs\ARM\CMSIS\6.1.0\CMSIS\Core\Include\core_cm4.h)(0x664C1ED8) +I (C:\Keil_v5\ARM\Packs\Keil\STM32G4xx_DFP\1.6.0\Drivers\CMSIS\Device\ST\STM32G4xx\Include\system_stm32g4xx.h)(0x65DDA5FC) +F (Core\Src\system_stm32g4xx.c)(0x6A1198E7)(-xc -std=c99 --target=arm-arm-none-eabi -mcpu=cortex-m4 -mfpu=fpv4-sp-d16 -mfloat-abi=hard -c -fno-rtti -funsigned-char -fshort-enums -fshort-wchar -gdwarf-4 -O0 -ffunction-sections -Wno-packed -Wno-missing-variable-declarations -Wno-missing-prototypes -Wno-missing-noreturn -Wno-sign-conversion -Wno-nonportable-include-path -Wno-reserved-id-macro -Wno-unused-macros -Wno-documentation-unknown-command -Wno-documentation -Wno-license-management -Wno-parentheses-equality -Wno-reserved-identifier -I Core/Inc -I C:/Keil_v5/ARM/Packs/Keil/STM32G4xx_DFP/1.6.0/Drivers/CMSIS/Device/ST/STM32G4xx/Include -I C:/Keil_v5/ARM/Packs/ARM/CMSIS/6.1.0/CMSIS/Core/Include -IC:/Keil_v5_41/ARM/Packs/Keil/STM32G4xx_DFP/1.6.0/Drivers/CMSIS/Device/ST/STM32G4xx/Include -D__UVISION_VERSION="541" -DSTM32G474xx -DSTM32G474xx -o objects/system_stm32g4xx.o -MMD) +I (C:\Keil_v5\ARM\Packs\Keil\STM32G4xx_DFP\1.6.0\Drivers\CMSIS\Device\ST\STM32G4xx\Include\stm32g474xx.h)(0x65DDA5FC) +I (C:\Keil_v5\ARM\Packs\ARM\CMSIS\6.1.0\CMSIS\Core\Include\core_cm4.h)(0x664C1ED8) +I (C:\Keil_v5\ARM\Packs\Keil\STM32G4xx_DFP\1.6.0\Drivers\CMSIS\Device\ST\STM32G4xx\Include\system_stm32g4xx.h)(0x65DDA5FC) +I (Core\Inc\app_config.h)(0x6A11BECA) diff --git a/B-G474E-DPOW1_Keil/Objects/ExtDll.iex b/B-G474E-DPOW1_Keil/Objects/ExtDll.iex new file mode 100644 index 0000000..6c0896e --- /dev/null +++ b/B-G474E-DPOW1_Keil/Objects/ExtDll.iex @@ -0,0 +1,2 @@ +[EXTDLL] +Count=0 diff --git a/B-G474E-DPOW1_Keil/Objects/board.d b/B-G474E-DPOW1_Keil/Objects/board.d new file mode 100644 index 0000000..a4afecc --- /dev/null +++ b/B-G474E-DPOW1_Keil/Objects/board.d @@ -0,0 +1,4 @@ +objects/board.o: Core\Src\board.c Core\Inc\board.h Core\Inc\app_config.h \ + C:\Keil_v5\ARM\Packs\Keil\STM32G4xx_DFP\1.6.0\Drivers\CMSIS\Device\ST\STM32G4xx\Include\stm32g474xx.h \ + C:\Keil_v5\ARM\Packs\ARM\CMSIS\6.1.0\CMSIS\Core\Include\core_cm4.h \ + C:\Keil_v5\ARM\Packs\Keil\STM32G4xx_DFP\1.6.0\Drivers\CMSIS\Device\ST\STM32G4xx\Include\system_stm32g4xx.h diff --git a/B-G474E-DPOW1_Keil/Objects/board.o b/B-G474E-DPOW1_Keil/Objects/board.o new file mode 100644 index 0000000..cff08d9 Binary files /dev/null and b/B-G474E-DPOW1_Keil/Objects/board.o differ diff --git a/B-G474E-DPOW1_Keil/Objects/dcdc.d b/B-G474E-DPOW1_Keil/Objects/dcdc.d new file mode 100644 index 0000000..0d39f59 --- /dev/null +++ b/B-G474E-DPOW1_Keil/Objects/dcdc.d @@ -0,0 +1,5 @@ +objects/dcdc.o: Core\Src\dcdc.c Core\Inc\dcdc.h Core\Inc\app_config.h \ + Core\Inc\board.h \ + C:\Keil_v5\ARM\Packs\Keil\STM32G4xx_DFP\1.6.0\Drivers\CMSIS\Device\ST\STM32G4xx\Include\stm32g474xx.h \ + C:\Keil_v5\ARM\Packs\ARM\CMSIS\6.1.0\CMSIS\Core\Include\core_cm4.h \ + C:\Keil_v5\ARM\Packs\Keil\STM32G4xx_DFP\1.6.0\Drivers\CMSIS\Device\ST\STM32G4xx\Include\system_stm32g4xx.h diff --git a/B-G474E-DPOW1_Keil/Objects/dcdc.o b/B-G474E-DPOW1_Keil/Objects/dcdc.o new file mode 100644 index 0000000..80573fd Binary files /dev/null and b/B-G474E-DPOW1_Keil/Objects/dcdc.o differ diff --git a/B-G474E-DPOW1_Keil/Objects/main.d b/B-G474E-DPOW1_Keil/Objects/main.d new file mode 100644 index 0000000..83294c6 --- /dev/null +++ b/B-G474E-DPOW1_Keil/Objects/main.d @@ -0,0 +1,5 @@ +objects/main.o: Core\Src\main.c Core\Inc\app_config.h Core\Inc\board.h \ + Core\Inc\dcdc.h Core\Inc\retarget.h \ + C:\Keil_v5\ARM\Packs\Keil\STM32G4xx_DFP\1.6.0\Drivers\CMSIS\Device\ST\STM32G4xx\Include\stm32g474xx.h \ + C:\Keil_v5\ARM\Packs\ARM\CMSIS\6.1.0\CMSIS\Core\Include\core_cm4.h \ + C:\Keil_v5\ARM\Packs\Keil\STM32G4xx_DFP\1.6.0\Drivers\CMSIS\Device\ST\STM32G4xx\Include\system_stm32g4xx.h diff --git a/B-G474E-DPOW1_Keil/Objects/main.o b/B-G474E-DPOW1_Keil/Objects/main.o new file mode 100644 index 0000000..f09fb19 Binary files /dev/null and b/B-G474E-DPOW1_Keil/Objects/main.o differ diff --git a/B-G474E-DPOW1_Keil/Objects/retarget.d b/B-G474E-DPOW1_Keil/Objects/retarget.d new file mode 100644 index 0000000..39a3fce --- /dev/null +++ b/B-G474E-DPOW1_Keil/Objects/retarget.d @@ -0,0 +1,5 @@ +objects/retarget.o: Core\Src\retarget.c Core\Inc\retarget.h \ + Core\Inc\app_config.h \ + C:\Keil_v5\ARM\Packs\Keil\STM32G4xx_DFP\1.6.0\Drivers\CMSIS\Device\ST\STM32G4xx\Include\stm32g474xx.h \ + C:\Keil_v5\ARM\Packs\ARM\CMSIS\6.1.0\CMSIS\Core\Include\core_cm4.h \ + C:\Keil_v5\ARM\Packs\Keil\STM32G4xx_DFP\1.6.0\Drivers\CMSIS\Device\ST\STM32G4xx\Include\system_stm32g4xx.h diff --git a/B-G474E-DPOW1_Keil/Objects/retarget.o b/B-G474E-DPOW1_Keil/Objects/retarget.o new file mode 100644 index 0000000..42e40af Binary files /dev/null and b/B-G474E-DPOW1_Keil/Objects/retarget.o differ diff --git a/B-G474E-DPOW1_Keil/Objects/startup_stm32g474xx.o b/B-G474E-DPOW1_Keil/Objects/startup_stm32g474xx.o new file mode 100644 index 0000000..fc6e1f5 Binary files /dev/null and b/B-G474E-DPOW1_Keil/Objects/startup_stm32g474xx.o differ diff --git a/B-G474E-DPOW1_Keil/Objects/system_stm32g4xx.d b/B-G474E-DPOW1_Keil/Objects/system_stm32g4xx.d new file mode 100644 index 0000000..c6467c7 --- /dev/null +++ b/B-G474E-DPOW1_Keil/Objects/system_stm32g4xx.d @@ -0,0 +1,5 @@ +objects/system_stm32g4xx.o: Core\Src\system_stm32g4xx.c \ + C:\Keil_v5\ARM\Packs\Keil\STM32G4xx_DFP\1.6.0\Drivers\CMSIS\Device\ST\STM32G4xx\Include\stm32g474xx.h \ + C:\Keil_v5\ARM\Packs\ARM\CMSIS\6.1.0\CMSIS\Core\Include\core_cm4.h \ + C:\Keil_v5\ARM\Packs\Keil\STM32G4xx_DFP\1.6.0\Drivers\CMSIS\Device\ST\STM32G4xx\Include\system_stm32g4xx.h \ + Core\Inc\app_config.h diff --git a/B-G474E-DPOW1_Keil/Objects/system_stm32g4xx.o b/B-G474E-DPOW1_Keil/Objects/system_stm32g4xx.o new file mode 100644 index 0000000..4862577 Binary files /dev/null and b/B-G474E-DPOW1_Keil/Objects/system_stm32g4xx.o differ diff --git a/B-G474E-DPOW1_Keil/README.md b/B-G474E-DPOW1_Keil/README.md new file mode 100644 index 0000000..28841da --- /dev/null +++ b/B-G474E-DPOW1_Keil/README.md @@ -0,0 +1,20 @@ +# B-G474E-DPOW1 Keil DCDC Starter + +Starter project for Keil MDK/uVision and the ST B-G474E-DPOW1 Discovery kit. + +What is included: + +- `printf` retarget to ST-LINK VCP: USART3 on PC10/PC11, 115200 baud. +- HRTIM1 Timer C setup for the onboard buck leg: PB12/PB13, 200 kHz, complementary outputs, dead-time. +- ADC monitor for PA1 VIN, PA2 input current average, PA3 VOUT. +- Readable voltage/current protection and a small starter PI voltage loop. + +Important safety defaults: + +- `DCDC_POWER_STAGE_ENABLE` is `0` in `Core/Inc/app_config.h`. The firmware configures peripherals and prints measurements, but HRTIM outputs remain disabled. +- Before setting it to `1`, check JP1/JP5, use a current-limited VIN source, connect a safe load, and verify PB12/PB13 dead-time with an oscilloscope. +- `DCDC_CONNECT_USBPD_INPUT` is also `0`. Set it to `1` only if JP1 is prepared to feed VIN from USB-PD and the USB-PD source is appropriate. + +Open `B-G474E-DPOW1_DCDC.uvprojx` in Keil and build the target `B-G474E-DPOW1_DCDC`. + +The project references the local Keil packs under `C:\Keil_v5\ARM\Packs`. If Keil is installed elsewhere, update the include paths and startup file path in the uVision project options. diff --git a/B-G474E-DPOW1_Keil/build.log b/B-G474E-DPOW1_Keil/build.log new file mode 100644 index 0000000..9295be2 --- /dev/null +++ b/B-G474E-DPOW1_Keil/build.log @@ -0,0 +1,8 @@ +*** Using Compiler 'V6.19', folder: 'C:\Keil_v5\ARM\ARMCLANG\Bin' +Build target 'B-G474E-DPOW1_DCDC' +compiling retarget.c... +linking... +Program Size: Code=10224 RO-data=1396 RW-data=8 ZI-data=1736 +FromELF: creating hex file... +"Objects\B-G474E-DPOW1_DCDC.axf" - 0 Error(s), 0 Warning(s). +Build Time Elapsed: 00:00:01 diff --git a/B-G474E-DPOW1_Keil/rebuild.log b/B-G474E-DPOW1_Keil/rebuild.log new file mode 100644 index 0000000..0f72151 --- /dev/null +++ b/B-G474E-DPOW1_Keil/rebuild.log @@ -0,0 +1,13 @@ +*** Using Compiler 'V6.19', folder: 'C:\Keil_v5\ARM\ARMCLANG\Bin' +Rebuild target 'B-G474E-DPOW1_DCDC' +assembling startup_stm32g474xx.s... +compiling main.c... +compiling board.c... +compiling retarget.c... +compiling dcdc.c... +compiling system_stm32g4xx.c... +linking... +Program Size: Code=10720 RO-data=1440 RW-data=12 ZI-data=1740 +FromELF: creating hex file... +"Objects\B-G474E-DPOW1_DCDC.axf" - 0 Error(s), 0 Warning(s). +Build Time Elapsed: 00:00:00 diff --git a/B-G474E-DPOW1_Keil/rebuild_541.log b/B-G474E-DPOW1_Keil/rebuild_541.log new file mode 100644 index 0000000..3a9778e --- /dev/null +++ b/B-G474E-DPOW1_Keil/rebuild_541.log @@ -0,0 +1,13 @@ +*** Using Compiler 'V6.22', folder: 'C:\Keil_v5_41\ARM\ARMCLANG\Bin' +Rebuild target 'B-G474E-DPOW1_DCDC' +compiling retarget.c... +compiling main.c... +compiling system_stm32g4xx.c... +compiling dcdc.c... +assembling startup_stm32g474xx.s... +compiling board.c... +linking... +Program Size: Code=11224 RO-data=1476 RW-data=12 ZI-data=1740 +FromELF: creating hex file... +"Objects\B-G474E-DPOW1_DCDC.axf" - 0 Error(s), 0 Warning(s). +Build Time Elapsed: 00:00:01