Files
WB55cgu/Core/Src/stm32wbxx_it.c

432 lines
10 KiB
C

/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file stm32wbxx_it.c
* @brief Interrupt Service Routines.
******************************************************************************
* @attention
*
* Copyright (c) 2020-2023 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Includes ------------------------------------------------------------------*/
#include "main.h"
#include "stm32wbxx_it.h"
/* Private includes ----------------------------------------------------------*/
/* USER CODE BEGIN Includes */
/* USER CODE END Includes */
/* Private typedef -----------------------------------------------------------*/
/* USER CODE BEGIN TD */
/* USER CODE END TD */
/* Private define ------------------------------------------------------------*/
/* USER CODE BEGIN PD */
/* USER CODE END PD */
/* Private macro -------------------------------------------------------------*/
/* USER CODE BEGIN PM */
/* USER CODE END PM */
/* Private variables ---------------------------------------------------------*/
/* USER CODE BEGIN PV */
/* USER CODE END PV */
/* Private function prototypes -----------------------------------------------*/
/* USER CODE BEGIN PFP */
/* USER CODE END PFP */
/* Private user code ---------------------------------------------------------*/
/* USER CODE BEGIN 0 */
/* USER CODE END 0 */
/* External variables --------------------------------------------------------*/
extern IPCC_HandleTypeDef hipcc;
extern DMA_HandleTypeDef hdma_lpuart1_tx;
extern DMA_HandleTypeDef hdma_usart1_tx;
extern UART_HandleTypeDef hlpuart1;
extern UART_HandleTypeDef huart1;
extern RTC_HandleTypeDef hrtc;
/* USER CODE BEGIN EV */
/* USER CODE END EV */
/******************************************************************************/
/* Cortex Processor Interruption and Exception Handlers */
/******************************************************************************/
/**
* @brief This function handles Non maskable interrupt.
*/
void NMI_Handler(void)
{
/* USER CODE BEGIN NonMaskableInt_IRQn 0 */
/* USER CODE END NonMaskableInt_IRQn 0 */
/* USER CODE BEGIN NonMaskableInt_IRQn 1 */
while (1)
{
}
/* USER CODE END NonMaskableInt_IRQn 1 */
}
/**
* @brief This function handles Hard fault interrupt.
*/
void HardFault_Handler(void)
{
/* USER CODE BEGIN HardFault_IRQn 0 */
/* USER CODE END HardFault_IRQn 0 */
while (1)
{
/* USER CODE BEGIN W1_HardFault_IRQn 0 */
/* USER CODE END W1_HardFault_IRQn 0 */
}
}
/**
* @brief This function handles Memory management fault.
*/
void MemManage_Handler(void)
{
/* USER CODE BEGIN MemoryManagement_IRQn 0 */
/* USER CODE END MemoryManagement_IRQn 0 */
while (1)
{
/* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
/* USER CODE END W1_MemoryManagement_IRQn 0 */
}
}
/**
* @brief This function handles Prefetch fault, memory access fault.
*/
void BusFault_Handler(void)
{
/* USER CODE BEGIN BusFault_IRQn 0 */
/* USER CODE END BusFault_IRQn 0 */
while (1)
{
/* USER CODE BEGIN W1_BusFault_IRQn 0 */
/* USER CODE END W1_BusFault_IRQn 0 */
}
}
/**
* @brief This function handles Undefined instruction or illegal state.
*/
void UsageFault_Handler(void)
{
/* USER CODE BEGIN UsageFault_IRQn 0 */
/* USER CODE END UsageFault_IRQn 0 */
while (1)
{
/* USER CODE BEGIN W1_UsageFault_IRQn 0 */
/* USER CODE END W1_UsageFault_IRQn 0 */
}
}
/**
* @brief This function handles System service call via SWI instruction.
*/
void SVC_Handler(void)
{
/* USER CODE BEGIN SVCall_IRQn 0 */
/* USER CODE END SVCall_IRQn 0 */
/* USER CODE BEGIN SVCall_IRQn 1 */
/* USER CODE END SVCall_IRQn 1 */
}
/**
* @brief This function handles Debug monitor.
*/
void DebugMon_Handler(void)
{
/* USER CODE BEGIN DebugMonitor_IRQn 0 */
/* USER CODE END DebugMonitor_IRQn 0 */
/* USER CODE BEGIN DebugMonitor_IRQn 1 */
/* USER CODE END DebugMonitor_IRQn 1 */
}
/**
* @brief This function handles Pendable request for system service.
*/
void PendSV_Handler(void)
{
/* USER CODE BEGIN PendSV_IRQn 0 */
/* USER CODE END PendSV_IRQn 0 */
/* USER CODE BEGIN PendSV_IRQn 1 */
/* USER CODE END PendSV_IRQn 1 */
}
/**
* @brief This function handles System tick timer.
*/
void SysTick_Handler(void)
{
/* USER CODE BEGIN SysTick_IRQn 0 */
/* USER CODE END SysTick_IRQn 0 */
HAL_IncTick();
/* USER CODE BEGIN SysTick_IRQn 1 */
/* USER CODE END SysTick_IRQn 1 */
}
/******************************************************************************/
/* STM32WBxx Peripheral Interrupt Handlers */
/* Add here the Interrupt Handlers for the used peripherals. */
/* For the available peripheral interrupt handler names, */
/* please refer to the startup file (startup_stm32wbxx.s). */
/******************************************************************************/
/**
* @brief This function handles PVD/PVM0/PVM2 interrupts through EXTI lines 16/31/33.
*/
void PVD_PVM_IRQHandler(void)
{
/* USER CODE BEGIN PVD_PVM_IRQn 0 */
/* USER CODE END PVD_PVM_IRQn 0 */
HAL_PWREx_PVD_PVM_IRQHandler();
/* USER CODE BEGIN PVD_PVM_IRQn 1 */
/* USER CODE END PVD_PVM_IRQn 1 */
}
/**
* @brief This function handles RTC wake-up interrupt through EXTI line 19.
*/
void RTC_WKUP_IRQHandler(void)
{
/* USER CODE BEGIN RTC_WKUP_IRQn 0 */
/* USER CODE END RTC_WKUP_IRQn 0 */
HAL_RTCEx_WakeUpTimerIRQHandler(&hrtc);
/* USER CODE BEGIN RTC_WKUP_IRQn 1 */
/* USER CODE END RTC_WKUP_IRQn 1 */
}
/**
* @brief This function handles Flash global interrupt.
*/
void FLASH_IRQHandler(void)
{
/* USER CODE BEGIN FLASH_IRQn 0 */
/* USER CODE END FLASH_IRQn 0 */
HAL_FLASH_IRQHandler();
/* USER CODE BEGIN FLASH_IRQn 1 */
/* USER CODE END FLASH_IRQn 1 */
}
/**
* @brief This function handles RCC global interrupt.
*/
void RCC_IRQHandler(void)
{
/* USER CODE BEGIN RCC_IRQn 0 */
/* USER CODE END RCC_IRQn 0 */
/* USER CODE BEGIN RCC_IRQn 1 */
/* USER CODE END RCC_IRQn 1 */
}
/**
* @brief This function handles DMA1 channel1 global interrupt.
*/
void DMA1_Channel1_IRQHandler(void)
{
/* USER CODE BEGIN DMA1_Channel1_IRQn 0 */
/* USER CODE END DMA1_Channel1_IRQn 0 */
HAL_DMA_IRQHandler(&hdma_lpuart1_tx);
/* USER CODE BEGIN DMA1_Channel1_IRQn 1 */
/* USER CODE END DMA1_Channel1_IRQn 1 */
}
/**
* @brief This function handles DMA1 channel2 global interrupt.
*/
void DMA1_Channel2_IRQHandler(void)
{
/* USER CODE BEGIN DMA1_Channel2_IRQn 0 */
/* USER CODE END DMA1_Channel2_IRQn 0 */
HAL_DMA_IRQHandler(&hdma_usart1_tx);
/* USER CODE BEGIN DMA1_Channel2_IRQn 1 */
/* USER CODE END DMA1_Channel2_IRQn 1 */
}
/**
* @brief This function handles CPU2 SEV interrupt through EXTI line 40 and PWR CPU2 HOLD wake-up interrupt.
*/
void C2SEV_PWR_C2H_IRQHandler(void)
{
/* USER CODE BEGIN C2SEV_PWR_C2H_IRQn 0 */
/* USER CODE END C2SEV_PWR_C2H_IRQn 0 */
/* USER CODE BEGIN C2SEV_PWR_C2H_IRQn 1 */
/* USER CODE END C2SEV_PWR_C2H_IRQn 1 */
}
/**
* @brief This function handles USART1 global interrupt.
*/
void USART1_IRQHandler(void)
{
/* USER CODE BEGIN USART1_IRQn 0 */
/* USER CODE END USART1_IRQn 0 */
HAL_UART_IRQHandler(&huart1);
/* USER CODE BEGIN USART1_IRQn 1 */
/* USER CODE END USART1_IRQn 1 */
}
/**
* @brief This function handles LPUART1 global interrupt.
*/
void LPUART1_IRQHandler(void)
{
/* USER CODE BEGIN LPUART1_IRQn 0 */
/* USER CODE END LPUART1_IRQn 0 */
HAL_UART_IRQHandler(&hlpuart1);
/* USER CODE BEGIN LPUART1_IRQn 1 */
/* USER CODE END LPUART1_IRQn 1 */
}
/**
* @brief This function handles PWR switching on the fly, end of BLE activity, end of 802.15.4 activity, end of critical radio phase interrupt.
*/
void PWR_SOTF_BLEACT_802ACT_RFPHASE_IRQHandler(void)
{
/* USER CODE BEGIN PWR_SOTF_BLEACT_802ACT_RFPHASE_IRQn 0 */
/* USER CODE END PWR_SOTF_BLEACT_802ACT_RFPHASE_IRQn 0 */
/* USER CODE BEGIN PWR_SOTF_BLEACT_802ACT_RFPHASE_IRQn 1 */
/* USER CODE END PWR_SOTF_BLEACT_802ACT_RFPHASE_IRQn 1 */
}
/**
* @brief This function handles IPCC RX occupied interrupt.
*/
void IPCC_C1_RX_IRQHandler(void)
{
/* USER CODE BEGIN IPCC_C1_RX_IRQn 0 */
/* USER CODE END IPCC_C1_RX_IRQn 0 */
HAL_IPCC_RX_IRQHandler(&hipcc);
/* USER CODE BEGIN IPCC_C1_RX_IRQn 1 */
/* USER CODE END IPCC_C1_RX_IRQn 1 */
}
/**
* @brief This function handles IPCC TX free interrupt.
*/
void IPCC_C1_TX_IRQHandler(void)
{
/* USER CODE BEGIN IPCC_C1_TX_IRQn 0 */
/* USER CODE END IPCC_C1_TX_IRQn 0 */
HAL_IPCC_TX_IRQHandler(&hipcc);
/* USER CODE BEGIN IPCC_C1_TX_IRQn 1 */
/* USER CODE END IPCC_C1_TX_IRQn 1 */
}
/**
* @brief This function handles HSEM global interrupt.
*/
void HSEM_IRQHandler(void)
{
/* USER CODE BEGIN HSEM_IRQn 0 */
/* USER CODE END HSEM_IRQn 0 */
HAL_HSEM_IRQHandler();
/* USER CODE BEGIN HSEM_IRQn 1 */
/* USER CODE END HSEM_IRQn 1 */
}
/**
* @brief This function handles FPU global interrupt.
*/
void FPU_IRQHandler(void)
{
/* USER CODE BEGIN FPU_IRQn 0 */
/* USER CODE END FPU_IRQn 0 */
/* USER CODE BEGIN FPU_IRQn 1 */
/* USER CODE END FPU_IRQn 1 */
}
/* USER CODE BEGIN 1 */
/**
* @brief This function handles External External line 4 interrupt request.
* @param None
* @retval None
*/
void EXTI4_IRQHandler(void)
{
HAL_GPIO_EXTI_IRQHandler(BUTTON_SW1_PIN);
}
/**
* @brief This function handles External External line 0 interrupt request.
* @param None
* @retval None
*/
void EXTI0_IRQHandler(void)
{
HAL_GPIO_EXTI_IRQHandler(BUTTON_SW2_PIN);
}
/**
* @brief This function handles External External line 1 interrupt request.
* @param None
* @retval None
*/
void EXTI1_IRQHandler(void)
{
HAL_GPIO_EXTI_IRQHandler(BUTTON_SW3_PIN);
}
/* USER CODE END 1 */