работает слейв и мастер

App/app_config.h

@@ -0,0 +1,50 @@
+#ifndef APP_CONFIG_H
+#define APP_CONFIG_H
+
+#include "app_types.h"
+
+/*
+ * Markdown note:
+ * - APP_ROLE_DEFAULT chooses firmware behavior at reset.
+ * - Role can be changed at runtime by App_SetRole().
+ * - Replace pin/channel values after CubeMX pinout is fixed.
+ */
+
+#define APP_ROLE_DEFAULT             APP_ROLE_MASTER // APP_ROLE_MASTER //APP_ROLE_SLAVE
+
+#define APP_ZIGBEE_ENDPOINT           10U
+#define APP_ZIGBEE_CLUSTER_INPUTS     0xFC10U
+#define APP_ZIGBEE_REPORT_PERIOD_MS   100U
+#define APP_ZIGBEE_CHANNEL            20U
+#define APP_ZIGBEE_PAN_ID             0x1234U
+#define APP_ZIGBEE_EXTENDED_PAN_ID    0x1122334455667788ULL
+#define APP_ZIGBEE_PERMIT_JOIN_SEC    0xFFU
+#define APP_ZIGBEE_PERMIT_REFRESH_MS  5000U
+#define APP_ZIGBEE_REJOIN_FAIL_COUNT  3U
+#define APP_ZIGBEE_REJOIN_RETRY_MS    15000U
+#define APP_ZIGBEE_JOIN_WATCHDOG_MS   20000U
+
+#define APP_BUTTON_COUNT              3U
+#define APP_ADC_CHANNEL_COUNT         1U
+
+#define APP_BUTTON_ACTIVE_LEVEL       0U
+#define APP_BUTTON_DEBOUNCE_MS        20U
+#define APP_BUTTON_GPIO_PORT          GPIOB
+#define APP_BUTTON1_GPIO_PIN          GPIO_PIN_0
+#define APP_BUTTON2_GPIO_PIN          GPIO_PIN_1
+#define APP_BUTTON3_GPIO_PIN          GPIO_PIN_2
+
+#define APP_ROLE_DETECT_ENABLED       0U
+#define APP_ROLE_DETECT_GPIO_PORT     GPIOA
+#define APP_ROLE_DETECT_GPIO_PIN      GPIO_PIN_9
+#define APP_ROLE_DETECT_PULL          GPIO_PULLDOWN
+#define APP_ROLE_DETECT_MASTER_LEVEL  GPIO_PIN_RESET
+
+#define APP_ROLE_LED_GPIO_PORT        GPIOE
+#define APP_ROLE_LED_GPIO_PIN         GPIO_PIN_4
+#define APP_ROLE_LED_ACTIVE_LEVEL     GPIO_PIN_SET
+
+#define APP_ANALOG_MIN_RAW            0U
+#define APP_ANALOG_MAX_RAW            4095U
+
+#endif

App/app_globals.c

@@ -0,0 +1,150 @@
+#include "app_config.h"
+#include "app_types.h"
+
+AppContext_t g_app =
+{
+    .role = APP_ROLE_DEFAULT,
+    .zigbee_state = APP_ZB_DISCONNECTED,
+    .slave_inputs =
+    {
+        .buttons =
+        {
+            { .pressed = false, .changed = false, .last_change_ms = 0U },
+            { .pressed = false, .changed = false, .last_change_ms = 0U },
+            { .pressed = false, .changed = false, .last_change_ms = 0U }
+        },
+        .analog = { .raw = 0U, .filtered = 0U, .percent = 0U },
+        .sequence = 0U
+    },
+    .master_node =
+    {
+        .online = false,
+        .last_report = { .sequence = 0U, .button_mask = 0U, .analog_raw = 0U, .analog_percent = 0U },
+        .last_seen_ms = 0U
+    },
+    .zigbee =
+    {
+        .pan_id = APP_ZIGBEE_PAN_ID,
+        .channel = APP_ZIGBEE_CHANNEL,
+        .endpoint = APP_ZIGBEE_ENDPOINT,
+        .cluster_id = APP_ZIGBEE_CLUSTER_INPUTS
+    },
+    .uptime_ms = 0U,
+    .last_report_ms = 0U
+};
+
+volatile uint32_t watch_role = APP_ROLE_DEFAULT;
+volatile uint32_t watch_is_master = 0U;
+volatile uint32_t watch_is_slave = 1U;
+volatile uint32_t watch_role_pin_is_master = 0U;
+volatile uint32_t watch_zigbee_state = APP_ZB_DISCONNECTED;
+volatile uint32_t watch_master_online = 0U;
+volatile uint32_t watch_master_last_seen_ms = 0U;
+volatile uint32_t watch_master_last_sequence = 0U;
+volatile uint32_t watch_master_button_mask = 0U;
+volatile uint32_t watch_master_analog_raw = 0U;
+volatile uint32_t watch_master_analog_percent = 0U;
+volatile uint32_t watch_slave_sequence = 0U;
+volatile uint32_t watch_slave_button_mask = 0U;
+volatile uint32_t watch_slave_analog_raw = 0U;
+volatile uint32_t watch_slave_analog_percent = 0U;
+volatile uint32_t watch_report_tx_count = 0U;
+volatile uint32_t watch_report_rx_count = 0U;
+volatile uint32_t watch_report_tx_attempt_count = 0U;
+volatile uint32_t watch_report_tx_ok_count = 0U;
+volatile uint32_t watch_report_tx_busy_count = 0U;
+volatile uint32_t watch_report_tx_confirm_count = 0U;
+volatile uint32_t watch_report_tx_confirm_status = 0U;
+volatile uint32_t watch_report_rx_ind_count = 0U;
+volatile uint32_t watch_report_rx_decode_fail_count = 0U;
+volatile uint32_t watch_report_rx_last_cluster = 0U;
+volatile uint32_t watch_report_rx_last_length = 0U;
+volatile uint32_t watch_zigbee_ready = 0U;
+volatile uint32_t watch_rejoin_request_count = 0U;
+volatile uint32_t watch_rejoin_success_count = 0U;
+volatile uint32_t watch_rejoin_fail_count = 0U;
+volatile uint32_t watch_rejoin_active = 0U;
+volatile uint32_t watch_rejoin_last_status = 0U;
+volatile uint32_t watch_report_tx_fail_streak = 0U;
+volatile uint32_t watch_permit_join_count = 0U;
+volatile uint32_t watch_permit_join_status = 0U;
+volatile uint32_t watch_permit_join_duration = 0U;
+volatile uint32_t watch_join_watchdog_count = 0U;
+
+static void App_DebugCopyReportToMasterWatch(const AppSlaveReport_t *report)
+{
+    watch_master_last_sequence = report->sequence;
+    watch_master_button_mask = report->button_mask;
+    watch_master_analog_raw = report->analog_raw;
+    watch_master_analog_percent = report->analog_percent;
+}
+
+static void App_DebugCopyReportToSlaveWatch(const AppSlaveReport_t *report)
+{
+    watch_slave_sequence = report->sequence;
+    watch_slave_button_mask = report->button_mask;
+    watch_slave_analog_raw = report->analog_raw;
+    watch_slave_analog_percent = report->analog_percent;
+}
+
+const char *App_RoleName(AppRole_t role)
+{
+    return (role == APP_ROLE_MASTER) ? "master" : "slave";
+}
+
+void App_SetRole(AppRole_t role)
+{
+    g_app.role = role;
+    g_app.zigbee_state = APP_ZB_DISCONNECTED;
+    g_app.last_report_ms = 0U;
+}
+
+AppSlaveReport_t App_MakeSlaveReport(const AppSlaveInputs_t *inputs)
+{
+    AppSlaveReport_t report;
+    uint8_t mask = 0U;
+
+    for (uint8_t i = 0U; i < APP_BUTTON_COUNT; i++)
+    {
+        if (inputs->buttons[i].pressed)
+        {
+            mask |= (uint8_t)(1U << i);
+        }
+    }
+
+    report.sequence = inputs->sequence;
+    report.button_mask = mask;
+    report.analog_raw = inputs->analog.raw;
+    report.analog_percent = inputs->analog.percent;
+
+    return report;
+}
+
+void App_MasterAcceptReport(const AppSlaveReport_t *report, uint32_t now_ms)
+{
+    g_app.master_node.online = true;
+    g_app.master_node.last_report = *report;
+    g_app.master_node.last_seen_ms = now_ms;
+
+    watch_report_rx_count++;
+    App_DebugCopyReportToMasterWatch(report);
+    App_DebugRefresh(watch_role_pin_is_master);
+}
+
+void App_DebugRefresh(uint32_t role_pin_is_master)
+{
+    watch_role = (uint32_t)g_app.role;
+    watch_is_master = (g_app.role == APP_ROLE_MASTER) ? 1U : 0U;
+    watch_is_slave = (g_app.role == APP_ROLE_SLAVE) ? 1U : 0U;
+    watch_role_pin_is_master = role_pin_is_master;
+    watch_zigbee_state = (uint32_t)g_app.zigbee_state;
+    watch_master_online = g_app.master_node.online ? 1U : 0U;
+    watch_master_last_seen_ms = g_app.master_node.last_seen_ms;
+    App_DebugCopyReportToMasterWatch(&g_app.master_node.last_report);
+}
+
+void App_DebugOnSlaveReportTx(const AppSlaveReport_t *report)
+{
+    watch_report_tx_count++;
+    App_DebugCopyReportToSlaveWatch(report);
+}

App/app_types.h

@@ -0,0 +1,123 @@
+#ifndef APP_TYPES_H
+#define APP_TYPES_H
+
+#include <stdbool.h>
+#include <stdint.h>
+
+typedef enum
+{
+    APP_ROLE_MASTER = 1,
+    APP_ROLE_SLAVE = 0
+} AppRole_t;
+
+typedef enum
+{
+    APP_ZB_DISCONNECTED = 0,
+    APP_ZB_JOINING,
+    APP_ZB_CONNECTED,
+    APP_ZB_ERROR
+} AppZigbeeState_t;
+
+typedef struct
+{
+    bool pressed;
+    bool changed;
+    uint32_t last_change_ms;
+} AppButton_t;
+
+typedef struct
+{
+    uint16_t raw;
+    uint16_t filtered;
+    uint8_t percent;
+} AppAnalogChannel_t;
+
+typedef struct
+{
+    AppButton_t buttons[3];
+    AppAnalogChannel_t analog;
+    uint32_t sequence;
+} AppSlaveInputs_t;
+
+typedef struct
+{
+    uint32_t sequence;
+    uint8_t button_mask;
+    uint16_t analog_raw;
+    uint8_t analog_percent;
+} AppSlaveReport_t;
+
+typedef struct
+{
+    bool online;
+    AppSlaveReport_t last_report;
+    uint32_t last_seen_ms;
+} AppMasterNode_t;
+
+typedef struct
+{
+    uint16_t pan_id;
+    uint8_t channel;
+    uint8_t endpoint;
+    uint16_t cluster_id;
+} AppZigbeeConfig_t;
+
+typedef struct
+{
+    AppRole_t role;
+    AppZigbeeState_t zigbee_state;
+    AppSlaveInputs_t slave_inputs;
+    AppMasterNode_t master_node;
+    AppZigbeeConfig_t zigbee;
+    uint32_t uptime_ms;
+    uint32_t last_report_ms;
+} AppContext_t;
+
+extern AppContext_t g_app;
+
+extern volatile uint32_t watch_role;
+extern volatile uint32_t watch_is_master;
+extern volatile uint32_t watch_is_slave;
+extern volatile uint32_t watch_role_pin_is_master;
+extern volatile uint32_t watch_zigbee_state;
+extern volatile uint32_t watch_master_online;
+extern volatile uint32_t watch_master_last_seen_ms;
+extern volatile uint32_t watch_master_last_sequence;
+extern volatile uint32_t watch_master_button_mask;
+extern volatile uint32_t watch_master_analog_raw;
+extern volatile uint32_t watch_master_analog_percent;
+extern volatile uint32_t watch_slave_sequence;
+extern volatile uint32_t watch_slave_button_mask;
+extern volatile uint32_t watch_slave_analog_raw;
+extern volatile uint32_t watch_slave_analog_percent;
+extern volatile uint32_t watch_report_tx_count;
+extern volatile uint32_t watch_report_rx_count;
+extern volatile uint32_t watch_report_tx_attempt_count;
+extern volatile uint32_t watch_report_tx_ok_count;
+extern volatile uint32_t watch_report_tx_busy_count;
+extern volatile uint32_t watch_report_tx_confirm_count;
+extern volatile uint32_t watch_report_tx_confirm_status;
+extern volatile uint32_t watch_report_rx_ind_count;
+extern volatile uint32_t watch_report_rx_decode_fail_count;
+extern volatile uint32_t watch_report_rx_last_cluster;
+extern volatile uint32_t watch_report_rx_last_length;
+extern volatile uint32_t watch_zigbee_ready;
+extern volatile uint32_t watch_rejoin_request_count;
+extern volatile uint32_t watch_rejoin_success_count;
+extern volatile uint32_t watch_rejoin_fail_count;
+extern volatile uint32_t watch_rejoin_active;
+extern volatile uint32_t watch_rejoin_last_status;
+extern volatile uint32_t watch_report_tx_fail_streak;
+extern volatile uint32_t watch_permit_join_count;
+extern volatile uint32_t watch_permit_join_status;
+extern volatile uint32_t watch_permit_join_duration;
+extern volatile uint32_t watch_join_watchdog_count;
+
+const char *App_RoleName(AppRole_t role);
+void App_SetRole(AppRole_t role);
+AppSlaveReport_t App_MakeSlaveReport(const AppSlaveInputs_t *inputs);
+void App_MasterAcceptReport(const AppSlaveReport_t *report, uint32_t now_ms);
+void App_DebugRefresh(uint32_t role_pin_is_master);
+void App_DebugOnSlaveReportTx(const AppSlaveReport_t *report);
+
+#endif

App/hardware.c

@@ -0,0 +1,100 @@
+#include "hardware.h"
+#include "app_config.h"
+#include "main.h"
+#include "stm32wbxx_nucleo.h"
+
+/*
+ * Markdown note:
+ * - This file is the only place that should know real GPIO/ADC pins.
+ * - Replace the weak placeholder code with HAL_GPIO_ReadPin() and HAL_ADC calls
+ *   after STM32CubeWB/CubeMX generates the board initialization.
+ */
+
+void Hardware_Init(void)
+{
+    GPIO_InitTypeDef gpio = {0};
+
+    __HAL_RCC_GPIOB_CLK_ENABLE();
+    __HAL_RCC_GPIOE_CLK_ENABLE();
+
+#if (APP_ROLE_DETECT_ENABLED != 0U)
+    gpio.Pin = APP_ROLE_DETECT_GPIO_PIN;
+    gpio.Mode = GPIO_MODE_INPUT;
+    gpio.Pull = APP_ROLE_DETECT_PULL;
+    gpio.Speed = GPIO_SPEED_FREQ_LOW;
+    HAL_GPIO_Init(APP_ROLE_DETECT_GPIO_PORT, &gpio);
+#endif
+
+    gpio.Pin = APP_BUTTON1_GPIO_PIN | APP_BUTTON2_GPIO_PIN | APP_BUTTON3_GPIO_PIN;
+    gpio.Mode = GPIO_MODE_INPUT;
+    gpio.Pull = (APP_BUTTON_ACTIVE_LEVEL == 0U) ? GPIO_PULLUP : GPIO_PULLDOWN;
+    gpio.Speed = GPIO_SPEED_FREQ_LOW;
+    HAL_GPIO_Init(APP_BUTTON_GPIO_PORT, &gpio);
+
+    gpio.Pin = APP_ROLE_LED_GPIO_PIN;
+    gpio.Mode = GPIO_MODE_OUTPUT_PP;
+    gpio.Pull = GPIO_NOPULL;
+    gpio.Speed = GPIO_SPEED_FREQ_LOW;
+    HAL_GPIO_Init(APP_ROLE_LED_GPIO_PORT, &gpio);
+    Hardware_SetRoleLed(false);
+}
+
+void Hardware_Process(void)
+{
+}
+
+uint32_t Hardware_GetTickMs(void)
+{
+    return HAL_GetTick();
+}
+
+	
+bool Hardware_ReadRoleSwitchIsMaster(void)
+{
+#if (APP_ROLE_DETECT_ENABLED != 0U)
+    return (HAL_GPIO_ReadPin(APP_ROLE_DETECT_GPIO_PORT, APP_ROLE_DETECT_GPIO_PIN) ==
+            APP_ROLE_DETECT_MASTER_LEVEL);
+#else
+    return (APP_ROLE_DEFAULT == APP_ROLE_MASTER);
+#endif
+}
+
+void Hardware_SetRoleLed(bool on)
+{
+    const GPIO_PinState active = APP_ROLE_LED_ACTIVE_LEVEL;
+    const GPIO_PinState inactive = (active == GPIO_PIN_SET) ? GPIO_PIN_RESET : GPIO_PIN_SET;
+
+    HAL_GPIO_WritePin(APP_ROLE_LED_GPIO_PORT,
+                      APP_ROLE_LED_GPIO_PIN,
+                      on ? active : inactive);
+}
+
+bool Hardware_ReadButton(uint8_t index)
+{
+    uint16_t pin;
+
+    switch (index)
+    {
+        case 0U:
+            pin = APP_BUTTON1_GPIO_PIN;
+            break;
+
+        case 1U:
+            pin = APP_BUTTON2_GPIO_PIN;
+            break;
+
+        case 2U:
+            pin = APP_BUTTON3_GPIO_PIN;
+            break;
+
+        default:
+            return false;
+    }
+
+    return (HAL_GPIO_ReadPin(APP_BUTTON_GPIO_PORT, pin) == APP_BUTTON_ACTIVE_LEVEL);
+}
+
+uint16_t Hardware_ReadAnalogRaw(void)
+{
+    return 0U;
+}

App/hardware.h

@@ -0,0 +1,15 @@
+#ifndef HARDWARE_H
+#define HARDWARE_H
+
+#include <stdbool.h>
+#include <stdint.h>
+
+void Hardware_Init(void);
+void Hardware_Process(void);
+uint32_t Hardware_GetTickMs(void);
+bool Hardware_ReadRoleSwitchIsMaster(void);
+void Hardware_SetRoleLed(bool on);
+bool Hardware_ReadButton(uint8_t index);
+uint16_t Hardware_ReadAnalogRaw(void);
+
+#endif

App/slave_inputs.c

@@ -0,0 +1,84 @@
+#include "app_config.h"
+#include "app_types.h"
+#include "hardware.h"
+#include "slave_inputs.h"
+
+static uint8_t Analog_ToPercent(uint16_t raw)
+{
+    uint32_t clamped = raw;
+
+    if (clamped > APP_ANALOG_MAX_RAW)
+    {
+        clamped = APP_ANALOG_MAX_RAW;
+    }
+
+    return (uint8_t)((clamped * 100U) / APP_ANALOG_MAX_RAW);
+}
+
+void SlaveInputs_Init(void)
+{
+    for (uint8_t i = 0U; i < APP_BUTTON_COUNT; i++)
+    {
+        g_app.slave_inputs.buttons[i].pressed = Hardware_ReadButton(i);
+        g_app.slave_inputs.buttons[i].changed = false;
+        g_app.slave_inputs.buttons[i].last_change_ms = Hardware_GetTickMs();
+    }
+
+    g_app.slave_inputs.analog.raw = Hardware_ReadAnalogRaw();
+    g_app.slave_inputs.analog.filtered = g_app.slave_inputs.analog.raw;
+    g_app.slave_inputs.analog.percent = Analog_ToPercent(g_app.slave_inputs.analog.filtered);
+}
+
+void SlaveInputs_Process(void)
+{
+    const uint32_t now = Hardware_GetTickMs();
+
+    for (uint8_t i = 0U; i < APP_BUTTON_COUNT; i++)
+    {
+        const bool pressed = Hardware_ReadButton(i);
+        AppButton_t *button = &g_app.slave_inputs.buttons[i];
+
+        if ((pressed != button->pressed) &&
+            ((now - button->last_change_ms) >= APP_BUTTON_DEBOUNCE_MS))
+        {
+            button->pressed = pressed;
+            button->changed = true;
+            button->last_change_ms = now;
+            g_app.slave_inputs.sequence++;
+        }
+    }
+
+    const uint16_t raw = Hardware_ReadAnalogRaw();
+    AppAnalogChannel_t *analog = &g_app.slave_inputs.analog;
+    const uint16_t old_percent = analog->percent;
+
+    analog->raw = raw;
+    analog->filtered = (uint16_t)(((uint32_t)analog->filtered * 7U + raw) / 8U);
+    analog->percent = Analog_ToPercent(analog->filtered);
+
+    if (analog->percent != old_percent)
+    {
+        g_app.slave_inputs.sequence++;
+    }
+}
+
+int SlaveInputs_HasChanges(void)
+{
+    for (uint8_t i = 0U; i < APP_BUTTON_COUNT; i++)
+    {
+        if (g_app.slave_inputs.buttons[i].changed)
+        {
+            return 1;
+        }
+    }
+
+    return 0;
+}
+
+void SlaveInputs_ClearChanges(void)
+{
+    for (uint8_t i = 0U; i < APP_BUTTON_COUNT; i++)
+    {
+        g_app.slave_inputs.buttons[i].changed = false;
+    }
+}

App/slave_inputs.h

@@ -0,0 +1,9 @@
+#ifndef SLAVE_INPUTS_H
+#define SLAVE_INPUTS_H
+
+void SlaveInputs_Init(void);
+void SlaveInputs_Process(void);
+int SlaveInputs_HasChanges(void);
+void SlaveInputs_ClearChanges(void);
+
+#endif

App/zigbee_app.c

@@ -0,0 +1,89 @@
+#include "app_config.h"
+#include "app_types.h"
+#include "hardware.h"
+#include "slave_inputs.h"
+#include "zigbee_app.h"
+#include "zigbee_port.h"
+
+static void ZigbeeApp_UpdateStatusLed(void)
+{
+    const uint32_t phase = g_app.uptime_ms % 1000U;
+    bool on = false;
+
+    switch (g_app.zigbee_state)
+    {
+        case APP_ZB_CONNECTED:
+            if (g_app.role == APP_ROLE_MASTER)
+            {
+                on = (phase < 80U);
+            }
+            else
+            {
+                on = (phase < 80U) || ((phase >= 160U) && (phase < 240U));
+            }
+            break;
+
+        case APP_ZB_JOINING:
+            on = ((phase % 160U) < 80U);
+            break;
+
+        case APP_ZB_ERROR:
+            on = ((phase % 100U) < 50U);
+            break;
+
+        case APP_ZB_DISCONNECTED:
+        default:
+            on = ((phase % 400U) < 80U);
+            break;
+    }
+
+    Hardware_SetRoleLed(on);
+}
+
+static void ZigbeeApp_UpdateRoleFromSwitch(void)
+{
+    const bool role_pin_is_master = Hardware_ReadRoleSwitchIsMaster();
+    const AppRole_t requested_role = role_pin_is_master;
+       // role_pin_is_master ? APP_ROLE_MASTER : APP_ROLE_SLAVE;
+
+    if (requested_role != g_app.role)
+    {
+        App_SetRole(requested_role);
+        ZigbeePort_Init(&g_app.zigbee, g_app.role);
+    }
+
+    App_DebugRefresh(role_pin_is_master ? 1U : 0U);
+}
+
+void ZigbeeApp_Init(void)
+{
+    ZigbeePort_Init(&g_app.zigbee, g_app.role);
+    SlaveInputs_Init();
+
+    const bool role_pin_is_master = Hardware_ReadRoleSwitchIsMaster();
+    App_DebugRefresh(role_pin_is_master ? 1U : 0U);
+    ZigbeeApp_UpdateStatusLed();
+}
+
+void ZigbeeApp_Process(void)
+{
+    g_app.uptime_ms = Hardware_GetTickMs();
+
+    ZigbeeApp_UpdateRoleFromSwitch();
+    ZigbeePort_Process();
+    ZigbeeApp_UpdateStatusLed();
+
+    if (g_app.role == APP_ROLE_SLAVE)
+    {
+        SlaveInputs_Process();
+
+        if ((g_app.uptime_ms - g_app.last_report_ms) >= APP_ZIGBEE_REPORT_PERIOD_MS)
+        {
+            if (ZigbeePort_SendSlaveInputs(&g_app.slave_inputs) == ZIGBEE_PORT_OK)
+            {
+                g_app.last_report_ms = g_app.uptime_ms;
+                SlaveInputs_ClearChanges();
+            }
+        }
+    }
+}

App/zigbee_app.h

@@ -0,0 +1,7 @@
+#ifndef ZIGBEE_APP_H
+#define ZIGBEE_APP_H
+
+void ZigbeeApp_Init(void);
+void ZigbeeApp_Process(void);
+
+#endif

App/zigbee_port.c

@@ -0,0 +1,34 @@
+#include "zigbee_port.h"
+#include "app_zigbee.h"
+
+/*
+ * Markdown note:
+ * - Keep STM32_WPAN / Zigbee Cluster Library calls in this adapter.
+ * - Master should create/open the network and receive reports.
+ * - Slave should join the network and send AppSlaveInputs_t payload.
+ */
+
+void ZigbeePort_Init(const AppZigbeeConfig_t *config, AppRole_t role)
+{
+    (void)config;
+    (void)role;
+}
+
+void ZigbeePort_Process(void)
+{
+    APP_ZIGBEE_Process();
+}
+
+ZigbeePortStatus_t ZigbeePort_SendSlaveInputs(const AppSlaveInputs_t *inputs)
+{
+    const AppSlaveReport_t report = App_MakeSlaveReport(inputs);
+
+    App_DebugOnSlaveReportTx(&report);
+
+    return APP_ZIGBEE_SendSlaveReport(&report) ? ZIGBEE_PORT_OK : ZIGBEE_PORT_BUSY;
+}
+
+void ZigbeePort_OnSlaveReportReceived(const AppSlaveReport_t *report, uint32_t now_ms)
+{
+    App_MasterAcceptReport(report, now_ms);
+}

App/zigbee_port.h

@@ -0,0 +1,19 @@
+#ifndef ZIGBEE_PORT_H
+#define ZIGBEE_PORT_H
+
+#include <stdint.h>
+#include "app_types.h"
+
+typedef enum
+{
+    ZIGBEE_PORT_OK = 0,
+    ZIGBEE_PORT_BUSY,
+    ZIGBEE_PORT_ERROR
+} ZigbeePortStatus_t;
+
+void ZigbeePort_Init(const AppZigbeeConfig_t *config, AppRole_t role);
+void ZigbeePort_Process(void);
+ZigbeePortStatus_t ZigbeePort_SendSlaveInputs(const AppSlaveInputs_t *inputs);
+void ZigbeePort_OnSlaveReportReceived(const AppSlaveReport_t *report, uint32_t now_ms);
+
+#endif

Core/Inc/app_common.h

@@ -0,0 +1,113 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    app_common.h
+  * @author  MCD Application Team
+  * @brief   App Common application configuration file for STM32WPAN Middleware.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019-2023 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef APP_COMMON_H
+#define APP_COMMON_H
+
+#ifdef __cplusplus
+extern "C"{
+#endif
+
+#include <stdint.h>
+#include <string.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <stdarg.h>
+
+#include "app_conf.h"
+
+/* -------------------------------- *
+ *  Basic definitions               *
+ * -------------------------------- */
+#undef NULL
+#define NULL                    0
+
+#undef FALSE
+#define FALSE                   0
+
+#undef TRUE
+#define TRUE                    (!0)
+
+/* -------------------------------- *
+ *  Critical Section definition     *
+ * -------------------------------- */
+#define BACKUP_PRIMASK()    uint32_t primask_bit= __get_PRIMASK()
+#define DISABLE_IRQ()       __disable_irq()
+#define RESTORE_PRIMASK()   __set_PRIMASK(primask_bit)
+
+/* -------------------------------- *
+ *  Macro delimiters                *
+ * -------------------------------- */
+#define M_BEGIN     do {
+
+#define M_END       } while(0)
+
+/* -------------------------------- *
+ *  Some useful macro definitions   *
+ * -------------------------------- */
+#ifndef MAX
+#define MAX( x, y )          (((x)>(y))?(x):(y))
+#endif
+
+#ifndef MIN
+#define MIN( x, y )          (((x)<(y))?(x):(y))
+#endif
+
+#define MODINC( a, m )       M_BEGIN  (a)++;  if ((a)>=(m)) (a)=0;  M_END
+
+#define MODDEC( a, m )       M_BEGIN  if ((a)==0) (a)=(m);  (a)--;  M_END
+
+#define MODADD( a, b, m )    M_BEGIN  (a)+=(b);  if ((a)>=(m)) (a)-=(m);  M_END
+
+#define MODSUB( a, b, m )    MODADD( a, (m)-(b), m )
+
+#define PAUSE( t )           M_BEGIN \
+                               __IO int _i; \
+                               for ( _i = t; _i > 0; _i -- ); \
+                             M_END
+
+#define DIVF( x, y )         ((x)/(y))
+
+#define DIVC( x, y )         (((x)+(y)-1)/(y))
+
+#define DIVR( x, y )         (((x)+((y)/2))/(y))
+
+#define SHRR( x, n )         ((((x)>>((n)-1))+1)>>1)
+
+#define BITN( w, n )         (((w)[(n)/32] >> ((n)%32)) & 1)
+
+#define BITNSET( w, n, b )   M_BEGIN (w)[(n)/32] |= ((U32)(b))<<((n)%32); M_END
+
+/* -------------------------------- *
+ *  Compiler                         *
+ * -------------------------------- */
+#define PLACE_IN_SECTION( __x__ )  __attribute__((section (__x__)))
+
+#ifdef WIN32
+#define ALIGN(n)
+#else
+#define ALIGN(n)             __attribute__((aligned(n)))
+#endif
+
+#ifdef __cplusplus
+} /* extern "C" */
+#endif
+
+#endif /*APP_COMMON_H */

Core/Inc/app_conf.h

@@ -0,0 +1,385 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    app_conf.h
+  * @author  MCD Application Team
+  * @brief   Application configuration file for STM32WPAN Middleware.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019-2023 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef APP_CONF_H
+#define APP_CONF_H
+
+#include "hw.h"
+#include "hw_conf.h"
+#include "hw_if.h"
+
+/******************************************************************************
+ * Application Config
+ ******************************************************************************/
+/******************************************************************************
+ * Transport Layer
+ ******************************************************************************/
+/**
+ * Queue length of BLE Event
+ * This parameter defines the number of asynchronous events that can be stored in the HCI layer before
+ * being reported to the application. When a command is sent to the BLE core coprocessor, the HCI layer
+ * is waiting for the event with the Num_HCI_Command_Packets set to 1. The receive queue shall be large
+ * enough to store all asynchronous events received in between.
+ * When CFG_TLBLE_MOST_EVENT_PAYLOAD_SIZE is set to 27, this allow to store three 255 bytes long asynchronous events
+ * between the HCI command and its event.
+ * This parameter depends on the value given to CFG_TLBLE_MOST_EVENT_PAYLOAD_SIZE. When the queue size is to small,
+ * the system may hang if the queue is full with asynchronous events and the HCI layer is still waiting
+ * for a CC/CS event, In that case, the notification TL_BLE_HCI_ToNot() is called to indicate
+ * to the application a HCI command did not receive its command event within 30s (Default HCI Timeout).
+ */
+#define CFG_TL_EVT_QUEUE_LENGTH 5
+/**
+ * This parameter should be set to fit most events received by the HCI layer. It defines the buffer size of each element
+ * allocated in the queue of received events and can be used to optimize the amount of RAM allocated by the Memory Manager.
+ * It should not exceed 255 which is the maximum HCI packet payload size (a greater value is a lost of memory as it will
+ * never be used)
+ * It shall be at least 4 to receive the command status event in one frame.
+ * The default value is set to 27 to allow receiving an event of MTU size in a single buffer. This value maybe reduced
+ * further depending on the application.
+ */
+#define CFG_TL_MOST_EVENT_PAYLOAD_SIZE 255   /**< Set to 255 with the memory manager and the mailbox */
+
+#define TL_EVENT_FRAME_SIZE ( TL_EVT_HDR_SIZE + CFG_TL_MOST_EVENT_PAYLOAD_SIZE )
+/******************************************************************************
+ * UART interfaces
+ ******************************************************************************/
+
+/**
+ * Select UART interfaces
+ */
+#define CFG_DEBUG_TRACE_UART    hw_uart1
+#define CFG_CONSOLE_MENU
+#define CFG_CLI_UART            hw_lpuart1
+/******************************************************************************
+ * USB interface
+ ******************************************************************************/
+
+/**
+ * Enable/Disable USB interface
+ */
+#define CFG_USB_INTERFACE_ENABLE    0
+
+/******************************************************************************
+ * IPCC interface
+ ******************************************************************************/
+
+/**
+ * The IPCC is dedicated to the communication between the CPU2 and the CPU1
+ * and shall not be modified by the application
+ * The two following definitions shall not be modified
+ */
+#define HAL_IPCC_TX_IRQHandler(...)  HW_IPCC_Tx_Handler( )
+#define HAL_IPCC_RX_IRQHandler(...)  HW_IPCC_Rx_Handler( )
+
+/******************************************************************************
+ * Low Power
+ *
+ *  When CFG_FULL_LOW_POWER is set to 1, the system is configured in full
+ *  low power mode. It means that all what can have an impact on the consumptions
+ *  are powered down.(For instance LED, Access to Debugger, Etc.)
+ *
+ *  When CFG_FULL_LOW_POWER is set to 0, the low power mode is not activated
+ *
+ ******************************************************************************/
+
+#define CFG_FULL_LOW_POWER    0
+
+#if (CFG_FULL_LOW_POWER == 1)
+#undef CFG_LPM_SUPPORTED
+#define CFG_LPM_SUPPORTED   1
+#endif /* CFG_FULL_LOW_POWER */
+/******************************************************************************
+ * RTC interface
+ ******************************************************************************/
+#define HAL_RTCEx_WakeUpTimerIRQHandler(...)  HW_TS_RTC_Wakeup_Handler( )
+
+/******************************************************************************
+ * Timer Server
+ ******************************************************************************/
+/**
+ *  CFG_RTC_WUCKSEL_DIVIDER:  This sets the RTCCLK divider to the wakeup timer.
+ *  The lower is the value, the better is the power consumption and the accuracy of the timerserver
+ *  The higher is the value, the finest is the granularity
+ *
+ *  CFG_RTC_ASYNCH_PRESCALER: This sets the asynchronous prescaler of the RTC. It should as high as possible ( to output
+ *  clock as low as possible) but the output clock should be equal or higher frequency compare to the clock feeding
+ *  the wakeup timer. A lower clock speed would impact the accuracy of the timer server.
+ *
+ *  CFG_RTC_SYNCH_PRESCALER: This sets the synchronous prescaler of the RTC.
+ *  When the 1Hz calendar clock is required, it shall be sets according to other settings
+ *  When the 1Hz calendar clock is not needed, CFG_RTC_SYNCH_PRESCALER should be set to 0x7FFF (MAX VALUE)
+ *
+ *  CFG_RTCCLK_DIVIDER_CONF:
+ *  Shall be set to either 0,2,4,8,16
+ *  When set to either 2,4,8,16, the 1Hhz calendar is supported
+ *  When set to 0, the user sets its own configuration
+ *
+ *  The following settings are computed with LSI as input to the RTC
+ */
+
+#define CFG_RTCCLK_DIVIDER_CONF 0
+
+#if (CFG_RTCCLK_DIVIDER_CONF == 0)
+/**
+ * Custom configuration
+ * It does not support 1Hz calendar
+ * It divides the RTC CLK by 16
+ */
+
+#define CFG_RTCCLK_DIV            (16)
+#define CFG_RTC_WUCKSEL_DIVIDER   (0)
+#define CFG_RTC_ASYNCH_PRESCALER  (0x0F)
+#define CFG_RTC_SYNCH_PRESCALER   (0x7FFF)
+
+#else
+
+#if (CFG_RTCCLK_DIVIDER_CONF == 2)
+/**
+ * It divides the RTC CLK by 2
+ */
+#define CFG_RTC_WUCKSEL_DIVIDER (3)
+#endif
+
+#if (CFG_RTCCLK_DIVIDER_CONF == 4)
+/**
+ * It divides the RTC CLK by 4
+ */
+#define CFG_RTC_WUCKSEL_DIVIDER (2)
+#endif
+
+#if (CFG_RTCCLK_DIVIDER_CONF == 8)
+/**
+ * It divides the RTC CLK by 8
+ */
+#define CFG_RTC_WUCKSEL_DIVIDER (1)
+#endif
+
+#if (CFG_RTCCLK_DIVIDER_CONF == 16)
+/**
+ * It divides the RTC CLK by 16
+ */
+#define CFG_RTC_WUCKSEL_DIVIDER (0)
+#endif
+
+#define CFG_RTCCLK_DIV              CFG_RTCCLK_DIVIDER_CONF
+#define CFG_RTC_ASYNCH_PRESCALER    (CFG_RTCCLK_DIV - 1)
+#define CFG_RTC_SYNCH_PRESCALER     (DIVR( LSE_VALUE, (CFG_RTC_ASYNCH_PRESCALER+1) ) - 1 )
+
+#endif
+
+/** tick timer values */
+#define CFG_TS_TICK_VAL           DIVR( (CFG_RTCCLK_DIV * 1000000), LSE_VALUE )
+#define CFG_TS_TICK_VAL_PS        DIVR( ((uint64_t)CFG_RTCCLK_DIV * 1e12), (uint64_t)LSE_VALUE )
+
+typedef enum
+{
+  CFG_TIM_PROC_ID_ISR,
+  /* USER CODE BEGIN CFG_TimProcID_t */
+
+  /* USER CODE END CFG_TimProcID_t */
+} CFG_TimProcID_t;
+
+/******************************************************************************
+ * Debug
+ ******************************************************************************/
+/**
+ * When set, this resets some hw resources to put the device in the same state as at power up.
+ * It resets only register that may prevent the FW to run properly.
+ *
+ * This shall be set to 0 in a final product
+ *
+ */
+#define CFG_HW_RESET_BY_FW         0
+
+/**
+ * keep debugger enabled while in any low power mode when set to 1
+ * should be set to 0 in production
+ */
+#define CFG_DEBUGGER_SUPPORTED    1
+
+#if (CFG_FULL_LOW_POWER == 1)
+#undef CFG_DEBUGGER_SUPPORTED
+#define CFG_DEBUGGER_SUPPORTED    0
+#endif /* CFG_FULL_LOW_POWER */
+
+/*****************************************************************************
+ * Traces
+ * Enable or Disable traces in application
+ * When CFG_DEBUG_TRACE is set, traces are activated
+ *
+ * Note : Refer to utilities_conf.h file in order to details
+ *        the level of traces : CFG_DEBUG_TRACE_FULL or CFG_DEBUG_TRACE_LIGHT
+ *****************************************************************************/
+#define CFG_DEBUG_TRACE    1
+
+#if (CFG_FULL_LOW_POWER == 1)
+#undef CFG_DEBUG_TRACE
+#define CFG_DEBUG_TRACE      0
+#endif /* CFG_FULL_LOW_POWER */
+
+/**
+ * When CFG_DEBUG_TRACE_FULL is set to 1, the trace are output with the API name, the file name and the line number
+ * When CFG_DEBUG_TRACE_LIGHT is set to 1, only the debug message is output
+ *
+ * When both are set to 0, no trace are output
+ * When both are set to 1,  CFG_DEBUG_TRACE_FULL is selected
+ */
+#define CFG_DEBUG_TRACE_LIGHT     1
+#define CFG_DEBUG_TRACE_FULL      0
+
+#if (( CFG_DEBUG_TRACE != 0 ) && ( CFG_DEBUG_TRACE_LIGHT == 0 ) && (CFG_DEBUG_TRACE_FULL == 0))
+#undef CFG_DEBUG_TRACE_FULL
+#undef CFG_DEBUG_TRACE_LIGHT
+#define CFG_DEBUG_TRACE_FULL      0
+#define CFG_DEBUG_TRACE_LIGHT     1
+#endif
+
+#if ( CFG_DEBUG_TRACE == 0 )
+#undef CFG_DEBUG_TRACE_FULL
+#undef CFG_DEBUG_TRACE_LIGHT
+#define CFG_DEBUG_TRACE_FULL      0
+#define CFG_DEBUG_TRACE_LIGHT     0
+#endif
+
+/**
+ * When not set, the traces is looping on sending the trace over UART
+ */
+#define DBG_TRACE_USE_CIRCULAR_QUEUE 1
+
+/**
+ * max buffer Size to queue data traces and max data trace allowed.
+ * Only Used if DBG_TRACE_USE_CIRCULAR_QUEUE is defined
+ */
+#define DBG_TRACE_MSG_QUEUE_SIZE 4096
+#define MAX_DBG_TRACE_MSG_SIZE   1024
+
+/******************************************************************************
+ * Configure Log level for Application
+ ******************************************************************************/
+#define APPLI_CONFIG_LOG_LEVEL    LOG_LEVEL_INFO
+#define APPLI_PRINT_FILE_FUNC_LINE    0
+
+/* USER CODE BEGIN Defines */
+/******************************************************************************
+ * User interaction
+ * When CFG_LED_SUPPORTED is set, LEDS are activated if requested
+ * When CFG_BUTTON_SUPPORTED is set, the push button are activated if requested
+ ******************************************************************************/
+#if (CFG_FULL_LOW_POWER == 1)
+#define CFG_LED_SUPPORTED         0
+#define CFG_BUTTON_SUPPORTED      0
+#else
+#define CFG_LED_SUPPORTED         1
+#define CFG_BUTTON_SUPPORTED      1
+#endif /* CFG_FULL_LOW_POWER */
+
+/* USER CODE END Defines */
+
+/******************************************************************************
+ * Scheduler
+ ******************************************************************************/
+/**
+ * This is the list of task id required by the application
+ * Each Id shall be in the range 0..31
+ */
+
+typedef enum
+{
+  CFG_TASK_NOTIFY_FROM_M0_TO_M4,
+  CFG_TASK_REQUEST_FROM_M0_TO_M4,
+  CFG_TASK_ZIGBEE_NETWORK_FORM,
+  CFG_TASK_SYSTEM_HCI_ASYNCH_EVT,
+#if (CFG_USB_INTERFACE_ENABLE != 0)
+  CFG_TASK_VCP_SEND_DATA,
+#endif /* (CFG_USB_INTERFACE_ENABLE != 0) */
+  /* USER CODE BEGIN CFG_IdleTask_Id_t */
+
+  /* USER CODE END CFG_IdleTask_Id_t */
+  CFG_TASK_NBR  /**< Shall be last in the list */
+} CFG_IdleTask_Id_t;
+
+/* Scheduler types and defines        */
+/*------------------------------------*/
+#define EVENT_ACK_FROM_M0_EVT        (1U << CFG_EVT_ACK_FROM_M0_EVT)
+#define EVENT_SYNCHRO_BYPASS_IDLE    (1U << CFG_EVT_SYNCHRO_BYPASS_IDLE)
+/* USER CODE BEGIN DEFINE_TASK */
+
+/* USER CODE END DEFINE_TASK */
+
+/**
+ * This is the list of priority required by the application
+ * Each Id shall be in the range 0..31
+ */
+typedef enum
+{
+  CFG_SCH_PRIO_0,
+  CFG_SCH_PRIO_1,
+  /* USER CODE BEGIN CFG_SCH_Prio_Id_t */
+
+  /* USER CODE END CFG_SCH_Prio_Id_t */
+  CFG_SCH_PRIO_NBR  /**< Shall be last in the list */
+} CFG_SCH_Prio_Id_t;
+
+/**
+ * This is a bit mapping over 32bits listing all events id supported in the application
+ */
+typedef enum
+{
+  CFG_EVT_SYSTEM_HCI_CMD_EVT_RESP,
+  CFG_EVT_ACK_FROM_M0_EVT,
+  CFG_EVT_SYNCHRO_BYPASS_IDLE,
+  CFG_EVT_ZIGBEE_STARTUP_ENDED,
+  /* USER CODE BEGIN CFG_IdleEvt_Id_t */
+
+  /* USER CODE END CFG_IdleEvt_Id_t */
+} CFG_IdleEvt_Id_t;
+
+#define EVENT_ACK_FROM_M0_EVT           (1U << CFG_EVT_ACK_FROM_M0_EVT)
+#define EVENT_SYNCHRO_BYPASS_IDLE       (1U << CFG_EVT_SYNCHRO_BYPASS_IDLE)
+#define EVENT_ZIGBEE_STARTUP_ENDED      (1U << CFG_EVT_ZIGBEE_STARTUP_ENDED)
+/* USER CODE BEGIN DEFINE_EVENT */
+
+/* USER CODE END DEFINE_EVENT */
+
+/******************************************************************************
+ * LOW POWER
+ ******************************************************************************/
+/**
+ * Supported requester to the MCU Low Power Manager - can be increased up  to 32
+ * It list a bit mapping of all user of the Low Power Manager
+ */
+typedef enum
+{
+  CFG_LPM_APP,
+  /* USER CODE BEGIN CFG_LPM_Id_t */
+
+  /* USER CODE END CFG_LPM_Id_t */
+} CFG_LPM_Id_t;
+
+/******************************************************************************
+ * OTP manager
+ ******************************************************************************/
+#define CFG_OTP_BASE_ADDRESS    OTP_AREA_BASE
+
+#define CFG_OTP_END_ADRESS      OTP_AREA_END_ADDR
+
+#endif /*APP_CONF_H */
+

Core/Inc/app_entry.h

@@ -0,0 +1,71 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    app_entry.h
+  * @author  MCD Application Team
+  * @brief   Interface to the application
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019-2023 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef APP_ENTRY_H
+#define APP_ENTRY_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported variables --------------------------------------------------------*/
+/* USER CODE BEGIN EV */
+
+/* USER CODE END EV */
+
+/* Exported macros ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions ---------------------------------------------*/
+void MX_APPE_Config(void);
+void MX_APPE_Init(void);
+void MX_APPE_Process(void);
+void Init_Exti(void);
+void Init_Smps(void);
+
+/* USER CODE BEGIN EF */
+
+/* USER CODE END EF */
+
+#ifdef __cplusplus
+} /* extern "C" */
+#endif
+
+#endif /*APP_ENTRY_H */

Core/Inc/hw_conf.h

@@ -0,0 +1,264 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    hw_conf.h
+  * @author  MCD Application Team
+  * @brief   Configuration of hardware interface
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019-2023 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef HW_CONF_H
+#define HW_CONF_H
+
+/******************************************************************************
+ * Semaphores
+ * THIS SHALL NO BE CHANGED AS THESE SEMAPHORES ARE USED AS WELL ON THE CM0+
+ *****************************************************************************/
+/**
+*  The CPU2 may be configured to store the Thread persistent data either in internal NVM storage on CPU2 or in
+*  SRAM2 buffer provided by the user application. This can be configured with the system command SHCI_C2_Config()
+*  When the CPU2 is requested to store persistent data in SRAM2, it can write data in this buffer at any time when needed.
+*  In order to read consistent data with the CPU1 from the SRAM2 buffer, the flow should be:
+*  + CPU1 takes CFG_HW_THREAD_NVM_SRAM_SEMID semaphore
+*  + CPU1 reads all persistent data from SRAM2 (most of the time, the goal is to write these data into an NVM managed by CPU1)
+*  + CPU1 releases CFG_HW_THREAD_NVM_SRAM_SEMID semaphore
+*  CFG_HW_THREAD_NVM_SRAM_SEMID semaphore makes sure CPU2 does not update the persistent data in SRAM2 at the same time CPU1 is reading them.
+*  There is no timing constraint on how long this semaphore can be kept.
+*/
+#define CFG_HW_THREAD_NVM_SRAM_SEMID                    9
+
+/**
+*  The CPU2 may be configured to store the BLE persistent data either in internal NVM storage on CPU2 or in
+*  SRAM2 buffer provided by the user application. This can be configured with the system command SHCI_C2_Config()
+*  When the CPU2 is requested to store persistent data in SRAM2, it can write data in this buffer at any time when needed.
+*  In order to read consistent data with the CPU1 from the SRAM2 buffer, the flow should be:
+*  + CPU1 takes CFG_HW_BLE_NVM_SRAM_SEMID semaphore
+*  + CPU1 reads all persistent data from SRAM2 (most of the time, the goal is to write these data into an NVM managed by CPU1)
+*  + CPU1 releases CFG_HW_BLE_NVM_SRAM_SEMID semaphore
+*  CFG_HW_BLE_NVM_SRAM_SEMID semaphore makes sure CPU2 does not update the persistent data in SRAM2 at the same time CPU1 is reading them.
+*  There is no timing constraint on how long this semaphore can be kept.
+*/
+#define CFG_HW_BLE_NVM_SRAM_SEMID                    8
+
+/**
+*  Index of the semaphore used by CPU2 to prevent the CPU1 to either write or erase data in flash
+*  The CPU1 shall not either write or erase in flash when this semaphore is taken by the CPU2
+*  When the CPU1 needs to either write or erase in flash, it shall first get the semaphore and release it just
+*  after writing a raw (64bits data) or erasing one sector.
+*  Once the Semaphore has been released, there shall be at least 1us before it can be taken again. This is required
+*  to give the opportunity to CPU2 to take it.
+*  On v1.4.0 and older CPU2 wireless firmware, this semaphore is unused and CPU2 is using PES bit.
+*  By default, CPU2 is using the PES bit to protect its timing. The CPU1 may request the CPU2 to use the semaphore
+*  instead of the PES bit by sending the system command SHCI_C2_SetFlashActivityControl()
+*/
+#define CFG_HW_BLOCK_FLASH_REQ_BY_CPU2_SEMID                    7
+
+/**
+*  Index of the semaphore used by CPU1 to prevent the CPU2 to either write or erase data in flash
+*  In order to protect its timing, the CPU1 may get this semaphore to prevent the  CPU2 to either
+*  write or erase in flash (as this will stall both CPUs)
+*  The PES bit shall not be used as this may stall the CPU2 in some cases.
+*/
+#define CFG_HW_BLOCK_FLASH_REQ_BY_CPU1_SEMID                    6
+
+/**
+*  Index of the semaphore used to manage the CLK48 clock configuration
+*  When the USB is required, this semaphore shall be taken before configuring te CLK48 for USB
+*  and should be released after the application switch OFF the clock when the USB is not used anymore
+*  When using the RNG, it is good enough to use CFG_HW_RNG_SEMID to control CLK48.
+*  More details in AN5289
+*/
+#define CFG_HW_CLK48_CONFIG_SEMID                               5
+
+/* Index of the semaphore used to manage the entry Stop Mode procedure */
+#define CFG_HW_ENTRY_STOP_MODE_SEMID                            4
+
+/* Index of the semaphore used to access the RCC */
+#define CFG_HW_RCC_SEMID                                        3
+
+/* Index of the semaphore used to access the FLASH */
+#define CFG_HW_FLASH_SEMID                                      2
+
+/* Index of the semaphore used to access the PKA */
+#define CFG_HW_PKA_SEMID                                        1
+
+/* Index of the semaphore used to access the RNG */
+#define CFG_HW_RNG_SEMID                                        0
+
+/******************************************************************************
+ * HW TIMER SERVER
+ *****************************************************************************/
+/**
+ * The user may define the maximum number of virtual timers supported.
+ * It shall not exceed 255
+ */
+#define CFG_HW_TS_MAX_NBR_CONCURRENT_TIMER  6
+
+/**
+ * The user may define the priority in the NVIC of the RTC_WKUP interrupt handler that is used to manage the
+ * wakeup timer.
+ * This setting is the preemptpriority part of the NVIC.
+ */
+#define CFG_HW_TS_NVIC_RTC_WAKEUP_IT_PREEMPTPRIO  3
+
+/**
+ * The user may define the priority in the NVIC of the RTC_WKUP interrupt handler that is used to manage the
+ * wakeup timer.
+ * This setting is the subpriority part of the NVIC. It does not exist on all processors. When it is not supported
+ * on the CPU, the setting is ignored
+ */
+#define CFG_HW_TS_NVIC_RTC_WAKEUP_IT_SUBPRIO  0
+
+/**
+ *  Define a critical section in the Timer server
+ *  The Timer server does not support the API to be nested
+ *  The  Application shall either:
+ *    a) Ensure this will never happen
+ *    b) Define the critical section
+ *  The default implementations is masking all interrupts using the PRIMASK bit
+ *  The TimerServer driver uses critical sections to avoid context corruption. This is achieved with the macro
+ *  TIMER_ENTER_CRITICAL_SECTION and TIMER_EXIT_CRITICAL_SECTION. When CFG_HW_TS_USE_PRIMASK_AS_CRITICAL_SECTION is set
+ *  to 1, all STM32 interrupts are masked with the PRIMASK bit of the CortexM CPU. It is possible to use the BASEPRI
+ *  register of the CortexM CPU to keep allowed some interrupts with high priority. In that case, the user shall
+ *  re-implement TIMER_ENTER_CRITICAL_SECTION and TIMER_EXIT_CRITICAL_SECTION and shall make sure that no TimerServer
+ *  API are called when the TIMER critical section is entered
+ */
+#define CFG_HW_TS_USE_PRIMASK_AS_CRITICAL_SECTION  1
+
+/**
+   * This value shall reflect the maximum delay there could be in the application between the time the RTC interrupt
+   * is generated by the Hardware and the time when the  RTC interrupt handler is called. This time is measured in
+   * number of RTCCLK ticks.
+   * A relaxed timing would be 10ms
+   * When the value is too short, the timerserver will not be able to count properly and all timeout may be random.
+   * When the value is too long, the device may wake up more often than the most optimal configuration. However, the
+   * impact on power consumption would be marginal (unless the value selected is extremely too long). It is strongly
+   * recommended to select a value large enough to make sure it is not too short to ensure reliability of the system
+   * as this will have marginal impact on low power mode
+   */
+#define CFG_HW_TS_RTC_HANDLER_MAX_DELAY  ( 10 * (LSI_VALUE/1000) )
+
+  /**
+   * Interrupt ID in the NVIC of the RTC Wakeup interrupt handler
+   * It shall be type of IRQn_Type
+   */
+#define CFG_HW_TS_RTC_WAKEUP_HANDLER_ID  RTC_WKUP_IRQn
+
+/******************************************************************************
+ * HW UART
+ *****************************************************************************/
+#define CFG_HW_LPUART1_ENABLED           1
+#define CFG_HW_LPUART1_DMA_TX_SUPPORTED  1
+
+#define CFG_HW_USART1_ENABLED           1
+#define CFG_HW_USART1_DMA_TX_SUPPORTED  1
+
+/**
+ * LPUART1
+ */
+#define CFG_HW_LPUART1_PREEMPTPRIORITY         0x0F
+#define CFG_HW_LPUART1_SUBPRIORITY             0
+
+/** < The application shall check the selected source clock is enable */
+#define CFG_HW_LPUART1_SOURCE_CLOCK             RCC_LPUART1CLKSOURCE_SYSCLK
+
+#define CFG_HW_LPUART1_BAUDRATE                115200
+#define CFG_HW_LPUART1_WORDLENGTH              UART_WORDLENGTH_8B
+#define CFG_HW_LPUART1_STOPBITS                UART_STOPBITS_1
+#define CFG_HW_LPUART1_PARITY                  UART_PARITY_NONE
+#define CFG_HW_LPUART1_HWFLOWCTL               UART_HWCONTROL_NONE
+#define CFG_HW_LPUART1_MODE                    UART_MODE_TX_RX
+#define CFG_HW_LPUART1_ADVFEATUREINIT          UART_ADVFEATURE_NO_INIT
+#define CFG_HW_LPUART1_OVERSAMPLING            UART_OVERSAMPLING_8
+
+#define CFG_HW_LPUART1_TX_PORT_CLK_ENABLE      __HAL_RCC_GPIOA_CLK_ENABLE
+#define CFG_HW_LPUART1_TX_PORT                 GPIOA
+#define CFG_HW_LPUART1_TX_PIN                  GPIO_PIN_2
+#define CFG_HW_LPUART1_TX_MODE                 GPIO_MODE_AF_PP
+#define CFG_HW_LPUART1_TX_PULL                 GPIO_NOPULL
+#define CFG_HW_LPUART1_TX_SPEED                GPIO_SPEED_FREQ_VERY_HIGH
+#define CFG_HW_LPUART1_TX_ALTERNATE            GPIO_AF8_LPUART1
+
+#define CFG_HW_LPUART1_RX_PORT_CLK_ENABLE      __HAL_RCC_GPIOA_CLK_ENABLE
+#define CFG_HW_LPUART1_RX_PORT                 GPIOA
+#define CFG_HW_LPUART1_RX_PIN                  GPIO_PIN_3
+#define CFG_HW_LPUART1_RX_MODE                 GPIO_MODE_AF_PP
+#define CFG_HW_LPUART1_RX_PULL                 GPIO_NOPULL
+#define CFG_HW_LPUART1_RX_SPEED                GPIO_SPEED_FREQ_VERY_HIGH
+#define CFG_HW_LPUART1_RX_ALTERNATE            GPIO_AF8_LPUART1
+
+#define CFG_HW_LPUART1_DMA_TX_PREEMPTPRIORITY  0x0F
+#define CFG_HW_LPUART1_DMA_TX_SUBPRIORITY      0
+
+#define CFG_HW_LPUART1_DMAMUX_CLK_ENABLE       __HAL_RCC_DMAMUX1_CLK_ENABLE
+#define CFG_HW_LPUART1_DMA_CLK_ENABLE          __HAL_RCC_DMA1_CLK_ENABLE
+#define CFG_HW_LPUART1_TX_DMA_REQ              DMA_REQUEST_LPUART1_TX
+#define CFG_HW_LPUART1_TX_DMA_CHANNEL          DMA1_Channel1
+#define CFG_HW_LPUART1_TX_DMA_IRQn             DMA1_Channel1_IRQn
+#define CFG_HW_LPUART1_DMA_TX_IRQHandler       DMA1_Channel1_IRQHandler
+
+/**
+ * UART1
+ */
+#define CFG_HW_USART1_PREEMPTPRIORITY         0x0F
+#define CFG_HW_USART1_SUBPRIORITY             0
+
+/** < The application shall check the selected source clock is enable */
+#define CFG_HW_USART1_SOURCE_CLOCK              RCC_USART1CLKSOURCE_SYSCLK
+
+#define CFG_HW_USART1_BAUDRATE                115200
+#define CFG_HW_USART1_WORDLENGTH              UART_WORDLENGTH_8B
+#define CFG_HW_USART1_STOPBITS                UART_STOPBITS_1
+#define CFG_HW_USART1_PARITY                  UART_PARITY_NONE
+#define CFG_HW_USART1_HWFLOWCTL               UART_HWCONTROL_NONE
+#define CFG_HW_USART1_MODE                    UART_MODE_TX_RX
+#define CFG_HW_USART1_ADVFEATUREINIT          UART_ADVFEATURE_NO_INIT
+#define CFG_HW_USART1_OVERSAMPLING            UART_OVERSAMPLING_8
+
+#define CFG_HW_USART1_TX_PORT_CLK_ENABLE      __HAL_RCC_GPIOB_CLK_ENABLE
+#define CFG_HW_USART1_TX_PORT                 GPIOB
+#define CFG_HW_USART1_TX_PIN                  GPIO_PIN_6
+#define CFG_HW_USART1_TX_MODE                 GPIO_MODE_AF_PP
+#define CFG_HW_USART1_TX_PULL                 GPIO_NOPULL
+#define CFG_HW_USART1_TX_SPEED                GPIO_SPEED_FREQ_VERY_HIGH
+#define CFG_HW_USART1_TX_ALTERNATE            GPIO_AF7_USART1
+
+#define CFG_HW_USART1_RX_PORT_CLK_ENABLE      __HAL_RCC_GPIOB_CLK_ENABLE
+#define CFG_HW_USART1_RX_PORT                 GPIOB
+#define CFG_HW_USART1_RX_PIN                  GPIO_PIN_7
+#define CFG_HW_USART1_RX_MODE                 GPIO_MODE_AF_PP
+#define CFG_HW_USART1_RX_PULL                 GPIO_NOPULL
+#define CFG_HW_USART1_RX_SPEED                GPIO_SPEED_FREQ_VERY_HIGH
+#define CFG_HW_USART1_RX_ALTERNATE            GPIO_AF7_USART1
+
+#define CFG_HW_USART1_CTS_PORT_CLK_ENABLE     __HAL_RCC_GPIOA_CLK_ENABLE
+#define CFG_HW_USART1_CTS_PORT                GPIOA
+#define CFG_HW_USART1_CTS_PIN                 GPIO_PIN_11
+#define CFG_HW_USART1_CTS_MODE                GPIO_MODE_AF_PP
+#define CFG_HW_USART1_CTS_PULL                GPIO_PULLDOWN
+#define CFG_HW_USART1_CTS_SPEED               GPIO_SPEED_FREQ_VERY_HIGH
+#define CFG_HW_USART1_CTS_ALTERNATE           GPIO_AF7_USART1
+
+#define CFG_HW_USART1_DMA_TX_PREEMPTPRIORITY  0x0F
+#define CFG_HW_USART1_DMA_TX_SUBPRIORITY      0
+
+#define CFG_HW_USART1_DMAMUX_CLK_ENABLE       __HAL_RCC_DMAMUX1_CLK_ENABLE
+#define CFG_HW_USART1_DMA_CLK_ENABLE          __HAL_RCC_DMA1_CLK_ENABLE
+#define CFG_HW_USART1_TX_DMA_REQ			  DMA_REQUEST_USART1_TX
+#define CFG_HW_USART1_TX_DMA_CHANNEL          DMA1_Channel2
+#define CFG_HW_USART1_TX_DMA_IRQn             DMA1_Channel2_IRQn
+#define CFG_HW_USART1_DMA_TX_IRQHandler       DMA1_Channel2_IRQHandler
+
+#endif /*HW_CONF_H */

Core/Inc/hw_if.h

@@ -0,0 +1,247 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    hw_if.h
+  * @author  MCD Application Team
+  * @brief   Hardware Interface
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2020-2023 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef HW_IF_H
+#define HW_IF_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+  /* Includes ------------------------------------------------------------------*/
+#include "stm32wbxx.h"
+#include "stm32wbxx_ll_exti.h"
+#include "stm32wbxx_ll_system.h"
+#include "stm32wbxx_ll_rcc.h"
+#include "stm32wbxx_ll_ipcc.h"
+#include "stm32wbxx_ll_bus.h"
+#include "stm32wbxx_ll_pwr.h"
+#include "stm32wbxx_ll_cortex.h"
+#include "stm32wbxx_ll_utils.h"
+#include "stm32wbxx_ll_hsem.h"
+#include "stm32wbxx_ll_gpio.h"
+#include "stm32wbxx_ll_rtc.h"
+
+#ifdef  USE_STM32WBXX_USB_DONGLE
+#include "stm32wbxx_usb_dongle.h"
+#endif
+#ifdef  USE_STM32WBXX_NUCLEO
+#include "stm32wbxx_nucleo.h"
+#endif
+#ifdef  USE_X_NUCLEO_EPD
+#include "x_nucleo_epd.h"
+#endif
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+  /******************************************************************************
+   * HW UART
+   ******************************************************************************/
+  typedef enum
+  {
+    hw_uart1,
+    hw_uart2,
+    hw_lpuart1,
+  } hw_uart_id_t;
+
+  typedef enum
+  {
+    hw_uart_ok,
+    hw_uart_error,
+    hw_uart_busy,
+    hw_uart_to,
+  } hw_status_t;
+
+  void HW_UART_Init(hw_uart_id_t hw_uart_id);
+  void HW_UART_Receive_IT(hw_uart_id_t hw_uart_id, uint8_t *pData, uint16_t Size, void (*Callback)(void));
+  void HW_UART_Transmit_IT(hw_uart_id_t hw_uart_id, uint8_t *pData, uint16_t Size,  void (*Callback)(void));
+  hw_status_t HW_UART_Transmit(hw_uart_id_t hw_uart_id, uint8_t *p_data, uint16_t size,  uint32_t timeout);
+  hw_status_t HW_UART_Transmit_DMA(hw_uart_id_t hw_uart_id, uint8_t *p_data, uint16_t size, void (*Callback)(void));
+  void HW_UART_Interrupt_Handler(hw_uart_id_t hw_uart_id);
+  void HW_UART_DMA_Interrupt_Handler(hw_uart_id_t hw_uart_id);
+
+  /******************************************************************************
+   * HW TimerServer
+   ******************************************************************************/
+  /* Exported types ------------------------------------------------------------*/
+  /**
+   * This setting is used when standby mode is supported.
+   * hw_ts_InitMode_Limited should be used when the device restarts from Standby Mode. In that case, the Timer Server does
+   * not re-initialized its context. Only the Hardware register which content has been lost is reconfigured
+   * Otherwise, hw_ts_InitMode_Full should be requested (Start from Power ON) and everything is re-initialized.
+   */
+  typedef enum
+  {
+    hw_ts_InitMode_Full,
+    hw_ts_InitMode_Limited,
+  } HW_TS_InitMode_t;
+
+  /**
+   * When a Timer is created as a SingleShot timer, it is not automatically restarted when the timeout occurs. However,
+   * the timer is kept reserved in the list and could be restarted at anytime with HW_TS_Start()
+   *
+   * When a Timer is created as a Repeated timer, it is automatically restarted when the timeout occurs.
+   */
+  typedef enum
+  {
+    hw_ts_SingleShot,
+    hw_ts_Repeated
+  } HW_TS_Mode_t;
+
+  /**
+   * hw_ts_Successful is returned when a Timer has been successfully created with HW_TS_Create(). Otherwise, hw_ts_Failed
+   * is returned. When hw_ts_Failed is returned, that means there are not enough free slots in the list to create a
+   * Timer. In that case, CFG_HW_TS_MAX_NBR_CONCURRENT_TIMER should be increased
+   */
+  typedef enum
+  {
+    hw_ts_Successful,
+    hw_ts_Failed,
+  }HW_TS_ReturnStatus_t;
+
+  typedef void (*HW_TS_pTimerCb_t)(void);
+
+  /**
+   * @brief  Initialize the timer server
+   *         This API shall be called by the application before any timer is requested to the timer server. It
+   *         configures the RTC module to be connected to the LSI input clock.
+   *
+   * @param  TimerInitMode: When the device restarts from Standby, it should request hw_ts_InitMode_Limited so that the
+   *         Timer context is not re-initialized. Otherwise, hw_ts_InitMode_Full should be requested
+   * @param  hrtc: RTC Handle
+   * @retval None
+   */
+  void HW_TS_Init(HW_TS_InitMode_t TimerInitMode, RTC_HandleTypeDef *hrtc);
+
+  /**
+   * @brief  Interface to create a virtual timer
+   *         The user shall call this API to create a timer. Once created, the timer is reserved to the module until it
+   *         has been deleted. When creating a timer, the user shall specify the mode (single shot or repeated), the
+   *         callback to be notified when the timer expires and a module ID to identify in the timer interrupt handler
+   *         which module is concerned. In return, the user gets a timer ID to handle it.
+   *
+   * @param  TimerProcessID:  This is an identifier provided by the user and returned in the callback to allow
+   *                          identification of the requester
+   * @param  pTimerId: Timer Id returned to the user to request operation (start, stop, delete)
+   * @param  TimerMode: Mode of the virtual timer (Single shot or repeated)
+   * @param  pTimerCallBack: Callback when the virtual timer expires
+   * @retval HW_TS_ReturnStatus_t: Return whether the creation is successful or not
+   */
+  HW_TS_ReturnStatus_t HW_TS_Create(uint32_t TimerProcessID, uint8_t *pTimerId, HW_TS_Mode_t TimerMode, HW_TS_pTimerCb_t pTimerCallBack);
+
+  /**
+   * @brief  Stop a virtual timer
+   *         This API may be used to stop a running timer. A timer which is stopped is move to the pending state.
+   *         A pending timer may be restarted at any time with a different timeout value but the mode cannot be changed.
+   *         Nothing is done when it is called to stop a timer which has been already stopped
+   *
+   * @param  TimerID:  Id of the timer to stop
+   * @retval None
+   */
+  void HW_TS_Stop(uint8_t TimerID);
+
+  /**
+   * @brief  Start a virtual timer
+   *         This API shall be used to start a timer. The timeout value is specified and may be different each time.
+   *         When the timer is in the single shot mode, it will move to the pending state when it expires. The user may
+   *         restart it at any time with a different timeout value. When the timer is in the repeated mode, it always
+   *         stay in the running state. When the timer expires, it will be restarted with the same timeout value.
+   *         This API shall not be called on a running timer.
+   *
+   * @param  TimerID:  The ID Id of the timer to start
+   * @param  timeout_ticks: Number of ticks of the virtual timer (Maximum value is (0xFFFFFFFF-0xFFFF = 0xFFFF0000)
+   * @retval None
+   */
+  void HW_TS_Start(uint8_t TimerID, uint32_t timeout_ticks);
+
+  /**
+   * @brief  Delete a virtual timer from the list
+   *         This API should be used when a timer is not needed anymore by the user. A deleted timer is removed from
+   *         the timer list managed by the timer server. It cannot be restarted again. The user has to go with the
+   *         creation of a new timer if required and may get a different timer id
+   *
+   * @param  TimerID:  The ID of the timer to remove from the list
+   * @retval None
+   */
+  void HW_TS_Delete(uint8_t TimerID);
+
+  /**
+   * @brief  Schedule the timer list on the timer interrupt handler
+   *         This interrupt handler shall be called by the application in the RTC interrupt handler. This handler takes
+   *         care of clearing all status flag required in the RTC and EXTI peripherals
+   *
+   * @param  None
+   * @retval None
+   */
+  void HW_TS_RTC_Wakeup_Handler(void);
+
+  /**
+   * @brief  Return the number of ticks to count before the interrupt
+   *         This API returns the number of ticks left to be counted before an interrupt is generated by the
+   *         Timer Server. This API may be used by the application for power management optimization. When the system
+   *         enters low power mode, the mode selection is a tradeoff between the wakeup time where the CPU is running
+   *         and the time while the CPU will be kept in low power mode before next wakeup. The deeper is the
+   *         low power mode used, the longer is the wakeup time. The low power mode management considering wakeup time
+   *         versus time in low power mode is implementation specific
+   *         When the timer is disabled (No timer in the list), it returns 0xFFFF
+   *
+   * @param  None
+   * @retval The number of ticks left to count
+   */
+  uint16_t HW_TS_RTC_ReadLeftTicksToCount(void);
+
+  /**
+   * @brief  Notify the application that a registered timer has expired
+   *         This API shall be implemented by the user application.
+   *         This API notifies the application that a timer expires. This API is running in the RTC Wakeup interrupt
+   *         context. The application may implement an Operating System to change the context priority where the timer
+   *         callback may be handled. This API provides the module ID to identify which module is concerned and to allow
+   *         sending the information to the correct task
+   *
+   * @param  TimerProcessID: The TimerProcessId associated with the timer when it has been created
+   * @param  TimerID: The TimerID of the expired timer
+   * @param  pTimerCallBack: The Callback associated with the timer when it has been created
+   * @retval None
+   */
+  void HW_TS_RTC_Int_AppNot(uint32_t TimerProcessID, uint8_t TimerID, HW_TS_pTimerCb_t pTimerCallBack);
+
+  /**
+   * @brief  Notify the application that the wakeupcounter has been updated
+   *         This API should be implemented by the user application
+   *         This API notifies the application that the counter has been updated. This is expected to be used along
+   *         with the HW_TS_RTC_ReadLeftTicksToCount () API. It could be that the counter has been updated since the
+   *         last call of HW_TS_RTC_ReadLeftTicksToCount () and before entering low power mode. This notification
+   *         provides a way to the application to solve that race condition to reevaluate the counter value before
+   *         entering low power mode
+   *
+   * @param  None
+   * @retval None
+   */
+  void HW_TS_RTC_CountUpdated_AppNot(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /*HW_IF_H */

Core/Inc/main.h

@@ -0,0 +1,74 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file           : main.h
+  * @brief          : Header for main.c file.
+  *                   This file contains the common defines of the application.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2020-2023 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __MAIN_H
+#define __MAIN_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32wbxx_hal.h"
+#include "app_conf.h"
+#include "app_entry.h"
+#include "app_common.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void Error_Handler(void);
+void MX_LPUART1_UART_Init(void);
+void MX_USART1_UART_Init(void);
+
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+/* Private defines -----------------------------------------------------------*/
+
+/* USER CODE BEGIN Private defines */
+
+/* USER CODE END Private defines */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __MAIN_H */

Core/Inc/stm32_lpm_if.h

@@ -0,0 +1,80 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    stm32_lpm_if.h
+  * @author  MCD Application Team
+  * @brief   Header for stm32_lpm_if.c module (device specific LP management)
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019-2023 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32_LPM_IF_H
+#define STM32_LPM_IF_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+
+/**
+  * @brief Enters Low Power Off Mode
+  * @param none
+  * @retval none
+  */
+void PWR_EnterOffMode( void );
+/**
+  * @brief Exits Low Power Off Mode
+  * @param none
+  * @retval none
+  */
+void PWR_ExitOffMode( void );
+
+/**
+  * @brief Enters Low Power Stop Mode
+  * @note ARM exists the function when waking up
+  * @param none
+  * @retval none
+  */
+void PWR_EnterStopMode( void );
+/**
+  * @brief Exits Low Power Stop Mode
+  * @note Enable the pll at 32MHz
+  * @param none
+  * @retval none
+  */
+void PWR_ExitStopMode( void );
+
+/**
+  * @brief Enters Low Power Sleep Mode
+  * @note ARM exits the function when waking up
+  * @param none
+  * @retval none
+  */
+void PWR_EnterSleepMode( void );
+
+/**
+  * @brief Exits Low Power Sleep Mode
+  * @note ARM exits the function when waking up
+  * @param none
+  * @retval none
+  */
+void PWR_ExitSleepMode( void );
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /*STM32_LPM_IF_H */
+

Core/Inc/stm32wbxx_hal_conf.h

@@ -0,0 +1,352 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    stm32wbxx_hal_conf.h
+  * @author  MCD Application Team
+  * @brief   HAL configuration file.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32WBxx_HAL_CONF_H
+#define __STM32WBxx_HAL_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ########################## Module Selection ############################## */
+/**
+  * @brief This is the list of modules to be used in the HAL driver
+  */
+#define HAL_MODULE_ENABLED
+/*#define HAL_ADC_MODULE_ENABLED   */
+/*#define HAL_CRYP_MODULE_ENABLED   */
+/*#define HAL_COMP_MODULE_ENABLED   */
+/*#define HAL_CRC_MODULE_ENABLED   */
+#define HAL_HSEM_MODULE_ENABLED
+/*#define HAL_I2C_MODULE_ENABLED   */
+#define HAL_IPCC_MODULE_ENABLED
+/*#define HAL_IRDA_MODULE_ENABLED   */
+/*#define HAL_IWDG_MODULE_ENABLED   */
+/*#define HAL_LCD_MODULE_ENABLED   */
+/*#define HAL_LPTIM_MODULE_ENABLED   */
+/*#define HAL_PCD_MODULE_ENABLED   */
+/*#define HAL_PKA_MODULE_ENABLED   */
+/*#define HAL_QSPI_MODULE_ENABLED   */
+/*#define HAL_RNG_MODULE_ENABLED   */
+#define HAL_RTC_MODULE_ENABLED
+/*#define HAL_SAI_MODULE_ENABLED   */
+/*#define HAL_SMBUS_MODULE_ENABLED   */
+/*#define HAL_SMARTCARD_MODULE_ENABLED   */
+/*#define HAL_SPI_MODULE_ENABLED   */
+/*#define HAL_TIM_MODULE_ENABLED   */
+/*#define HAL_TSC_MODULE_ENABLED   */
+#define HAL_UART_MODULE_ENABLED
+/*#define HAL_USART_MODULE_ENABLED   */
+/*#define HAL_WWDG_MODULE_ENABLED   */
+#define HAL_EXTI_MODULE_ENABLED
+#define HAL_CORTEX_MODULE_ENABLED
+#define HAL_DMA_MODULE_ENABLED
+#define HAL_FLASH_MODULE_ENABLED
+#define HAL_GPIO_MODULE_ENABLED
+#define HAL_PWR_MODULE_ENABLED
+#define HAL_RCC_MODULE_ENABLED
+
+#define USE_HAL_ADC_REGISTER_CALLBACKS       0u
+#define USE_HAL_COMP_REGISTER_CALLBACKS      0u
+#define USE_HAL_CRYP_REGISTER_CALLBACKS      0u
+#define USE_HAL_I2C_REGISTER_CALLBACKS       0u
+#define USE_HAL_IRDA_REGISTER_CALLBACKS      0u
+#define USE_HAL_LPTIM_REGISTER_CALLBACKS     0u
+#define USE_HAL_PCD_REGISTER_CALLBACKS       0u
+#define USE_HAL_PKA_REGISTER_CALLBACKS       0u
+#define USE_HAL_QSPI_REGISTER_CALLBACKS      0u
+#define USE_HAL_RNG_REGISTER_CALLBACKS       0u
+#define USE_HAL_RTC_REGISTER_CALLBACKS       0u
+#define USE_HAL_SAI_REGISTER_CALLBACKS       0u
+#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS 0u
+#define USE_HAL_SMBUS_REGISTER_CALLBACKS     0u
+#define USE_HAL_SPI_REGISTER_CALLBACKS       0u
+#define USE_HAL_TIM_REGISTER_CALLBACKS       0u
+#define USE_HAL_TSC_REGISTER_CALLBACKS       0u
+#define USE_HAL_UART_REGISTER_CALLBACKS      0u
+#define USE_HAL_USART_REGISTER_CALLBACKS     0u
+#define USE_HAL_WWDG_REGISTER_CALLBACKS      0u
+
+/* ########################## Oscillator Values adaptation ####################*/
+/**
+  * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSE is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSE_VALUE)
+#define HSE_VALUE    32000000U             /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSE_STARTUP_TIMEOUT)
+  #define HSE_STARTUP_TIMEOUT    ((uint32_t)100)   /*!< Time out for HSE start up, in ms */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief Internal Multiple Speed oscillator (MSI) default value.
+  *        This value is the default MSI range value after Reset.
+  */
+#if !defined  (MSI_VALUE)
+  #define MSI_VALUE    ((uint32_t)4000000) /*!< Value of the Internal oscillator in Hz*/
+#endif /* MSI_VALUE */
+
+/**
+  * @brief Internal High Speed oscillator (HSI) value.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSI is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSI_VALUE)
+#define HSI_VALUE    16000000U            /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @brief Internal Low Speed oscillator (LSI1) value.
+  */
+#if !defined  (LSI1_VALUE)
+ #define LSI1_VALUE  ((uint32_t)32000)       /*!< LSI1 Typical Value in Hz*/
+#endif /* LSI1_VALUE */                      /*!< Value of the Internal Low Speed oscillator in Hz
+                                             The real value may vary depending on the variations
+                                             in voltage and temperature.*/
+/**
+  * @brief Internal Low Speed oscillator (LSI2) value.
+  */
+#if !defined  (LSI2_VALUE)
+ #define LSI2_VALUE  ((uint32_t)32000)       /*!< LSI2 Typical Value in Hz*/
+#endif /* LSI2_VALUE */                      /*!< Value of the Internal Low Speed oscillator in Hz
+                                             The real value may vary depending on the variations
+                                             in voltage and temperature.*/
+
+/**
+  * @brief External Low Speed oscillator (LSE) value.
+  *        This value is used by the UART, RTC HAL module to compute the system frequency
+  */
+#if !defined  (LSE_VALUE)
+#define LSE_VALUE    32768U               /*!< Value of the External oscillator in Hz*/
+#endif /* LSE_VALUE */
+
+/**
+  * @brief Internal Multiple Speed oscillator (HSI48) default value.
+  *        This value is the default HSI48 range value after Reset.
+  */
+#if !defined (HSI48_VALUE)
+  #define HSI48_VALUE    ((uint32_t)48000000) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI48_VALUE */
+
+#if !defined  (LSE_STARTUP_TIMEOUT)
+#define LSE_STARTUP_TIMEOUT    5000U      /*!< Time out for LSE start up, in ms */
+#endif /* LSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief External clock source for SAI1 peripheral
+  *        This value is used by the RCC HAL module to compute the SAI1 & SAI2 clock source
+  *        frequency.
+  */
+#if !defined (EXTERNAL_SAI1_CLOCK_VALUE)
+  #define EXTERNAL_SAI1_CLOCK_VALUE    ((uint32_t)2097000) /*!< Value of the SAI1 External clock source in Hz*/
+#endif /* EXTERNAL_SAI1_CLOCK_VALUE */
+
+/* Tip: To avoid modifying this file each time you need to use different HSE,
+   ===  you can define the HSE value in your toolchain compiler preprocessor. */
+
+/* ########################### System Configuration ######################### */
+/**
+  * @brief This is the HAL system configuration section
+  */
+
+#define  VDD_VALUE				3300U                   /*!< Value of VDD in mv */
+#define  TICK_INT_PRIORITY            0U      /*!< tick interrupt priority */
+#define  USE_RTOS                     0U
+#define  PREFETCH_ENABLE              1U
+#define  INSTRUCTION_CACHE_ENABLE     1U
+#define  DATA_CACHE_ENABLE            1U
+
+/* ########################## Assert Selection ############################## */
+/**
+  * @brief Uncomment the line below to expanse the "assert_param" macro in the
+  *        HAL drivers code
+  */
+/* #define USE_FULL_ASSERT    1U */
+
+/* ################## SPI peripheral configuration ########################## */
+
+/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
+ * Activated: CRC code is present inside driver
+ * Deactivated: CRC code cleaned from driver
+ */
+
+#define USE_SPI_CRC                   0U
+
+/* Includes ------------------------------------------------------------------*/
+/**
+  * @brief Include module's header file
+  */
+#ifdef HAL_DMA_MODULE_ENABLED
+  #include "stm32wbxx_hal_dma.h"
+#endif /* HAL_DMA_MODULE_ENABLED */
+
+#ifdef HAL_ADC_MODULE_ENABLED
+  #include "stm32wbxx_hal_adc.h"
+#endif /* HAL_ADC_MODULE_ENABLED */
+
+#ifdef HAL_COMP_MODULE_ENABLED
+  #include "stm32wbxx_hal_comp.h"
+#endif /* HAL_COMP_MODULE_ENABLED */
+
+#ifdef HAL_CORTEX_MODULE_ENABLED
+  #include "stm32wbxx_hal_cortex.h"
+#endif /* HAL_CORTEX_MODULE_ENABLED */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+  #include "stm32wbxx_hal_crc.h"
+#endif /* HAL_CRC_MODULE_ENABLED */
+
+#ifdef HAL_CRYP_MODULE_ENABLED
+  #include "stm32wbxx_hal_cryp.h"
+#endif /* HAL_CRYP_MODULE_ENABLED */
+
+#ifdef HAL_EXTI_MODULE_ENABLED
+  #include "stm32wbxx_hal_exti.h"
+#endif /* HAL_EXTI_MODULE_ENABLED */
+
+#ifdef HAL_FLASH_MODULE_ENABLED
+  #include "stm32wbxx_hal_flash.h"
+#endif /* HAL_FLASH_MODULE_ENABLED */
+
+#ifdef HAL_GPIO_MODULE_ENABLED
+  #include "stm32wbxx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
+#ifdef HAL_HSEM_MODULE_ENABLED
+  #include "stm32wbxx_hal_hsem.h"
+#endif /* HAL_HSEM_MODULE_ENABLED */
+
+#ifdef HAL_I2C_MODULE_ENABLED
+ #include "stm32wbxx_hal_i2c.h"
+#endif /* HAL_I2C_MODULE_ENABLED */
+
+#ifdef HAL_IPCC_MODULE_ENABLED
+ #include "stm32wbxx_hal_ipcc.h"
+#endif /* HAL_IPCC_MODULE_ENABLED */
+
+#ifdef HAL_IRDA_MODULE_ENABLED
+ #include "stm32wbxx_hal_irda.h"
+#endif /* HAL_IRDA_MODULE_ENABLED */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+ #include "stm32wbxx_hal_iwdg.h"
+#endif /* HAL_IWDG_MODULE_ENABLED */
+
+#ifdef HAL_LCD_MODULE_ENABLED
+ #include "stm32wbxx_hal_lcd.h"
+#endif /* HAL_LCD_MODULE_ENABLED */
+
+#ifdef HAL_LPTIM_MODULE_ENABLED
+  #include "stm32wbxx_hal_lptim.h"
+#endif /* HAL_LPTIM_MODULE_ENABLED */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+  #include "stm32wbxx_hal_pcd.h"
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+#ifdef HAL_PKA_MODULE_ENABLED
+  #include "stm32wbxx_hal_pka.h"
+#endif /* HAL_PKA_MODULE_ENABLED */
+
+#ifdef HAL_PWR_MODULE_ENABLED
+ #include "stm32wbxx_hal_pwr.h"
+#endif /* HAL_PWR_MODULE_ENABLED */
+
+#ifdef HAL_QSPI_MODULE_ENABLED
+ #include "stm32wbxx_hal_qspi.h"
+#endif /* HAL_QSPI_MODULE_ENABLED */
+
+#ifdef HAL_RCC_MODULE_ENABLED
+  #include "stm32wbxx_hal_rcc.h"
+#endif /* HAL_RCC_MODULE_ENABLED */
+
+#ifdef HAL_RNG_MODULE_ENABLED
+  #include "stm32wbxx_hal_rng.h"
+#endif /* HAL_RNG_MODULE_ENABLED */
+
+#ifdef HAL_RTC_MODULE_ENABLED
+ #include "stm32wbxx_hal_rtc.h"
+#endif /* HAL_RTC_MODULE_ENABLED */
+
+#ifdef HAL_SAI_MODULE_ENABLED
+ #include "stm32wbxx_hal_sai.h"
+#endif /* HAL_SAI_MODULE_ENABLED */
+
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+ #include "stm32wbxx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
+#ifdef HAL_SMBUS_MODULE_ENABLED
+ #include "stm32wbxx_hal_smbus.h"
+#endif /* HAL_SMBUS_MODULE_ENABLED */
+
+#ifdef HAL_SPI_MODULE_ENABLED
+ #include "stm32wbxx_hal_spi.h"
+#endif /* HAL_SPI_MODULE_ENABLED */
+
+#ifdef HAL_TIM_MODULE_ENABLED
+ #include "stm32wbxx_hal_tim.h"
+#endif /* HAL_TIM_MODULE_ENABLED */
+
+#ifdef HAL_TSC_MODULE_ENABLED
+  #include "stm32wbxx_hal_tsc.h"
+#endif /* HAL_TSC_MODULE_ENABLED */
+
+#ifdef HAL_UART_MODULE_ENABLED
+ #include "stm32wbxx_hal_uart.h"
+#endif /* HAL_UART_MODULE_ENABLED */
+
+#ifdef HAL_USART_MODULE_ENABLED
+ #include "stm32wbxx_hal_usart.h"
+#endif /* HAL_USART_MODULE_ENABLED */
+
+#ifdef HAL_WWDG_MODULE_ENABLED
+ #include "stm32wbxx_hal_wwdg.h"
+#endif /* HAL_WWDG_MODULE_ENABLED */
+
+/* Exported macro ------------------------------------------------------------*/
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  The assert_param macro is used for function's parameters check.
+  * @param expr If expr is false, it calls assert_failed function
+  *         which reports the name of the source file and the source
+  *         line number of the call that failed.
+  *         If expr is true, it returns no value.
+  * @retval None
+  */
+  #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+  void assert_failed(uint8_t* file, uint32_t line);
+#else
+  #define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32WBxx_HAL_CONF_H */

Core/Inc/stm32wbxx_it.h

@@ -0,0 +1,83 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    stm32wbxx_it.h
+  * @brief   This file contains the headers of the interrupt handlers.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2020-2023 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+ ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32WBxx_IT_H
+#define __STM32WBxx_IT_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void NMI_Handler(void);
+void HardFault_Handler(void);
+void MemManage_Handler(void);
+void BusFault_Handler(void);
+void UsageFault_Handler(void);
+void SVC_Handler(void);
+void DebugMon_Handler(void);
+void PendSV_Handler(void);
+void SysTick_Handler(void);
+void PVD_PVM_IRQHandler(void);
+void RTC_WKUP_IRQHandler(void);
+void FLASH_IRQHandler(void);
+void RCC_IRQHandler(void);
+void DMA1_Channel1_IRQHandler(void);
+void DMA1_Channel2_IRQHandler(void);
+void C2SEV_PWR_C2H_IRQHandler(void);
+void USART1_IRQHandler(void);
+void LPUART1_IRQHandler(void);
+void PWR_SOTF_BLEACT_802ACT_RFPHASE_IRQHandler(void);
+void IPCC_C1_RX_IRQHandler(void);
+void IPCC_C1_TX_IRQHandler(void);
+void HSEM_IRQHandler(void);
+void FPU_IRQHandler(void);
+/* USER CODE BEGIN EFP */
+void EXTI0_IRQHandler(void);
+void EXTI1_IRQHandler(void);
+void EXTI4_IRQHandler(void);
+
+/* USER CODE END EFP */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32WBxx_IT_H */

Core/Inc/stm32wbxx_nucleo_conf.h

@@ -0,0 +1,79 @@
+/**
+  ******************************************************************************
+  * @file    stm32wbxx_nucleo_conf.h
+  * @author  MCD Application Team
+  * @brief   Discovery Module configuration file.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32WBXX_NUCLEO_CONF_H
+#define __STM32WBXX_NUCLEO_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32wbxx_hal.h"
+
+/** @addtogroup BSP
+  * @{
+  */
+
+/** @addtogroup STM32WBXX_NUCLEO
+  * @{
+  */
+
+/** @defgroup STM32WBXX_NUCLEO_CONFIG CONFIG
+  * @{
+  */
+
+/** @defgroup STM32WBXX_NUCLEO_CONFIG_Exported_Constants Exported Constants
+  * @{
+  */
+
+/* Uncomment the following line to enable VCP */
+/* #define USE_VCP_CONNECTION */
+
+/* COM port usage */
+#if defined(USE_VCP_CONNECTION)
+#define USE_BSP_COM_FEATURE                  1U
+#define USE_COM_LOG                          1U
+#else
+#define USE_BSP_COM_FEATURE                  0U
+#define USE_COM_LOG                          0U
+#endif /* USE_VCP_CONNECTION */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32WBXX_NUCLEO_CONF_H */

Core/Inc/stm_logging.h

@@ -0,0 +1,60 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    stm_logging.h
+  * @author  MCD Application Team
+  * @brief   Application header file for logging
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019-2023 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+#ifndef STM_LOGGING_H_
+#define STM_LOGGING_H_
+
+#define LOG_LEVEL_NONE  0  /* None     */
+#define LOG_LEVEL_CRIT  1U  /* Critical */
+#define LOG_LEVEL_WARN  2U  /* Warning  */
+#define LOG_LEVEL_INFO  3U  /* Info     */
+#define LOG_LEVEL_DEBG  4U  /* Debug    */
+
+#define APP_DBG_FULL(level, region, ...)                                                    \
+  {                                                                                         \
+    if (APPLI_PRINT_FILE_FUNC_LINE == 1U)                                                   \
+    {                                                                                       \
+        printf("\r\n[%s][%s][%d] ", DbgTraceGetFileName(__FILE__),__FUNCTION__,__LINE__);   \
+    }                                                                                       \
+    logApplication(level, region, __VA_ARGS__);                                             \
+  }
+#define APP_DBG(...)                                                                        \
+  {                                                                                         \
+    if (APPLI_PRINT_FILE_FUNC_LINE == 1U)                                                   \
+    {                                                                                       \
+        printf("\r\n[%s][%s][%d] ", DbgTraceGetFileName(__FILE__),__FUNCTION__,__LINE__);   \
+    }                                                                                       \
+    logApplication(LOG_LEVEL_NONE, APPLI_LOG_REGION_GENERAL, __VA_ARGS__);                  \
+  }
+/**
+ * This enumeration represents log regions.
+ *
+ */
+typedef enum
+{
+  APPLI_LOG_REGION_GENERAL                    = 1U,  /* General                 */
+  APPLI_LOG_REGION_ZIGBEE_API                 = 2U,  /* Zigbee API              */
+} appliLogRegion_t;
+
+typedef uint8_t appliLogLevel_t;
+
+void logApplication(appliLogLevel_t aLogLevel, appliLogRegion_t aLogRegion, const char *aFormat, ...);
+
+#endif  /* STM_LOGGING_H_ */

Core/Inc/utilities_conf.h

@@ -0,0 +1,66 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    utilities_conf.h
+  * @author  MCD Application Team
+  * @brief   Configuration file for STM32 Utilities.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019-2023 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  *****************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef UTILITIES_CONF_H
+#define UTILITIES_CONF_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "cmsis_compiler.h"
+#include "string.h"
+#include "app_conf.h"
+
+/******************************************************************************
+ * common
+ ******************************************************************************/
+#define UTILS_ENTER_CRITICAL_SECTION( )   uint32_t primask_bit = __get_PRIMASK( );\
+                                          __disable_irq( )
+
+#define UTILS_EXIT_CRITICAL_SECTION( )          __set_PRIMASK( primask_bit )
+
+#define UTILS_MEMSET8( dest, value, size )      memset( dest, value, size);
+
+/******************************************************************************
+ * tiny low power manager
+ * (any macro that does not need to be modified can be removed)
+ ******************************************************************************/
+#define UTIL_LPM_INIT_CRITICAL_SECTION( )
+#define UTIL_LPM_ENTER_CRITICAL_SECTION( )      UTILS_ENTER_CRITICAL_SECTION( )
+#define UTIL_LPM_EXIT_CRITICAL_SECTION( )       UTILS_EXIT_CRITICAL_SECTION( )
+
+/******************************************************************************
+ * sequencer
+ * (any macro that does not need to be modified can be removed)
+ ******************************************************************************/
+#define UTIL_SEQ_INIT_CRITICAL_SECTION( )
+#define UTIL_SEQ_ENTER_CRITICAL_SECTION( )      UTILS_ENTER_CRITICAL_SECTION( )
+#define UTIL_SEQ_EXIT_CRITICAL_SECTION( )       UTILS_EXIT_CRITICAL_SECTION( )
+#define UTIL_SEQ_CONF_TASK_NBR                  (32)
+#define UTIL_SEQ_CONF_PRIO_NBR                  CFG_SCH_PRIO_NBR
+#define UTIL_SEQ_MEMSET8( dest, value, size )   UTILS_MEMSET8( dest, value, size )
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /*UTILITIES_CONF_H */

Core/Src/app_entry.c

@@ -0,0 +1,751 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    app_entry.c
+  * @author  MCD Application Team
+  * @brief   Entry point of the application
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019-2023 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "app_common.h"
+#include "main.h"
+#include "app_entry.h"
+#include "app_zigbee.h"
+#include "app_conf.h"
+#include "hw_conf.h"
+#include "stm32_seq.h"
+#include "stm_logging.h"
+#include "shci_tl.h"
+#include "stm32_lpm.h"
+#include "dbg_trace.h"
+#include "shci.h"
+#include "otp.h"
+
+/* Private includes -----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+#include "hardware.h"
+#include "zigbee_app.h"
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+extern RTC_HandleTypeDef hrtc;
+/* USER CODE BEGIN PTD */
+
+/* USER CODE END PTD */
+
+/* Private defines -----------------------------------------------------------*/
+/* POOL_SIZE = 2(TL_PacketHeader_t) + 258 (3(TL_EVT_HDR_SIZE) + 255(Payload size)) */
+#define POOL_SIZE (CFG_TL_EVT_QUEUE_LENGTH * 4U * DIVC((sizeof(TL_PacketHeader_t) + TL_EVENT_FRAME_SIZE), 4U))
+
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macros ------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+PLACE_IN_SECTION("MB_MEM2") ALIGN(4) static uint8_t EvtPool[POOL_SIZE];
+PLACE_IN_SECTION("MB_MEM2") ALIGN(4) static TL_CmdPacket_t SystemCmdBuffer;
+PLACE_IN_SECTION("MB_MEM2") ALIGN(4) static uint8_t SystemSpareEvtBuffer[sizeof(TL_PacketHeader_t) + TL_EVT_HDR_SIZE + 255U];
+extern uint8_t g_ot_notification_allowed;
+
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Global function prototypes -----------------------------------------------*/
+#if (CFG_DEBUG_TRACE != 0)
+size_t DbgTraceWrite(int handle, const unsigned char * buf, size_t bufSize);
+#endif /* CFG_DEBUG_TRACE != 0 */
+
+/* USER CODE BEGIN GFP */
+
+/* USER CODE END GFP */
+
+/* Private functions prototypes-----------------------------------------------*/
+static void Config_HSE(void);
+static void Reset_Device(void);
+#if (CFG_HW_RESET_BY_FW == 1)
+static void Reset_IPCC(void);
+static void Reset_BackupDomain(void);
+#endif /* CFG_HW_RESET_BY_FW == 1*/
+static void System_Init(void);
+static void SystemPower_Config(void);
+static void Init_Debug(void);
+static void appe_Tl_Init(void);
+static void APPE_SysStatusNot(SHCI_TL_CmdStatus_t status);
+static void APPE_SysUserEvtRx(void * pPayload);
+static void APPE_SysEvtReadyProcessing(void);
+static void APPE_SysEvtError(SCHI_SystemErrCode_t ErrorCode);
+#if (CFG_HW_LPUART1_ENABLED == 1)
+extern void MX_LPUART1_UART_Init(void);
+#endif /* CFG_HW_LPUART1_ENABLED == 1 */
+#if (CFG_HW_USART1_ENABLED == 1)
+extern void MX_USART1_UART_Init(void);
+#endif /* CFG_HW_USART1_ENABLED == 1 */
+static void Init_Rtc(void);
+
+/* USER CODE BEGIN PFP */
+static void Led_Init(void);
+static void Button_Init(void);
+
+/* Section specific to button management using UART */
+static void RxUART_Init(void);
+static void RxCpltCallback(void);
+static void UartCmdExecute(void);
+
+#define C_SIZE_CMD_STRING       256U
+#define RX_BUFFER_SIZE          8U
+
+static uint8_t aRxBuffer[RX_BUFFER_SIZE];
+static uint8_t CommandString[C_SIZE_CMD_STRING];
+static uint16_t indexReceiveChar = 0;
+EXTI_HandleTypeDef exti_handle;
+
+/* USER CODE END PFP */
+
+/* Functions Definition ------------------------------------------------------*/
+void MX_APPE_Config(void)
+{
+  /**
+   * The OPTVERR flag is wrongly set at power on
+   * It shall be cleared before using any HAL_FLASH_xxx() api
+   */
+  __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_OPTVERR);
+
+  /**
+   * Reset some configurations so that the system behave in the same way
+   * when either out of nReset or Power On
+   */
+  Reset_Device();
+
+  /* Configure HSE Tuning */
+  Config_HSE();
+
+  return;
+}
+
+void MX_APPE_Init(void)
+{
+  System_Init();       /**< System initialization */
+
+  SystemPower_Config(); /**< Configure the system Power Mode */
+
+  HW_TS_Init(hw_ts_InitMode_Full, &hrtc); /**< Initialize the TimerServer */
+
+/* USER CODE BEGIN APPE_Init_1 */
+  Init_Debug();
+    
+  Led_Init();
+  Button_Init();
+  RxUART_Init();
+
+/* USER CODE END APPE_Init_1 */
+  appe_Tl_Init();	/* Initialize all transport layers */
+
+  /**
+   * From now, the application is waiting for the ready event (VS_HCI_C2_Ready)
+   * received on the system channel before starting the Stack
+   * This system event is received with APPE_SysUserEvtRx()
+   */
+/* USER CODE BEGIN APPE_Init_2 */
+  Hardware_Init();
+  ZigbeeApp_Init();
+
+/* USER CODE END APPE_Init_2 */
+
+   return;
+}
+
+void Init_Smps(void)
+{
+#if (CFG_USE_SMPS != 0)
+  /**
+   *  Configure and enable SMPS
+   *
+   *  The SMPS configuration is not yet supported by CubeMx
+   *  when SMPS output voltage is set to 1.4V, the RF output power is limited to 3.7dBm
+   *  the SMPS output voltage shall be increased for higher RF output power
+   */
+  LL_PWR_SMPS_SetStartupCurrent(LL_PWR_SMPS_STARTUP_CURRENT_80MA);
+  LL_PWR_SMPS_SetOutputVoltageLevel(LL_PWR_SMPS_OUTPUT_VOLTAGE_1V40);
+  LL_PWR_SMPS_Enable();
+#endif /* CFG_USE_SMPS != 0 */
+
+  return;
+}
+
+void Init_Exti(void)
+{
+  /* Enable IPCC(36), HSEM(38) wakeup interrupts on CPU1 */
+  LL_EXTI_EnableIT_32_63(LL_EXTI_LINE_36 | LL_EXTI_LINE_38);
+
+  return;
+}
+
+/* USER CODE BEGIN FD */
+
+/* USER CODE END FD */
+
+/*************************************************************
+ *
+ * LOCAL FUNCTIONS
+ *
+ *************************************************************/
+static void Init_Debug(void)
+{
+#if (CFG_DEBUGGER_SUPPORTED == 1)
+  /**
+   * Keep debugger enabled while in any low power mode
+   */
+  HAL_DBGMCU_EnableDBGSleepMode();
+
+  /***************** ENABLE DEBUGGER *************************************/
+  LL_EXTI_EnableIT_32_63(LL_EXTI_LINE_48);
+  LL_C2_EXTI_EnableIT_32_63(LL_EXTI_LINE_48);
+
+#else
+
+  GPIO_InitTypeDef gpio_config = {0};
+
+  gpio_config.Pull = GPIO_NOPULL;
+  gpio_config.Mode = GPIO_MODE_ANALOG;
+
+  gpio_config.Pin = GPIO_PIN_15 | GPIO_PIN_14 | GPIO_PIN_13;
+  __HAL_RCC_GPIOA_CLK_ENABLE();
+  HAL_GPIO_Init(GPIOA, &gpio_config);
+  __HAL_RCC_GPIOA_CLK_DISABLE();
+
+  gpio_config.Pin = GPIO_PIN_4 | GPIO_PIN_3;
+  __HAL_RCC_GPIOB_CLK_ENABLE();
+  HAL_GPIO_Init(GPIOB, &gpio_config);
+  __HAL_RCC_GPIOB_CLK_DISABLE();
+
+  HAL_DBGMCU_DisableDBGSleepMode();
+  HAL_DBGMCU_DisableDBGStopMode();
+  HAL_DBGMCU_DisableDBGStandbyMode();
+
+#endif /* (CFG_DEBUGGER_SUPPORTED == 1) */
+
+#if (CFG_DEBUG_TRACE != 0)
+  DbgTraceInit();
+#endif /* CFG_DEBUG_TRACE != 0 */
+
+  return;
+}
+static void Reset_Device(void)
+{
+#if (CFG_HW_RESET_BY_FW == 1)
+  Reset_BackupDomain();
+
+  Reset_IPCC();
+#endif /* CFG_HW_RESET_BY_FW == 1 */
+
+  return;
+}
+
+#if (CFG_HW_RESET_BY_FW == 1)
+static void Reset_BackupDomain(void)
+{
+  if ((LL_RCC_IsActiveFlag_PINRST() != FALSE) && (LL_RCC_IsActiveFlag_SFTRST() == FALSE))
+  {
+    HAL_PWR_EnableBkUpAccess(); /**< Enable access to the RTC registers */
+
+    /**
+     *  Write twice the value to flush the APB-AHB bridge
+     *  This bit shall be written in the register before writing the next one
+     */
+    HAL_PWR_EnableBkUpAccess();
+
+    __HAL_RCC_BACKUPRESET_FORCE();
+    __HAL_RCC_BACKUPRESET_RELEASE();
+  }
+
+  return;
+}
+
+static void Reset_IPCC(void)
+{
+  LL_AHB3_GRP1_EnableClock(LL_AHB3_GRP1_PERIPH_IPCC);
+
+  LL_C1_IPCC_ClearFlag_CHx(
+      IPCC,
+      LL_IPCC_CHANNEL_1 | LL_IPCC_CHANNEL_2 | LL_IPCC_CHANNEL_3 | LL_IPCC_CHANNEL_4
+      | LL_IPCC_CHANNEL_5 | LL_IPCC_CHANNEL_6);
+
+  LL_C2_IPCC_ClearFlag_CHx(
+      IPCC,
+      LL_IPCC_CHANNEL_1 | LL_IPCC_CHANNEL_2 | LL_IPCC_CHANNEL_3 | LL_IPCC_CHANNEL_4
+      | LL_IPCC_CHANNEL_5 | LL_IPCC_CHANNEL_6);
+
+  LL_C1_IPCC_DisableTransmitChannel(
+      IPCC,
+      LL_IPCC_CHANNEL_1 | LL_IPCC_CHANNEL_2 | LL_IPCC_CHANNEL_3 | LL_IPCC_CHANNEL_4
+      | LL_IPCC_CHANNEL_5 | LL_IPCC_CHANNEL_6);
+
+  LL_C2_IPCC_DisableTransmitChannel(
+      IPCC,
+      LL_IPCC_CHANNEL_1 | LL_IPCC_CHANNEL_2 | LL_IPCC_CHANNEL_3 | LL_IPCC_CHANNEL_4
+      | LL_IPCC_CHANNEL_5 | LL_IPCC_CHANNEL_6);
+
+  LL_C1_IPCC_DisableReceiveChannel(
+      IPCC,
+      LL_IPCC_CHANNEL_1 | LL_IPCC_CHANNEL_2 | LL_IPCC_CHANNEL_3 | LL_IPCC_CHANNEL_4
+      | LL_IPCC_CHANNEL_5 | LL_IPCC_CHANNEL_6);
+
+  LL_C2_IPCC_DisableReceiveChannel(
+      IPCC,
+      LL_IPCC_CHANNEL_1 | LL_IPCC_CHANNEL_2 | LL_IPCC_CHANNEL_3 | LL_IPCC_CHANNEL_4
+      | LL_IPCC_CHANNEL_5 | LL_IPCC_CHANNEL_6);
+
+  return;
+}
+#endif /* CFG_HW_RESET_BY_FW == 1 */
+
+static void Config_HSE(void)
+{
+    OTP_ID0_t * p_otp;
+
+  /**
+   * Read HSE_Tuning from OTP
+   */
+  p_otp = (OTP_ID0_t *) OTP_Read(0);
+  if (p_otp)
+  {
+    LL_RCC_HSE_SetCapacitorTuning(p_otp->hse_tuning);
+  }
+
+  return;
+}
+
+static void System_Init(void)
+{
+  Init_Smps();
+
+  Init_Exti();
+
+  Init_Rtc();
+
+  return;
+}
+
+static void Init_Rtc(void)
+{
+  /* Disable RTC registers write protection */
+  LL_RTC_DisableWriteProtection(RTC);
+
+  LL_RTC_WAKEUP_SetClock(RTC, CFG_RTC_WUCKSEL_DIVIDER);
+
+  /* Enable RTC registers write protection */
+  LL_RTC_EnableWriteProtection(RTC);
+
+  return;
+}
+
+/**
+ * @brief  Configure the system for power optimization
+ *
+ * @note  This API configures the system to be ready for low power mode
+ *
+ * @param  None
+ * @retval None
+ */
+static void SystemPower_Config(void)
+{
+  /* Before going to stop or standby modes, do the settings so that system clock and IP80215.4 clock start on HSI automatically */
+  LL_RCC_HSI_EnableAutoFromStop();
+
+  /**
+   * Select HSI as system clock source after Wake Up from Stop mode
+   */
+  LL_RCC_SetClkAfterWakeFromStop(LL_RCC_STOP_WAKEUPCLOCK_HSI);
+
+  /* Initialize low power manager */
+  UTIL_LPM_Init();
+  /* Initialize the CPU2 reset value before starting CPU2 with C2BOOT */
+  LL_C2_PWR_SetPowerMode(LL_PWR_MODE_SHUTDOWN);
+
+  /* Disable Stop & Off Modes until Initialisation is complete */
+  UTIL_LPM_SetOffMode(1 << CFG_LPM_APP, UTIL_LPM_DISABLE);
+  UTIL_LPM_SetStopMode(1 << CFG_LPM_APP, UTIL_LPM_DISABLE);
+
+#if (CFG_USB_INTERFACE_ENABLE != 0)
+  /**
+   *  Enable USB power
+   */
+  HAL_PWREx_EnableVddUSB();
+#endif /* CFG_USB_INTERFACE_ENABLE != 0 */
+
+  return;
+}
+
+static void appe_Tl_Init(void)
+{
+  TL_MM_Config_t tl_mm_config;
+  SHCI_TL_HciInitConf_t SHci_Tl_Init_Conf;
+
+  /**< Reference table initialization */
+  TL_Init();
+
+  /**< System channel initialization */
+  UTIL_SEQ_RegTask(1<< CFG_TASK_SYSTEM_HCI_ASYNCH_EVT, UTIL_SEQ_RFU, shci_user_evt_proc);
+  SHci_Tl_Init_Conf.p_cmdbuffer = (uint8_t*)&SystemCmdBuffer;
+  SHci_Tl_Init_Conf.StatusNotCallBack = APPE_SysStatusNot;
+  shci_init(APPE_SysUserEvtRx, (void*) &SHci_Tl_Init_Conf);
+
+  /**< Memory Manager channel initialization */
+  memset(&tl_mm_config, 0, sizeof(TL_MM_Config_t));
+  tl_mm_config.p_BleSpareEvtBuffer = 0;
+  tl_mm_config.p_SystemSpareEvtBuffer = SystemSpareEvtBuffer;
+  tl_mm_config.p_AsynchEvtPool = EvtPool;
+  tl_mm_config.AsynchEvtPoolSize = POOL_SIZE;
+  TL_MM_Init(&tl_mm_config);
+
+  TL_Enable();
+
+  return;
+}
+
+static void APPE_SysStatusNot(SHCI_TL_CmdStatus_t status)
+{
+  UNUSED(status);
+  return;
+}
+
+/**
+ * The type of the payload for a system user event is tSHCI_UserEvtRxParam
+ * When the system event is both :
+ *    - a ready event (subevtcode = SHCI_SUB_EVT_CODE_READY)
+ *    - reported by the FUS (sysevt_ready_rsp == FUS_FW_RUNNING)
+ * The buffer shall not be released
+ * (eg ((tSHCI_UserEvtRxParam*)pPayload)->status shall be set to SHCI_TL_UserEventFlow_Disable)
+ * When the status is not filled, the buffer is released by default
+ */
+static void APPE_SysUserEvtRx(void * pPayload)
+{
+  TL_AsynchEvt_t *p_sys_event;
+  p_sys_event = (TL_AsynchEvt_t*)(((tSHCI_UserEvtRxParam*)pPayload)->pckt->evtserial.evt.payload);
+
+  switch(p_sys_event->subevtcode)
+  {
+     case SHCI_SUB_EVT_CODE_READY:
+         APPE_SysEvtReadyProcessing();
+         break;
+     case SHCI_SUB_EVT_ERROR_NOTIF:
+         APPE_SysEvtError((SCHI_SystemErrCode_t) (p_sys_event->payload[0]));
+         break;
+     default:
+         break;
+  }
+  return;
+}
+
+/**
+ * @brief Notify a system error coming from the M0 firmware
+ * @param  ErrorCode  : errorCode detected by the M0 firmware
+ *
+ * @retval None
+ */
+static void APPE_SysEvtError(SCHI_SystemErrCode_t ErrorCode)
+{
+  switch(ErrorCode)
+  {
+  case ERR_ZIGBEE_UNKNOWN_CMD:
+       APP_DBG("** ERR_ZIGBEE : UNKNOWN_CMD \n");
+       break;
+  default:
+       APP_DBG("** ERR_ZIGBEE : ErroCode=%d \n",ErrorCode);
+       break;
+  }
+  return;
+}
+
+static void APPE_SysEvtReadyProcessing(void)
+{
+  /* Traces channel initialization */
+  TL_TRACES_Init();
+
+  APP_ZIGBEE_Init();
+  return;
+}
+
+/* USER CODE BEGIN FD_LOCAL_FUNCTIONS */
+static void Led_Init( void )
+{
+#if (CFG_LED_SUPPORTED == 1U)
+  /* Leds Initialization */
+  BSP_LED_Init(LED_BLUE);
+  BSP_LED_Init(LED_GREEN);
+  BSP_LED_Init(LED_RED);
+#endif /* (CFG_LED_SUPPORTED == 1U) */
+
+  return;
+}
+
+static void Button_Init( void )
+{
+#if (CFG_BUTTON_SUPPORTED == 1U)
+  /* Button Initialization */
+  BSP_PB_Init(BUTTON_SW1, BUTTON_MODE_EXTI);
+  BSP_PB_Init(BUTTON_SW2, BUTTON_MODE_EXTI);
+  BSP_PB_Init(BUTTON_SW3, BUTTON_MODE_EXTI);
+#endif /* (CFG_BUTTON_SUPPORTED == 1U) */
+
+  return;
+}
+
+/* USER CODE END FD_LOCAL_FUNCTIONS */
+
+/*************************************************************
+ *
+ * WRAP FUNCTIONS
+ *
+ *************************************************************/
+void HAL_Delay(uint32_t Delay)
+{
+  uint32_t tickstart = HAL_GetTick();
+  uint32_t wait = Delay;
+
+  /* Add a freq to guarantee minimum wait */
+  if (wait < HAL_MAX_DELAY)
+  {
+    wait += HAL_GetTickFreq();
+  }
+
+  while ((HAL_GetTick() - tickstart) < wait)
+  {
+    /************************************************************************************
+     * ENTER SLEEP MODE
+     ***********************************************************************************/
+    LL_LPM_EnableSleep(); /**< Clear SLEEPDEEP bit of Cortex System Control Register */
+
+    /**
+     * This option is used to ensure that store operations are completed
+     */
+  #if defined (__CC_ARM) || defined (__ARMCC_VERSION)
+    __force_stores();
+  #endif /*__ARMCC_VERSION */
+
+    __WFI();
+  }
+}
+
+void MX_APPE_Process(void)
+{
+  /* USER CODE BEGIN MX_APPE_Process_1 */
+
+  /* USER CODE END MX_APPE_Process_1 */
+  UTIL_SEQ_Run(UTIL_SEQ_DEFAULT);
+  /* USER CODE BEGIN MX_APPE_Process_2 */
+  ZigbeeApp_Process();
+
+  /* USER CODE END MX_APPE_Process_2 */
+}
+
+void UTIL_SEQ_Idle(void)
+{
+#if (CFG_LPM_SUPPORTED == 1)
+  UTIL_LPM_EnterLowPower();
+#endif /* CFG_LPM_SUPPORTED == 1 */
+  return;
+}
+
+/**
+  * @brief  This function is called by the scheduler each time an event
+  *         is pending.
+  *
+  * @param  evt_waited_bm : Event pending.
+  * @retval None
+  */
+void UTIL_SEQ_EvtIdle(UTIL_SEQ_bm_t task_id_bm, UTIL_SEQ_bm_t evt_waited_bm)
+{
+	/* Check the notification condition */
+	if (g_ot_notification_allowed) {
+		UTIL_SEQ_Run(1U << CFG_TASK_NOTIFY_FROM_M0_TO_M4);
+	}	
+  switch(evt_waited_bm)
+  {
+  case EVENT_ACK_FROM_M0_EVT:
+    /**
+     * Run only the task CFG_TASK_REQUEST_FROM_M0_TO_M4 to process
+     * direct requests from the M0 (e.g. ZbMalloc), but no stack notifications
+     * until we're done the request to the M0.
+     */
+    UTIL_SEQ_Run((1U << CFG_TASK_REQUEST_FROM_M0_TO_M4));
+    break;
+  case EVENT_SYNCHRO_BYPASS_IDLE:
+    UTIL_SEQ_SetEvt(EVENT_SYNCHRO_BYPASS_IDLE);
+    /* Process notifications and requests from the M0 */
+    UTIL_SEQ_Run((1U << CFG_TASK_NOTIFY_FROM_M0_TO_M4) | (1U << CFG_TASK_REQUEST_FROM_M0_TO_M4));
+    break;
+  default :
+    /* default case */
+    UTIL_SEQ_Run(UTIL_SEQ_DEFAULT);
+    break;
+  }
+}
+
+void shci_notify_asynch_evt(void* pdata)
+{
+  UNUSED(pdata);
+  UTIL_SEQ_SetTask(1U << CFG_TASK_SYSTEM_HCI_ASYNCH_EVT, CFG_SCH_PRIO_0);
+  return;
+}
+
+void shci_cmd_resp_release(uint32_t flag)
+{
+  UNUSED(flag);
+  UTIL_SEQ_SetEvt(1U << CFG_EVT_SYSTEM_HCI_CMD_EVT_RESP);
+  return;
+}
+
+void shci_cmd_resp_wait(uint32_t timeout)
+{
+  UNUSED(timeout);
+  UTIL_SEQ_WaitEvt(1U << CFG_EVT_SYSTEM_HCI_CMD_EVT_RESP);
+  return;
+}
+
+/* Received trace buffer from M0 */
+void TL_TRACES_EvtReceived(TL_EvtPacket_t * hcievt)
+{
+#if (CFG_DEBUG_TRACE != 0)
+  /* Call write/print function using DMA from dbg_trace */
+  /* - Cast to TL_AsynchEvt_t* to get "real" payload (without Sub Evt code 2bytes),
+     - (-2) to size to remove Sub Evt Code */
+  DbgTraceWrite(1U, (const unsigned char *) ((TL_AsynchEvt_t *)(hcievt->evtserial.evt.payload))->payload, hcievt->evtserial.evt.plen - 2U);
+#endif /* CFG_DEBUG_TRACE != 0 */
+  /* Release buffer */
+  TL_MM_EvtDone(hcievt);
+}
+/**
+  * @brief  Initialisation of the trace mechanism
+  * @param  None
+  * @retval None
+  */
+#if (CFG_DEBUG_TRACE != 0)
+void DbgOutputInit(void)
+{
+#ifdef CFG_DEBUG_TRACE_UART
+  MX_USART1_UART_Init();
+  return;
+#endif /* CFG_DEBUG_TRACE_UART */
+}
+
+/**
+  * @brief  Management of the traces
+  * @param  p_data : data
+  * @param  size : size
+  * @param  call-back :
+  * @retval None
+  */
+void DbgOutputTraces(uint8_t *p_data, uint16_t size, void (*cb)(void))
+{
+  HW_UART_Transmit_DMA(CFG_DEBUG_TRACE_UART, p_data, size, cb);
+
+  return;
+}
+#endif /* CFG_DEBUG_TRACE != 0 */
+
+/* USER CODE BEGIN FD_WRAP_FUNCTIONS */
+/**
+  * @brief This function manage the Push button action
+  * @param  GPIO_Pin : GPIO pin which has been activated
+  * @retval None
+  */
+void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin)
+{
+  switch (GPIO_Pin) 
+  {
+    case BUTTON_SW1_PIN:
+      break;
+
+    case BUTTON_SW2_PIN:
+      break;
+
+    case BUTTON_SW3_PIN:
+      break;
+
+    default:
+      break;
+  }
+}
+
+static void RxUART_Init(void)
+{
+  HW_UART_Receive_IT(CFG_DEBUG_TRACE_UART, aRxBuffer, 1U, RxCpltCallback);
+}
+
+static void RxCpltCallback(void)
+{
+  /* Filling buffer and wait for '\r' char */
+  if (indexReceiveChar < C_SIZE_CMD_STRING)
+  {
+    if (aRxBuffer[0] == '\r')
+    {
+      APP_DBG("received %s", CommandString);
+
+      UartCmdExecute();
+
+      /* Clear receive buffer and character counter*/
+      indexReceiveChar = 0;
+      memset(CommandString, 0, C_SIZE_CMD_STRING);
+    }
+    else
+    {
+      CommandString[indexReceiveChar++] = aRxBuffer[0];
+    }
+  }
+
+  /* Once a character has been sent, put back the device in reception mode */
+  HW_UART_Receive_IT(CFG_DEBUG_TRACE_UART, aRxBuffer, 1U, RxCpltCallback);
+}
+
+static void UartCmdExecute(void)
+{
+  /* Parse received CommandString */
+  if(strcmp((char const*)CommandString, "SW1") == 0)
+  {
+    APP_DBG("SW1 OK");
+    exti_handle.Line = EXTI_LINE_4;
+    HAL_EXTI_GenerateSWI(&exti_handle);
+  }
+  else if (strcmp((char const*)CommandString, "SW2") == 0)
+  {
+    APP_DBG("SW2 OK");
+    exti_handle.Line = EXTI_LINE_0;
+    HAL_EXTI_GenerateSWI(&exti_handle);
+  }
+  else if (strcmp((char const*)CommandString, "SW3") == 0)
+  {
+    APP_DBG("SW3 OK");
+    exti_handle.Line = EXTI_LINE_1;
+    HAL_EXTI_GenerateSWI(&exti_handle);
+  }
+  else if (strcmp((char const*)CommandString, "RST") == 0)
+  {
+    APP_DBG("RESET CMD RECEIVED");
+    HAL_NVIC_SystemReset();
+  }  
+  else
+  {
+    APP_DBG("NOT RECOGNIZED COMMAND : %s", CommandString);
+  }
+}
+/* USER CODE END FD_WRAP_FUNCTIONS */

Core/Src/hw_timerserver.c

@@ -0,0 +1,888 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    hw_timerserver.c
+  * @author  MCD Application Team
+  * @brief   Hardware timerserver source file for STM32WPAN Middleware.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2021 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "app_common.h"
+#include "hw_conf.h"
+
+/* Private typedef -----------------------------------------------------------*/
+typedef enum
+{
+  TimerID_Free,
+  TimerID_Created,
+  TimerID_Running
+}TimerIDStatus_t;
+
+typedef enum
+{
+  SSR_Read_Requested,
+  SSR_Read_Not_Requested
+}RequestReadSSR_t;
+
+typedef enum
+{
+  WakeupTimerValue_Overpassed,
+  WakeupTimerValue_LargeEnough
+}WakeupTimerLimitation_Status_t;
+
+typedef struct
+{
+  HW_TS_pTimerCb_t  pTimerCallBack;
+  uint32_t        CounterInit;
+  uint32_t        CountLeft;
+  TimerIDStatus_t     TimerIDStatus;
+  HW_TS_Mode_t   TimerMode;
+  uint32_t        TimerProcessID;
+  uint8_t         PreviousID;
+  uint8_t         NextID;
+}TimerContext_t;
+
+/* Private defines -----------------------------------------------------------*/
+#define SSR_FORBIDDEN_VALUE   0xFFFFFFFF
+#define TIMER_LIST_EMPTY      0xFFFF
+
+/* Private macros ------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+
+/**
+ * START of Section TIMERSERVER_CONTEXT
+ */
+
+static volatile TimerContext_t aTimerContext[CFG_HW_TS_MAX_NBR_CONCURRENT_TIMER];
+static volatile uint8_t CurrentRunningTimerID;
+static volatile uint8_t PreviousRunningTimerID;
+static volatile uint32_t SSRValueOnLastSetup;
+static volatile WakeupTimerLimitation_Status_t  WakeupTimerLimitation;
+
+/**
+ * END of Section TIMERSERVER_CONTEXT
+ */
+
+static uint8_t  WakeupTimerDivider;
+static uint8_t  AsynchPrescalerUserConfig;
+static uint16_t SynchPrescalerUserConfig;
+static volatile uint16_t MaxWakeupTimerSetup;
+
+/* Global variables ----------------------------------------------------------*/
+extern RTC_HandleTypeDef hrtc;
+
+/* Private function prototypes -----------------------------------------------*/
+static void RestartWakeupCounter(uint16_t Value);
+static uint16_t ReturnTimeElapsed(void);
+static void RescheduleTimerList(void);
+static void UnlinkTimer(uint8_t TimerID, RequestReadSSR_t RequestReadSSR);
+static void LinkTimerBefore(uint8_t TimerID, uint8_t RefTimerID);
+static void LinkTimerAfter(uint8_t TimerID, uint8_t RefTimerID);
+static uint16_t linkTimer(uint8_t TimerID);
+static uint32_t ReadRtcSsrValue(void);
+
+__weak void HW_TS_RTC_CountUpdated_AppNot(void);
+
+/* Functions Definition ------------------------------------------------------*/
+
+/**
+ * @brief  Read the RTC_SSR value
+ *         As described in the reference manual, the RTC_SSR shall be read twice to ensure
+ *         reliability of the value
+ * @param  None
+ * @retval SSR value read
+ */
+static uint32_t ReadRtcSsrValue(void)
+{
+  uint32_t first_read;
+  uint32_t second_read;
+
+  first_read = (uint32_t)(READ_BIT(RTC->SSR, RTC_SSR_SS));
+
+  second_read = (uint32_t)(READ_BIT(RTC->SSR, RTC_SSR_SS));
+
+  while(first_read != second_read)
+  {
+    first_read = second_read;
+
+    second_read = (uint32_t)(READ_BIT(RTC->SSR, RTC_SSR_SS));
+  }
+
+  return second_read;
+}
+
+/**
+ * @brief  Insert a Timer in the list after the Timer ID specified
+ * @param  TimerID:   The ID of the Timer
+ * @param  RefTimerID: The ID of the Timer to be linked after
+ * @retval None
+ */
+static void LinkTimerAfter(uint8_t TimerID, uint8_t RefTimerID)
+{
+  uint8_t next_id;
+
+  next_id = aTimerContext[RefTimerID].NextID;
+
+  if(next_id != CFG_HW_TS_MAX_NBR_CONCURRENT_TIMER)
+  {
+    aTimerContext[next_id].PreviousID = TimerID;
+  }
+  aTimerContext[TimerID].NextID = next_id;
+  aTimerContext[TimerID].PreviousID = RefTimerID ;
+  aTimerContext[RefTimerID].NextID = TimerID;
+
+  return;
+}
+
+/**
+ * @brief  Insert a Timer in the list before the ID specified
+ * @param  TimerID:   The ID of the Timer
+ * @param  RefTimerID: The ID of the Timer to be linked before
+ * @retval None
+ */
+static void LinkTimerBefore(uint8_t TimerID, uint8_t RefTimerID)
+{
+  uint8_t previous_id;
+
+  if(RefTimerID != CurrentRunningTimerID)
+  {
+    previous_id = aTimerContext[RefTimerID].PreviousID;
+
+    aTimerContext[previous_id].NextID = TimerID;
+    aTimerContext[TimerID].NextID = RefTimerID;
+    aTimerContext[TimerID].PreviousID = previous_id ;
+    aTimerContext[RefTimerID].PreviousID = TimerID;
+  }
+  else
+  {
+    aTimerContext[TimerID].NextID = RefTimerID;
+    aTimerContext[RefTimerID].PreviousID = TimerID;
+  }
+
+  return;
+}
+
+/**
+ * @brief  Insert a Timer in the list
+ * @param  TimerID:   The ID of the Timer
+ * @retval None
+ */
+static uint16_t linkTimer(uint8_t TimerID)
+{
+  uint32_t time_left;
+  uint16_t time_elapsed;
+  uint8_t timer_id_lookup;
+  uint8_t next_id;
+
+  if(CurrentRunningTimerID == CFG_HW_TS_MAX_NBR_CONCURRENT_TIMER)
+  {
+    /**
+     * No timer in the list
+     */
+    PreviousRunningTimerID = CurrentRunningTimerID;
+    CurrentRunningTimerID = TimerID;
+    aTimerContext[TimerID].NextID = CFG_HW_TS_MAX_NBR_CONCURRENT_TIMER;
+
+    SSRValueOnLastSetup = SSR_FORBIDDEN_VALUE;
+    time_elapsed = 0;
+  }
+  else
+  {
+    time_elapsed = ReturnTimeElapsed();
+
+    /**
+     * update count of the timer to be linked
+     */
+    aTimerContext[TimerID].CountLeft += time_elapsed;
+    time_left = aTimerContext[TimerID].CountLeft;
+
+    /**
+     * Search for index where the new timer shall be linked
+     */
+    if(aTimerContext[CurrentRunningTimerID].CountLeft <= time_left)
+    {
+      /**
+       * Search for the ID after the first one
+       */
+      timer_id_lookup = CurrentRunningTimerID;
+      next_id = aTimerContext[timer_id_lookup].NextID;
+      while((next_id != CFG_HW_TS_MAX_NBR_CONCURRENT_TIMER) && (aTimerContext[next_id].CountLeft <= time_left))
+      {
+        timer_id_lookup = aTimerContext[timer_id_lookup].NextID;
+        next_id = aTimerContext[timer_id_lookup].NextID;
+      }
+
+      /**
+       * Link after the ID
+       */
+      LinkTimerAfter(TimerID, timer_id_lookup);
+    }
+    else
+    {
+      /**
+       * Link before the first ID
+       */
+      LinkTimerBefore(TimerID, CurrentRunningTimerID);
+      PreviousRunningTimerID = CurrentRunningTimerID;
+      CurrentRunningTimerID = TimerID;
+    }
+  }
+
+  return time_elapsed;
+}
+
+/**
+ * @brief  Remove a Timer from the list
+ * @param  TimerID:   The ID of the Timer
+ * @param  RequestReadSSR: Request to read the SSR register or not
+ * @retval None
+ */
+static void UnlinkTimer(uint8_t TimerID, RequestReadSSR_t RequestReadSSR)
+{
+  uint8_t previous_id;
+  uint8_t next_id;
+
+  if(TimerID == CurrentRunningTimerID)
+  {
+    PreviousRunningTimerID = CurrentRunningTimerID;
+    CurrentRunningTimerID = aTimerContext[TimerID].NextID;
+  }
+  else
+  {
+    previous_id = aTimerContext[TimerID].PreviousID;
+    next_id = aTimerContext[TimerID].NextID;
+
+    aTimerContext[previous_id].NextID = aTimerContext[TimerID].NextID;
+    if(next_id != CFG_HW_TS_MAX_NBR_CONCURRENT_TIMER)
+    {
+      aTimerContext[next_id].PreviousID = aTimerContext[TimerID].PreviousID;
+    }
+  }
+
+  /**
+   * Timer is out of the list
+   */
+  aTimerContext[TimerID].TimerIDStatus = TimerID_Created;
+
+  if((CurrentRunningTimerID == CFG_HW_TS_MAX_NBR_CONCURRENT_TIMER) && (RequestReadSSR == SSR_Read_Requested))
+  {
+    SSRValueOnLastSetup = SSR_FORBIDDEN_VALUE;
+  }
+
+  return;
+}
+
+/**
+ * @brief  Return the number of ticks counted by the wakeuptimer since it has been started
+ * @note  The API is reading the SSR register to get how many ticks have been counted
+ *        since the time the timer has been started
+ * @param  None
+ * @retval Time expired in Ticks
+ */
+static uint16_t ReturnTimeElapsed(void)
+{
+  uint32_t  return_value;
+  uint32_t  wrap_counter;
+
+  if(SSRValueOnLastSetup != SSR_FORBIDDEN_VALUE)
+  {
+    return_value = ReadRtcSsrValue(); /**< Read SSR register first */
+
+    if (SSRValueOnLastSetup >= return_value)
+    {
+      return_value = SSRValueOnLastSetup - return_value;
+    }
+    else
+    {
+      wrap_counter = SynchPrescalerUserConfig - return_value;
+      return_value = SSRValueOnLastSetup + wrap_counter;
+    }
+
+    /**
+     * At this stage, ReturnValue holds the number of ticks counted by SSR
+     * Need to translate in number of ticks counted by the Wakeuptimer
+     */
+    return_value = return_value*AsynchPrescalerUserConfig;
+    return_value = return_value >> WakeupTimerDivider;
+  }
+  else
+  {
+    return_value = 0;
+  }
+
+  return (uint16_t)return_value;
+}
+
+/**
+ * @brief  Set the wakeup counter
+ * @note  The API is writing the counter value so that the value is decreased by one to cope with the fact
+ *    the interrupt is generated with 1 extra clock cycle (See RefManuel)
+ *    It assumes all condition are met to be allowed to write the wakeup counter
+ * @param  Value: Value to be written in the counter
+ * @retval None
+ */
+static void RestartWakeupCounter(uint16_t Value)
+{
+  /**
+   * The wakeuptimer has been disabled in the calling function to reduce the time to poll the WUTWF
+   * FLAG when the new value will have to be written
+   *  __HAL_RTC_WAKEUPTIMER_DISABLE(&hrtc);
+   */
+
+  if(Value == 0)
+  {
+    SSRValueOnLastSetup = ReadRtcSsrValue();
+
+    /**
+     * Simulate that the Timer expired
+     */
+    HAL_NVIC_SetPendingIRQ(CFG_HW_TS_RTC_WAKEUP_HANDLER_ID);
+  }
+  else
+  {
+    if((Value > 1) ||(WakeupTimerDivider != 1))
+    {
+      Value -= 1;
+    }
+
+    while(__HAL_RTC_WAKEUPTIMER_GET_FLAG(&hrtc, RTC_FLAG_WUTWF) == RESET);
+
+    /**
+     * make sure to clear the flags after checking the WUTWF.
+     * It takes 2 RTCCLK between the time the WUTE bit is disabled and the
+     * time the timer is disabled. The WUTWF bit somehow guarantee the system is stable
+     * Otherwise, when the timer is periodic with 1 Tick, it may generate an extra interrupt in between
+     * due to the autoreload feature
+     */
+    __HAL_RTC_WAKEUPTIMER_CLEAR_FLAG(&hrtc, RTC_FLAG_WUTF);   /**<  Clear flag in RTC module */
+    __HAL_RTC_WAKEUPTIMER_EXTI_CLEAR_FLAG(); /**<  Clear flag in EXTI module */
+    HAL_NVIC_ClearPendingIRQ(CFG_HW_TS_RTC_WAKEUP_HANDLER_ID);   /**<  Clear pending bit in NVIC */
+
+    MODIFY_REG(RTC->WUTR, RTC_WUTR_WUT, Value);
+
+    /**
+     * Update the value here after the WUTWF polling that may take some time
+     */
+    SSRValueOnLastSetup = ReadRtcSsrValue();
+
+    __HAL_RTC_WAKEUPTIMER_ENABLE(&hrtc);    /**<  Enable the Wakeup Timer */
+
+    HW_TS_RTC_CountUpdated_AppNot();
+  }
+
+  return ;
+}
+
+/**
+ * @brief  Reschedule the list of timer
+ * @note  1) Update the count left for each timer in the list
+ *    2) Setup the wakeuptimer
+ * @param  None
+ * @retval None
+ */
+static void RescheduleTimerList(void)
+{
+  uint8_t   localTimerID;
+  uint32_t  timecountleft;
+  uint16_t  wakeup_timer_value;
+  uint16_t  time_elapsed;
+
+  /**
+   * The wakeuptimer is disabled now to reduce the time to poll the WUTWF
+   * FLAG when the new value will have to be written
+   */
+  if((READ_BIT(RTC->CR, RTC_CR_WUTE) == (RTC_CR_WUTE)) == SET)
+  {
+    /**
+     * Wait for the flag to be back to 0 when the wakeup timer is enabled
+     */
+    while(__HAL_RTC_WAKEUPTIMER_GET_FLAG(&hrtc, RTC_FLAG_WUTWF) == SET);
+  }
+  __HAL_RTC_WAKEUPTIMER_DISABLE(&hrtc);   /**<  Disable the Wakeup Timer */
+
+  localTimerID = CurrentRunningTimerID;
+
+  /**
+   * Calculate what will be the value to write in the wakeuptimer
+   */
+  timecountleft = aTimerContext[localTimerID].CountLeft;
+
+  /**
+   * Read how much has been counted
+   */
+  time_elapsed = ReturnTimeElapsed();
+
+  if(timecountleft < time_elapsed )
+  {
+    /**
+     * There is no tick left to count
+     */
+    wakeup_timer_value = 0;
+    WakeupTimerLimitation = WakeupTimerValue_LargeEnough;
+  }
+  else
+  {
+    if(timecountleft > (time_elapsed + MaxWakeupTimerSetup))
+    {
+      /**
+       * The number of tick left is greater than the Wakeuptimer maximum value
+       */
+      wakeup_timer_value = MaxWakeupTimerSetup;
+
+      WakeupTimerLimitation = WakeupTimerValue_Overpassed;
+    }
+    else
+    {
+      wakeup_timer_value = timecountleft - time_elapsed;
+      WakeupTimerLimitation = WakeupTimerValue_LargeEnough;
+    }
+
+  }
+
+  /**
+   * update ticks left to be counted for each timer
+   */
+  while(localTimerID != CFG_HW_TS_MAX_NBR_CONCURRENT_TIMER)
+  {
+    if (aTimerContext[localTimerID].CountLeft < time_elapsed)
+    {
+      aTimerContext[localTimerID].CountLeft = 0;
+    }
+    else
+    {
+      aTimerContext[localTimerID].CountLeft -= time_elapsed;
+    }
+    localTimerID = aTimerContext[localTimerID].NextID;
+  }
+
+  /**
+   * Write next count
+   */
+  RestartWakeupCounter(wakeup_timer_value);
+
+  return ;
+}
+
+/* Public functions ----------------------------------------------------------*/
+
+/**
+ * For all public interface except that may need write access to the RTC, the RTC
+ * shall be unlock at the beginning and locked at the output
+ * In order to ease maintainability, the unlock is done at the top and the lock at then end
+ * in case some new implementation is coming in the future
+ */
+
+void HW_TS_RTC_Wakeup_Handler(void)
+{
+  HW_TS_pTimerCb_t ptimer_callback;
+  uint32_t timer_process_id;
+  uint8_t local_current_running_timer_id;
+#if (CFG_HW_TS_USE_PRIMASK_AS_CRITICAL_SECTION == 1)
+  uint32_t primask_bit;
+#endif
+
+#if (CFG_HW_TS_USE_PRIMASK_AS_CRITICAL_SECTION == 1)
+  primask_bit = __get_PRIMASK();  /**< backup PRIMASK bit */
+  __disable_irq();          /**< Disable all interrupts by setting PRIMASK bit on Cortex*/
+#endif
+
+/* Disable the write protection for RTC registers */
+  __HAL_RTC_WRITEPROTECTION_DISABLE( &hrtc );
+
+  /**
+   * Disable the Wakeup Timer
+   * This may speed up a bit the processing to wait the timer to be disabled
+   * The timer is still counting 2 RTCCLK
+   */
+  __HAL_RTC_WAKEUPTIMER_DISABLE(&hrtc);
+
+  local_current_running_timer_id = CurrentRunningTimerID;
+
+  if(aTimerContext[local_current_running_timer_id].TimerIDStatus == TimerID_Running)
+  {
+    ptimer_callback = aTimerContext[local_current_running_timer_id].pTimerCallBack;
+    timer_process_id = aTimerContext[local_current_running_timer_id].TimerProcessID;
+
+    /**
+     * It should be good to check whether the TimeElapsed is greater or not than the tick left to be counted
+     * However, due to the inaccuracy of the reading of the time elapsed, it may return there is 1 tick
+     * to be left whereas the count is over
+     * A more secure implementation has been done with a flag to state whereas the full count has been written
+     * in the wakeuptimer or not
+     */
+    if(WakeupTimerLimitation != WakeupTimerValue_Overpassed)
+    {
+      if(aTimerContext[local_current_running_timer_id].TimerMode == hw_ts_Repeated)
+      {
+        UnlinkTimer(local_current_running_timer_id, SSR_Read_Not_Requested);
+#if (CFG_HW_TS_USE_PRIMASK_AS_CRITICAL_SECTION == 1)
+        __set_PRIMASK(primask_bit); /**< Restore PRIMASK bit*/
+#endif
+        HW_TS_Start(local_current_running_timer_id, aTimerContext[local_current_running_timer_id].CounterInit);
+
+        /* Disable the write protection for RTC registers */
+        __HAL_RTC_WRITEPROTECTION_DISABLE( &hrtc );
+        }
+      else
+      {
+#if (CFG_HW_TS_USE_PRIMASK_AS_CRITICAL_SECTION == 1)
+        __set_PRIMASK(primask_bit); /**< Restore PRIMASK bit*/
+#endif
+        HW_TS_Stop(local_current_running_timer_id);
+
+        /* Disable the write protection for RTC registers */
+        __HAL_RTC_WRITEPROTECTION_DISABLE( &hrtc );
+        }
+
+      HW_TS_RTC_Int_AppNot(timer_process_id, local_current_running_timer_id, ptimer_callback);
+    }
+    else
+    {
+      RescheduleTimerList();
+#if (CFG_HW_TS_USE_PRIMASK_AS_CRITICAL_SECTION == 1)
+      __set_PRIMASK(primask_bit); /**< Restore PRIMASK bit*/
+#endif
+    }
+  }
+  else
+  {
+    /**
+     * We should never end up in this case
+     * However, if due to any bug in the timer server this is the case, the mistake may not impact the user.
+     * We could just clean the interrupt flag and get out from this unexpected interrupt
+     */
+    while(__HAL_RTC_WAKEUPTIMER_GET_FLAG(&hrtc, RTC_FLAG_WUTWF) == RESET);
+
+    /**
+     * make sure to clear the flags after checking the WUTWF.
+     * It takes 2 RTCCLK between the time the WUTE bit is disabled and the
+     * time the timer is disabled. The WUTWF bit somehow guarantee the system is stable
+     * Otherwise, when the timer is periodic with 1 Tick, it may generate an extra interrupt in between
+     * due to the autoreload feature
+     */
+    __HAL_RTC_WAKEUPTIMER_CLEAR_FLAG(&hrtc, RTC_FLAG_WUTF);   /**<  Clear flag in RTC module */
+    __HAL_RTC_WAKEUPTIMER_EXTI_CLEAR_FLAG(); /**<  Clear flag in EXTI module */
+
+#if (CFG_HW_TS_USE_PRIMASK_AS_CRITICAL_SECTION == 1)
+    __set_PRIMASK(primask_bit); /**< Restore PRIMASK bit*/
+#endif
+  }
+
+  /* Enable the write protection for RTC registers */
+  __HAL_RTC_WRITEPROTECTION_ENABLE( &hrtc );
+
+  return;
+}
+
+void HW_TS_Init(HW_TS_InitMode_t TimerInitMode, RTC_HandleTypeDef *phrtc)
+{
+  uint8_t loop;
+  uint32_t localmaxwakeuptimersetup;
+
+ /* Disable the write protection for RTC registers */
+  __HAL_RTC_WRITEPROTECTION_DISABLE( &hrtc );
+
+  SET_BIT(RTC->CR, RTC_CR_BYPSHAD);
+
+  /**
+   * Readout the user config
+   */
+  WakeupTimerDivider = (4 - ((uint32_t)(READ_BIT(RTC->CR, RTC_CR_WUCKSEL))));
+
+  AsynchPrescalerUserConfig = (uint8_t)(READ_BIT(RTC->PRER, RTC_PRER_PREDIV_A) >> (uint32_t)POSITION_VAL(RTC_PRER_PREDIV_A)) + 1;
+
+  SynchPrescalerUserConfig = (uint16_t)(READ_BIT(RTC->PRER, RTC_PRER_PREDIV_S)) + 1;
+
+  /**
+   *  Margin is taken to avoid wrong calculation when the wrap around is there and some
+   *  application interrupts may have delayed the reading
+   */
+  localmaxwakeuptimersetup = ((((SynchPrescalerUserConfig - 1)*AsynchPrescalerUserConfig) - CFG_HW_TS_RTC_HANDLER_MAX_DELAY) >> WakeupTimerDivider);
+
+  if(localmaxwakeuptimersetup >= 0xFFFF)
+  {
+    MaxWakeupTimerSetup = 0xFFFF;
+  }
+  else
+  {
+    MaxWakeupTimerSetup = (uint16_t)localmaxwakeuptimersetup;
+  }
+
+  /**
+   * Configure EXTI module
+   */
+  LL_EXTI_EnableRisingTrig_0_31(RTC_EXTI_LINE_WAKEUPTIMER_EVENT);
+  LL_EXTI_EnableIT_0_31(RTC_EXTI_LINE_WAKEUPTIMER_EVENT);
+
+  if(TimerInitMode == hw_ts_InitMode_Full)
+  {
+    WakeupTimerLimitation = WakeupTimerValue_LargeEnough;
+    SSRValueOnLastSetup = SSR_FORBIDDEN_VALUE;
+
+    /**
+     * Initialize the timer server
+     */
+    for(loop = 0; loop < CFG_HW_TS_MAX_NBR_CONCURRENT_TIMER; loop++)
+    {
+      aTimerContext[loop].TimerIDStatus = TimerID_Free;
+    }
+
+    CurrentRunningTimerID = CFG_HW_TS_MAX_NBR_CONCURRENT_TIMER;   /**<  Set ID to non valid value */
+
+    __HAL_RTC_WAKEUPTIMER_DISABLE(&hrtc);                       /**<  Disable the Wakeup Timer */
+    __HAL_RTC_WAKEUPTIMER_CLEAR_FLAG(&hrtc, RTC_FLAG_WUTF);     /**<  Clear flag in RTC module */
+    __HAL_RTC_WAKEUPTIMER_EXTI_CLEAR_FLAG(); /**<  Clear flag in EXTI module  */
+    HAL_NVIC_ClearPendingIRQ(CFG_HW_TS_RTC_WAKEUP_HANDLER_ID);       /**<  Clear pending bit in NVIC  */
+    __HAL_RTC_WAKEUPTIMER_ENABLE_IT(&hrtc, RTC_IT_WUT);         /**<  Enable interrupt in RTC module  */
+  }
+  else
+  {
+    if(__HAL_RTC_WAKEUPTIMER_GET_FLAG(&hrtc, RTC_FLAG_WUTF) != RESET)
+    {
+      /**
+       * Simulate that the Timer expired
+       */
+      HAL_NVIC_SetPendingIRQ(CFG_HW_TS_RTC_WAKEUP_HANDLER_ID);
+    }
+  }
+
+  /* Enable the write protection for RTC registers */
+  __HAL_RTC_WRITEPROTECTION_ENABLE( &hrtc );
+
+  HAL_NVIC_SetPriority(CFG_HW_TS_RTC_WAKEUP_HANDLER_ID, CFG_HW_TS_NVIC_RTC_WAKEUP_IT_PREEMPTPRIO, CFG_HW_TS_NVIC_RTC_WAKEUP_IT_SUBPRIO);   /**<  Set NVIC priority */
+  HAL_NVIC_EnableIRQ(CFG_HW_TS_RTC_WAKEUP_HANDLER_ID); /**<  Enable NVIC */
+
+  return;
+}
+
+HW_TS_ReturnStatus_t HW_TS_Create(uint32_t TimerProcessID, uint8_t *pTimerId, HW_TS_Mode_t TimerMode, HW_TS_pTimerCb_t pftimeout_handler)
+{
+  HW_TS_ReturnStatus_t localreturnstatus;
+  uint8_t loop = 0;
+#if (CFG_HW_TS_USE_PRIMASK_AS_CRITICAL_SECTION == 1)
+  uint32_t primask_bit;
+#endif
+
+#if (CFG_HW_TS_USE_PRIMASK_AS_CRITICAL_SECTION == 1)
+  primask_bit = __get_PRIMASK();  /**< backup PRIMASK bit */
+  __disable_irq();          /**< Disable all interrupts by setting PRIMASK bit on Cortex*/
+#endif
+
+  while((loop < CFG_HW_TS_MAX_NBR_CONCURRENT_TIMER) && (aTimerContext[loop].TimerIDStatus != TimerID_Free))
+  {
+    loop++;
+  }
+
+  if(loop != CFG_HW_TS_MAX_NBR_CONCURRENT_TIMER)
+  {
+    aTimerContext[loop].TimerIDStatus = TimerID_Created;
+
+#if (CFG_HW_TS_USE_PRIMASK_AS_CRITICAL_SECTION == 1)
+    __set_PRIMASK(primask_bit); /**< Restore PRIMASK bit*/
+#endif
+
+    aTimerContext[loop].TimerProcessID = TimerProcessID;
+    aTimerContext[loop].TimerMode = TimerMode;
+    aTimerContext[loop].pTimerCallBack = pftimeout_handler;
+    *pTimerId = loop;
+
+    localreturnstatus = hw_ts_Successful;
+  }
+  else
+  {
+#if (CFG_HW_TS_USE_PRIMASK_AS_CRITICAL_SECTION == 1)
+    __set_PRIMASK(primask_bit); /**< Restore PRIMASK bit*/
+#endif
+
+    localreturnstatus = hw_ts_Failed;
+  }
+
+  return(localreturnstatus);
+}
+
+void HW_TS_Delete(uint8_t timer_id)
+{
+  HW_TS_Stop(timer_id);
+
+  aTimerContext[timer_id].TimerIDStatus = TimerID_Free; /**<  release ID */
+
+  return;
+}
+
+void HW_TS_Stop(uint8_t timer_id)
+{
+  uint8_t localcurrentrunningtimerid;
+
+#if (CFG_HW_TS_USE_PRIMASK_AS_CRITICAL_SECTION == 1)
+  uint32_t primask_bit;
+#endif
+
+#if (CFG_HW_TS_USE_PRIMASK_AS_CRITICAL_SECTION == 1)
+  primask_bit = __get_PRIMASK();  /**< backup PRIMASK bit */
+  __disable_irq();          /**< Disable all interrupts by setting PRIMASK bit on Cortex*/
+#endif
+
+  HAL_NVIC_DisableIRQ(CFG_HW_TS_RTC_WAKEUP_HANDLER_ID);    /**<  Disable NVIC */
+
+  /* Disable the write protection for RTC registers */
+  __HAL_RTC_WRITEPROTECTION_DISABLE( &hrtc );
+
+  if(aTimerContext[timer_id].TimerIDStatus == TimerID_Running)
+  {
+    UnlinkTimer(timer_id, SSR_Read_Requested);
+    localcurrentrunningtimerid = CurrentRunningTimerID;
+
+    if(localcurrentrunningtimerid == CFG_HW_TS_MAX_NBR_CONCURRENT_TIMER)
+    {
+      /**
+       * List is empty
+       */
+
+      /**
+       * Disable the timer
+       */
+      if((READ_BIT(RTC->CR, RTC_CR_WUTE) == (RTC_CR_WUTE)) == SET)
+      {
+        /**
+         * Wait for the flag to be back to 0 when the wakeup timer is enabled
+         */
+        while(__HAL_RTC_WAKEUPTIMER_GET_FLAG(&hrtc, RTC_FLAG_WUTWF) == SET);
+      }
+      __HAL_RTC_WAKEUPTIMER_DISABLE(&hrtc);   /**<  Disable the Wakeup Timer */
+
+      while(__HAL_RTC_WAKEUPTIMER_GET_FLAG(&hrtc, RTC_FLAG_WUTWF) == RESET);
+
+      /**
+       * make sure to clear the flags after checking the WUTWF.
+       * It takes 2 RTCCLK between the time the WUTE bit is disabled and the
+       * time the timer is disabled. The WUTWF bit somehow guarantee the system is stable
+       * Otherwise, when the timer is periodic with 1 Tick, it may generate an extra interrupt in between
+       * due to the autoreload feature
+       */
+      __HAL_RTC_WAKEUPTIMER_CLEAR_FLAG(&hrtc, RTC_FLAG_WUTF);   /**<  Clear flag in RTC module */
+      __HAL_RTC_WAKEUPTIMER_EXTI_CLEAR_FLAG(); /**<  Clear flag in EXTI module */
+      HAL_NVIC_ClearPendingIRQ(CFG_HW_TS_RTC_WAKEUP_HANDLER_ID);   /**<  Clear pending bit in NVIC */
+    }
+    else if(PreviousRunningTimerID != localcurrentrunningtimerid)
+    {
+      RescheduleTimerList();
+    }
+  }
+
+  /* Enable the write protection for RTC registers */
+  __HAL_RTC_WRITEPROTECTION_ENABLE( &hrtc );
+
+  HAL_NVIC_EnableIRQ(CFG_HW_TS_RTC_WAKEUP_HANDLER_ID); /**<  Enable NVIC */
+
+#if (CFG_HW_TS_USE_PRIMASK_AS_CRITICAL_SECTION == 1)
+  __set_PRIMASK(primask_bit); /**< Restore PRIMASK bit*/
+#endif
+
+  return;
+}
+
+void HW_TS_Start(uint8_t timer_id, uint32_t timeout_ticks)
+{
+  uint16_t time_elapsed;
+  uint8_t localcurrentrunningtimerid;
+
+#if (CFG_HW_TS_USE_PRIMASK_AS_CRITICAL_SECTION == 1)
+  uint32_t primask_bit;
+#endif
+
+  if(aTimerContext[timer_id].TimerIDStatus == TimerID_Running)
+  {
+    HW_TS_Stop( timer_id );
+  }
+
+#if (CFG_HW_TS_USE_PRIMASK_AS_CRITICAL_SECTION == 1)
+  primask_bit = __get_PRIMASK();  /**< backup PRIMASK bit */
+  __disable_irq();          /**< Disable all interrupts by setting PRIMASK bit on Cortex*/
+#endif
+
+  HAL_NVIC_DisableIRQ(CFG_HW_TS_RTC_WAKEUP_HANDLER_ID);    /**<  Disable NVIC */
+
+  /* Disable the write protection for RTC registers */
+  __HAL_RTC_WRITEPROTECTION_DISABLE( &hrtc );
+
+  aTimerContext[timer_id].TimerIDStatus = TimerID_Running;
+
+  aTimerContext[timer_id].CountLeft = timeout_ticks;
+  aTimerContext[timer_id].CounterInit = timeout_ticks;
+
+  time_elapsed =  linkTimer(timer_id);
+
+  localcurrentrunningtimerid = CurrentRunningTimerID;
+
+  if(PreviousRunningTimerID != localcurrentrunningtimerid)
+  {
+    RescheduleTimerList();
+  }
+  else
+  {
+    aTimerContext[timer_id].CountLeft -= time_elapsed;
+  }
+
+  /* Enable the write protection for RTC registers */
+  __HAL_RTC_WRITEPROTECTION_ENABLE( &hrtc );
+
+  HAL_NVIC_EnableIRQ(CFG_HW_TS_RTC_WAKEUP_HANDLER_ID); /**<  Enable NVIC */
+
+#if (CFG_HW_TS_USE_PRIMASK_AS_CRITICAL_SECTION == 1)
+  __set_PRIMASK(primask_bit); /**< Restore PRIMASK bit*/
+#endif
+
+  return;
+}
+
+uint16_t HW_TS_RTC_ReadLeftTicksToCount(void)
+{
+  uint32_t primask_bit;
+  uint16_t return_value, auro_reload_value, elapsed_time_value;
+
+  primask_bit = __get_PRIMASK();  /**< backup PRIMASK bit */
+  __disable_irq();                /**< Disable all interrupts by setting PRIMASK bit on Cortex*/
+
+  if((READ_BIT(RTC->CR, RTC_CR_WUTE) == (RTC_CR_WUTE)) == SET)
+  {
+    auro_reload_value = (uint32_t)(READ_BIT(RTC->WUTR, RTC_WUTR_WUT));
+
+    elapsed_time_value = ReturnTimeElapsed();
+
+    if(auro_reload_value > elapsed_time_value)
+    {
+      return_value = auro_reload_value - elapsed_time_value;
+    }
+    else
+    {
+      return_value = 0;
+    }
+  }
+  else
+  {
+    return_value = TIMER_LIST_EMPTY;
+  }
+
+  __set_PRIMASK(primask_bit);     /**< Restore PRIMASK bit*/
+
+  return (return_value);
+}
+
+__weak void HW_TS_RTC_Int_AppNot(uint32_t TimerProcessID, uint8_t TimerID, HW_TS_pTimerCb_t pTimerCallBack)
+{
+  pTimerCallBack();
+
+  return;
+}

Core/Src/hw_uart.c

@@ -0,0 +1,317 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    Src/hw_uart.c
+  * @author  MCD Application Team
+  * @brief   HW UART source file for STM32WPAN Middleware.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019-2023 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "app_common.h"
+#include "hw_conf.h"
+#if (CFG_HW_LPUART1_ENABLED == 1)
+extern UART_HandleTypeDef hlpuart1;
+#endif
+#if (CFG_HW_USART1_ENABLED == 1)
+extern UART_HandleTypeDef huart1;
+#endif
+
+/* Macros --------------------------------------------------------------------*/
+#define HW_UART_RX_IT(__HANDLE__, __USART_BASE__)                                                   \
+        do{                                                                                         \
+            HW_##__HANDLE__##RxCb = cb;                                                             \
+            (__HANDLE__).Instance = (__USART_BASE__);                                               \
+            HAL_UART_Receive_IT(&(__HANDLE__), p_data, size);                                       \
+        } while(0)
+
+#define HW_UART_TX_IT(__HANDLE__, __USART_BASE__)                                                   \
+        do{                                                                                         \
+            HW_##__HANDLE__##TxCb = cb;                                                             \
+            (__HANDLE__).Instance = (__USART_BASE__);                                               \
+            HAL_UART_Transmit_IT(&(__HANDLE__), p_data, size);                                      \
+        } while(0)
+
+#define HW_UART_TX(__HANDLE__, __USART_BASE__)                                                      \
+        do{                                                                                         \
+            (__HANDLE__).Instance = (__USART_BASE__);                                               \
+            hal_status = HAL_UART_Transmit(&(__HANDLE__), p_data, size, timeout);                   \
+        } while(0)
+
+/* Variables -----------------------------------------------------------------*/
+#if (CFG_HW_USART1_ENABLED == 1)
+#if (CFG_HW_USART1_DMA_TX_SUPPORTED == 1)
+    DMA_HandleTypeDef HW_hdma_huart1_tx ={0};
+#endif
+    void (*HW_huart1RxCb)(void);
+    void (*HW_huart1TxCb)(void);
+#endif
+
+#if (CFG_HW_LPUART1_ENABLED == 1)
+#if (CFG_HW_LPUART1_DMA_TX_SUPPORTED == 1)
+    DMA_HandleTypeDef HW_hdma_hlpuart1_tx ={0};
+#endif
+    void (*HW_hlpuart1RxCb)(void);
+    void (*HW_hlpuart1TxCb)(void);
+#endif
+
+void HW_UART_Receive_IT(hw_uart_id_t hw_uart_id, uint8_t *p_data, uint16_t size, void (*cb)(void))
+{
+    switch (hw_uart_id)
+    {
+#if (CFG_HW_USART1_ENABLED == 1)
+        case hw_uart1:
+            HW_UART_RX_IT(huart1, USART1);
+            break;
+#endif
+
+#if (CFG_HW_LPUART1_ENABLED == 1)
+        case hw_lpuart1:
+            HW_UART_RX_IT(hlpuart1, LPUART1);
+            break;
+#endif
+
+        default:
+            break;
+    }
+
+    return;
+}
+
+void HW_UART_Transmit_IT(hw_uart_id_t hw_uart_id, uint8_t *p_data, uint16_t size,  void (*cb)(void))
+{
+    switch (hw_uart_id)
+    {
+#if (CFG_HW_USART1_ENABLED == 1)
+        case hw_uart1:
+            HW_UART_TX_IT(huart1, USART1);
+            break;
+#endif
+
+#if (CFG_HW_LPUART1_ENABLED == 1)
+        case hw_lpuart1:
+            HW_UART_TX_IT(hlpuart1, LPUART1);
+            break;
+#endif
+
+        default:
+            break;
+    }
+
+    return;
+}
+
+hw_status_t HW_UART_Transmit(hw_uart_id_t hw_uart_id, uint8_t *p_data, uint16_t size,  uint32_t timeout)
+{
+    HAL_StatusTypeDef hal_status = HAL_OK;
+    hw_status_t hw_status = hw_uart_ok;
+
+    switch (hw_uart_id)
+    {
+#if (CFG_HW_USART1_ENABLED == 1)
+        case hw_uart1:
+            HW_UART_TX(huart1, USART1);
+            break;
+#endif
+
+#if (CFG_HW_LPUART1_ENABLED == 1)
+        case hw_lpuart1:
+            HW_UART_TX(hlpuart1, LPUART1);
+            break;
+#endif
+
+        default:
+            break;
+    }
+
+    switch (hal_status)
+    {
+        case HAL_OK:
+            hw_status = hw_uart_ok;
+            break;
+
+        case HAL_ERROR:
+            hw_status = hw_uart_error;
+            break;
+
+        case HAL_BUSY:
+            hw_status = hw_uart_busy;
+            break;
+
+        case HAL_TIMEOUT:
+            hw_status = hw_uart_to;
+            break;
+
+        default:
+            break;
+    }
+
+    return hw_status;
+}
+
+hw_status_t HW_UART_Transmit_DMA(hw_uart_id_t hw_uart_id, uint8_t *p_data, uint16_t size, void (*cb)(void))
+{
+    HAL_StatusTypeDef hal_status = HAL_OK;
+    hw_status_t hw_status = hw_uart_ok;
+
+    switch (hw_uart_id)
+    {
+#if (CFG_HW_USART1_ENABLED == 1)
+        case hw_uart1:
+            HW_huart1TxCb = cb;
+            huart1.Instance = USART1;
+            hal_status = HAL_UART_Transmit_DMA(&huart1, p_data, size);
+            break;
+#endif
+
+#if (CFG_HW_LPUART1_ENABLED == 1)
+        case hw_lpuart1:
+            HW_hlpuart1TxCb = cb;
+            hlpuart1.Instance = LPUART1;
+            hal_status = HAL_UART_Transmit_DMA(&hlpuart1, p_data, size);
+            break;
+#endif
+
+        default:
+            break;
+    }
+
+    switch (hal_status)
+    {
+        case HAL_OK:
+            hw_status = hw_uart_ok;
+            break;
+
+        case HAL_ERROR:
+            hw_status = hw_uart_error;
+            break;
+
+        case HAL_BUSY:
+            hw_status = hw_uart_busy;
+            break;
+
+        case HAL_TIMEOUT:
+            hw_status = hw_uart_to;
+            break;
+
+        default:
+            break;
+    }
+
+    return hw_status;
+}
+
+void HW_UART_Interrupt_Handler(hw_uart_id_t hw_uart_id)
+{
+    switch (hw_uart_id)
+    {
+#if (CFG_HW_USART1_ENABLED == 1)
+        case hw_uart1:
+            HAL_UART_IRQHandler(&huart1);
+            break;
+#endif
+
+#if (CFG_HW_LPUART1_ENABLED == 1)
+        case hw_lpuart1:
+            HAL_UART_IRQHandler(&hlpuart1);
+            break;
+#endif
+
+        default:
+            break;
+    }
+
+    return;
+}
+
+void HW_UART_DMA_Interrupt_Handler(hw_uart_id_t hw_uart_id)
+{
+    switch (hw_uart_id)
+    {
+#if (CFG_HW_USART1_DMA_TX_SUPPORTED == 1)
+        case hw_uart1:
+            HAL_DMA_IRQHandler(huart1.hdmatx);
+            break;
+#endif
+
+#if (CFG_HW_LPUART1_DMA_TX_SUPPORTED == 1)
+        case hw_lpuart1:
+            HAL_DMA_IRQHandler(hlpuart1.hdmatx);
+            break;
+#endif
+
+        default:
+            break;
+    }
+
+    return;
+}
+
+void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart)
+{
+    switch ((uint32_t)huart->Instance)
+    {
+#if (CFG_HW_USART1_ENABLED == 1)
+        case (uint32_t)USART1:
+            if(HW_huart1RxCb)
+            {
+                HW_huart1RxCb();
+            }
+            break;
+#endif
+
+#if (CFG_HW_LPUART1_ENABLED == 1)
+        case (uint32_t)LPUART1:
+            if(HW_hlpuart1RxCb)
+            {
+                HW_hlpuart1RxCb();
+            }
+            break;
+#endif
+
+        default:
+            break;
+    }
+
+    return;
+}
+
+void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart)
+{
+    switch ((uint32_t)huart->Instance)
+    {
+#if (CFG_HW_USART1_ENABLED == 1)
+        case (uint32_t)USART1:
+            if(HW_huart1TxCb)
+            {
+                HW_huart1TxCb();
+            }
+            break;
+#endif
+
+#if (CFG_HW_LPUART1_ENABLED == 1)
+        case (uint32_t)LPUART1:
+            if(HW_hlpuart1TxCb)
+            {
+                HW_hlpuart1TxCb();
+            }
+            break;
+#endif
+
+        default:
+            break;
+    }
+
+    return;
+}

Core/Src/main.c

@@ -0,0 +1,465 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file           : main.c
+  * @brief          : Main program body
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2020-2023 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+IPCC_HandleTypeDef hipcc;
+
+UART_HandleTypeDef hlpuart1;
+UART_HandleTypeDef huart1;
+DMA_HandleTypeDef hdma_lpuart1_tx;
+DMA_HandleTypeDef hdma_usart1_tx;
+
+RTC_HandleTypeDef hrtc;
+
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+void SystemClock_Config(void);
+void PeriphCommonClock_Config(void);
+static void MX_GPIO_Init(void);
+static void MX_DMA_Init(void);
+static void MX_RTC_Init(void);
+static void MX_IPCC_Init(void);
+static void MX_RF_Init(void);
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/**
+  * @brief  The application entry point.
+  * @retval int
+  */
+int main(void)
+{
+  /* USER CODE BEGIN 1 */
+
+  /* USER CODE END 1 */
+
+  /* MCU Configuration--------------------------------------------------------*/
+
+  /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+  HAL_Init();
+  /* Config code for STM32_WPAN (HSE Tuning must be done before system clock configuration) */
+  MX_APPE_Config();
+
+  /* USER CODE BEGIN Init */
+
+  /* USER CODE END Init */
+
+  /* Configure the system clock */
+  SystemClock_Config();
+
+/* Configure the peripherals common clocks */
+  PeriphCommonClock_Config();
+
+  /* IPCC initialisation */
+  MX_IPCC_Init();
+
+  /* USER CODE BEGIN SysInit */
+
+  /* USER CODE END SysInit */
+
+  /* Initialize all configured peripherals */
+  MX_GPIO_Init();
+  MX_DMA_Init();
+  MX_RTC_Init();
+  MX_RF_Init();
+  /* USER CODE BEGIN 2 */
+
+  /* USER CODE END 2 */
+
+  /* Init code for STM32_WPAN */
+  MX_APPE_Init();
+
+  /* Infinite loop */
+  /* USER CODE BEGIN WHILE */
+  while (1)
+  {
+    /* USER CODE END WHILE */
+    MX_APPE_Process();
+
+    /* USER CODE BEGIN 3 */
+  }
+  /* USER CODE END 3 */
+}
+
+/**
+  * @brief System Clock Configuration
+  * @retval None
+  */
+void SystemClock_Config(void)
+{
+  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+
+  /** Configure LSE Drive Capability
+  */
+  HAL_PWR_EnableBkUpAccess();
+  __HAL_RCC_LSEDRIVE_CONFIG(RCC_LSEDRIVE_LOW);
+
+  /** Configure the main internal regulator output voltage
+  */
+  __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
+
+  /** Initializes the RCC Oscillators according to the specified parameters
+  * in the RCC_OscInitTypeDef structure.
+  */
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI|RCC_OSCILLATORTYPE_HSE
+                              |RCC_OSCILLATORTYPE_LSE;
+  RCC_OscInitStruct.HSEState = RCC_HSE_ON;
+  RCC_OscInitStruct.LSEState = RCC_LSE_ON;
+  RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+  RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /** Configure the SYSCLKSource, HCLK, PCLK1 and PCLK2 clocks dividers
+  */
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK4|RCC_CLOCKTYPE_HCLK2
+                              |RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSE;
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+  RCC_ClkInitStruct.AHBCLK2Divider = RCC_SYSCLK_DIV1;
+  RCC_ClkInitStruct.AHBCLK4Divider = RCC_SYSCLK_DIV1;
+
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK)
+  {
+    Error_Handler();
+  }
+}
+
+/**
+  * @brief Peripherals Common Clock Configuration
+  * @retval None
+  */
+void PeriphCommonClock_Config(void)
+{
+  RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
+
+  /** Initializes the peripherals clock
+  */
+  PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_SMPS|RCC_PERIPHCLK_RFWAKEUP;
+  PeriphClkInitStruct.RFWakeUpClockSelection = RCC_RFWKPCLKSOURCE_LSE;
+  PeriphClkInitStruct.SmpsClockSelection = RCC_SMPSCLKSOURCE_HSE;
+  PeriphClkInitStruct.SmpsDivSelection = RCC_SMPSCLKDIV_RANGE0;
+
+  if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN Smps */
+
+  /* USER CODE END Smps */
+}
+
+/**
+  * @brief IPCC Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_IPCC_Init(void)
+{
+
+  /* USER CODE BEGIN IPCC_Init 0 */
+
+  /* USER CODE END IPCC_Init 0 */
+
+  /* USER CODE BEGIN IPCC_Init 1 */
+
+  /* USER CODE END IPCC_Init 1 */
+  hipcc.Instance = IPCC;
+  if (HAL_IPCC_Init(&hipcc) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN IPCC_Init 2 */
+
+  /* USER CODE END IPCC_Init 2 */
+
+}
+
+/**
+  * @brief LPUART1 Initialization Function
+  * @param None
+  * @retval None
+  */
+void MX_LPUART1_UART_Init(void)
+{
+
+  /* USER CODE BEGIN LPUART1_Init 0 */
+
+  /* USER CODE END LPUART1_Init 0 */
+
+  /* USER CODE BEGIN LPUART1_Init 1 */
+
+  /* USER CODE END LPUART1_Init 1 */
+  hlpuart1.Instance = LPUART1;
+  hlpuart1.Init.BaudRate = 115200;
+  hlpuart1.Init.WordLength = UART_WORDLENGTH_8B;
+  hlpuart1.Init.StopBits = UART_STOPBITS_1;
+  hlpuart1.Init.Parity = UART_PARITY_NONE;
+  hlpuart1.Init.Mode = UART_MODE_TX_RX;
+  hlpuart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
+  hlpuart1.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
+  hlpuart1.Init.ClockPrescaler = UART_PRESCALER_DIV1;
+  hlpuart1.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
+  hlpuart1.FifoMode = UART_FIFOMODE_DISABLE;
+  if (HAL_UART_Init(&hlpuart1) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  if (HAL_UARTEx_SetTxFifoThreshold(&hlpuart1, UART_TXFIFO_THRESHOLD_1_8) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  if (HAL_UARTEx_SetRxFifoThreshold(&hlpuart1, UART_RXFIFO_THRESHOLD_1_8) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  if (HAL_UARTEx_DisableFifoMode(&hlpuart1) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN LPUART1_Init 2 */
+
+  /* USER CODE END LPUART1_Init 2 */
+
+}
+
+/**
+  * @brief USART1 Initialization Function
+  * @param None
+  * @retval None
+  */
+void MX_USART1_UART_Init(void)
+{
+
+  /* USER CODE BEGIN USART1_Init 0 */
+
+  /* USER CODE END USART1_Init 0 */
+
+  /* USER CODE BEGIN USART1_Init 1 */
+
+  /* USER CODE END USART1_Init 1 */
+  huart1.Instance = USART1;
+  huart1.Init.BaudRate = 115200;
+  huart1.Init.WordLength = UART_WORDLENGTH_8B;
+  huart1.Init.StopBits = UART_STOPBITS_1;
+  huart1.Init.Parity = UART_PARITY_NONE;
+  huart1.Init.Mode = UART_MODE_TX_RX;
+  huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
+  huart1.Init.OverSampling = UART_OVERSAMPLING_8;
+  huart1.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
+  huart1.Init.ClockPrescaler = UART_PRESCALER_DIV1;
+  huart1.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
+  if (HAL_UART_Init(&huart1) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  if (HAL_UARTEx_SetTxFifoThreshold(&huart1, UART_TXFIFO_THRESHOLD_1_8) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  if (HAL_UARTEx_SetRxFifoThreshold(&huart1, UART_RXFIFO_THRESHOLD_1_8) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  if (HAL_UARTEx_DisableFifoMode(&huart1) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN USART1_Init 2 */
+
+  /* USER CODE END USART1_Init 2 */
+
+}
+
+/**
+  * @brief RF Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_RF_Init(void)
+{
+
+  /* USER CODE BEGIN RF_Init 0 */
+
+  /* USER CODE END RF_Init 0 */
+
+  /* USER CODE BEGIN RF_Init 1 */
+
+  /* USER CODE END RF_Init 1 */
+  /* USER CODE BEGIN RF_Init 2 */
+
+  /* USER CODE END RF_Init 2 */
+
+}
+
+/**
+  * @brief RTC Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_RTC_Init(void)
+{
+
+  /* USER CODE BEGIN RTC_Init 0 */
+
+  /* USER CODE END RTC_Init 0 */
+
+  /* USER CODE BEGIN RTC_Init 1 */
+
+  /* USER CODE END RTC_Init 1 */
+
+  /** Initialize RTC Only
+  */
+  hrtc.Instance = RTC;
+  hrtc.Init.HourFormat = RTC_HOURFORMAT_24;
+  hrtc.Init.AsynchPrediv = CFG_RTC_ASYNCH_PRESCALER;
+  hrtc.Init.SynchPrediv = CFG_RTC_SYNCH_PRESCALER;
+  hrtc.Init.OutPut = RTC_OUTPUT_DISABLE;
+  hrtc.Init.OutPutPolarity = RTC_OUTPUT_POLARITY_HIGH;
+  hrtc.Init.OutPutType = RTC_OUTPUT_TYPE_OPENDRAIN;
+  hrtc.Init.OutPutRemap = RTC_OUTPUT_REMAP_NONE;
+  if (HAL_RTC_Init(&hrtc) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /** Enable the WakeUp
+  */
+  if (HAL_RTCEx_SetWakeUpTimer_IT(&hrtc, 0, RTC_WAKEUPCLOCK_RTCCLK_DIV16) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN RTC_Init 2 */
+
+  /* USER CODE END RTC_Init 2 */
+
+}
+
+/**
+  * Enable DMA controller clock
+  */
+static void MX_DMA_Init(void)
+{
+
+  /* DMA controller clock enable */
+  __HAL_RCC_DMAMUX1_CLK_ENABLE();
+  __HAL_RCC_DMA1_CLK_ENABLE();
+
+  /* DMA interrupt init */
+  /* DMA1_Channel1_IRQn interrupt configuration */
+  HAL_NVIC_SetPriority(DMA1_Channel1_IRQn, 0, 0);
+  HAL_NVIC_EnableIRQ(DMA1_Channel1_IRQn);
+  /* DMA1_Channel2_IRQn interrupt configuration */
+  HAL_NVIC_SetPriority(DMA1_Channel2_IRQn, 0, 0);
+  HAL_NVIC_EnableIRQ(DMA1_Channel2_IRQn);
+
+}
+
+/**
+  * @brief GPIO Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_GPIO_Init(void)
+{
+/* USER CODE BEGIN MX_GPIO_Init_1 */
+/* USER CODE END MX_GPIO_Init_1 */
+
+  /* GPIO Ports Clock Enable */
+  __HAL_RCC_GPIOC_CLK_ENABLE();
+  __HAL_RCC_GPIOA_CLK_ENABLE();
+  __HAL_RCC_GPIOB_CLK_ENABLE();
+
+/* USER CODE BEGIN MX_GPIO_Init_2 */
+/* USER CODE END MX_GPIO_Init_2 */
+}
+
+/* USER CODE BEGIN 4 */
+
+/* USER CODE END 4 */
+
+/**
+  * @brief  This function is executed in case of error occurrence.
+  * @retval None
+  */
+void Error_Handler(void)
+{
+  /* USER CODE BEGIN Error_Handler_Debug */
+  /* User can add his own implementation to report the HAL error return state */
+  __disable_irq();
+  while (1)
+  {
+  }
+  /* USER CODE END Error_Handler_Debug */
+}
+
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  Reports the name of the source file and the source line number
+  *         where the assert_param error has occurred.
+  * @param  file: pointer to the source file name
+  * @param  line: assert_param error line source number
+  * @retval None
+  */
+void assert_failed(uint8_t *file, uint32_t line)
+{
+  /* USER CODE BEGIN 6 */
+  /* User can add his own implementation to report the file name and line number,
+     ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+  /* USER CODE END 6 */
+}
+#endif /* USE_FULL_ASSERT */

Core/Src/stm32_lpm_if.c

@@ -0,0 +1,353 @@
+/* USER CODE BEGIN Header */
+/**
+  ***************************************************************************************
+  * @file    stm32_lpm_if.c
+  * @author  MCD Application Team
+  * @brief   Low layer function to enter/exit low power modes (stop, sleep).
+  ***************************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019-2023 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32_lpm_if.h"
+#include "stm32_lpm.h"
+#include "app_conf.h"
+/* USER CODE BEGIN include */
+
+/* USER CODE END include */
+
+/* Exported variables --------------------------------------------------------*/
+const struct UTIL_LPM_Driver_s UTIL_PowerDriver =
+{
+  PWR_EnterSleepMode,
+  PWR_ExitSleepMode,
+
+  PWR_EnterStopMode,
+  PWR_ExitStopMode,
+
+  PWR_EnterOffMode,
+  PWR_ExitOffMode,
+};
+
+/* Private function prototypes -----------------------------------------------*/
+static void Switch_On_HSI(void);
+static void EnterLowPower(void);
+static void ExitLowPower(void);
+/* USER CODE BEGIN Private_Function_Prototypes */
+
+/* USER CODE END Private_Function_Prototypes */
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN Private_Typedef */
+
+/* USER CODE END Private_Typedef */
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN Private_Define */
+
+/* USER CODE END Private_Define */
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN Private_Macro */
+
+/* USER CODE END Private_Macro */
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN Private_Variables */
+
+/* USER CODE END Private_Variables */
+
+/* Functions Definition ------------------------------------------------------*/
+/**
+  * @brief Enters Low Power Off Mode
+  * @param none
+  * @retval none
+  */
+void PWR_EnterOffMode(void)
+{
+/* USER CODE BEGIN PWR_EnterOffMode_1 */
+
+/* USER CODE END PWR_EnterOffMode_1 */
+  /**
+   * The systick should be disabled for the same reason than when the device enters stop mode because
+   * at this time, the device may enter either OffMode or StopMode.
+   */
+  HAL_SuspendTick();
+
+  EnterLowPower();
+
+  /************************************************************************************
+   * ENTER OFF MODE
+   ***********************************************************************************/
+  /*
+   * There is no risk to clear all the WUF here because in the current implementation, this API is called
+   * in critical section. If an interrupt occurs while in that critical section before that point,
+   * the flag is set and will be cleared here but the system will not enter Off Mode
+   * because an interrupt is pending in the NVIC. The ISR will be executed when moving out
+   * of this critical section
+   */
+  LL_PWR_ClearFlag_WU();
+
+  LL_PWR_SetPowerMode(LL_PWR_MODE_STANDBY);
+
+  LL_LPM_EnableDeepSleep(); /**< Set SLEEPDEEP bit of Cortex System Control Register */
+
+  /**
+   * This option is used to ensure that store operations are completed
+   */
+#if defined (__CC_ARM) || defined (__ARMCC_VERSION)
+  __force_stores();
+#endif
+
+  __WFI();
+
+/* USER CODE BEGIN PWR_EnterOffMode_2 */
+
+/* USER CODE END PWR_EnterOffMode_2 */
+  return;
+}
+
+/**
+  * @brief Exits Low Power Off Mode
+  * @param none
+  * @retval none
+  */
+void PWR_ExitOffMode(void)
+{
+/* USER CODE BEGIN PWR_ExitOffMode_1 */
+
+/* USER CODE END PWR_ExitOffMode_1 */
+  HAL_ResumeTick();
+/* USER CODE BEGIN PWR_ExitOffMode_2 */
+
+/* USER CODE END PWR_ExitOffMode_2 */
+  return;
+}
+
+/**
+  * @brief Enters Low Power Stop Mode
+  * @note ARM exists the function when waking up
+  * @param none
+  * @retval none
+  */
+void PWR_EnterStopMode(void)
+{
+/* USER CODE BEGIN PWR_EnterStopMode_1 */
+
+/* USER CODE END PWR_EnterStopMode_1 */
+  /**
+   * When HAL_DBGMCU_EnableDBGStopMode() is called to keep the debugger active in Stop Mode,
+   * the systick shall be disabled otherwise the cpu may crash when moving out from stop mode
+   *
+   * When in production, the HAL_DBGMCU_EnableDBGStopMode() is not called so that the device can reach best power consumption
+   * However, the systick should be disabled anyway to avoid the case when it is about to expire at the same time the device enters
+   * stop mode (this will abort the Stop Mode entry).
+   */
+  HAL_SuspendTick();
+
+  /**
+   * This function is called from CRITICAL SECTION
+   */
+  EnterLowPower();
+
+  /************************************************************************************
+   * ENTER STOP MODE
+   ***********************************************************************************/
+  LL_PWR_SetPowerMode(LL_PWR_MODE_STOP2);
+
+  LL_LPM_EnableDeepSleep(); /**< Set SLEEPDEEP bit of Cortex System Control Register */
+
+  /**
+   * This option is used to ensure that store operations are completed
+   */
+#if defined (__CC_ARM) || defined (__ARMCC_VERSION)
+  __force_stores();
+#endif
+
+  __WFI();
+
+/* USER CODE BEGIN PWR_EnterStopMode_2 */
+
+/* USER CODE END PWR_EnterStopMode_2 */
+  return;
+}
+
+/**
+  * @brief Exits Low Power Stop Mode
+  * @note Enable the pll at 32MHz
+  * @param none
+  * @retval none
+  */
+void PWR_ExitStopMode(void)
+{
+/* USER CODE BEGIN PWR_ExitStopMode_1 */
+
+/* USER CODE END PWR_ExitStopMode_1 */
+  /**
+   * This function is called from CRITICAL SECTION
+   */
+  ExitLowPower();
+
+  HAL_ResumeTick();
+/* USER CODE BEGIN PWR_ExitStopMode_2 */
+
+/* USER CODE END PWR_ExitStopMode_2 */
+  return;
+}
+
+/**
+  * @brief Enters Low Power Sleep Mode
+  * @note ARM exits the function when waking up
+  * @param none
+  * @retval none
+  */
+void PWR_EnterSleepMode(void)
+{
+/* USER CODE BEGIN PWR_EnterSleepMode_1 */
+
+/* USER CODE END PWR_EnterSleepMode_1 */
+
+  HAL_SuspendTick();
+
+  /************************************************************************************
+   * ENTER SLEEP MODE
+   ***********************************************************************************/
+  LL_LPM_EnableSleep(); /**< Clear SLEEPDEEP bit of Cortex System Control Register */
+
+  /**
+   * This option is used to ensure that store operations are completed
+   */
+#if defined (__CC_ARM) || defined (__ARMCC_VERSION)
+  __force_stores();
+#endif
+
+  __WFI();
+/* USER CODE BEGIN PWR_EnterSleepMode_2 */
+
+/* USER CODE END PWR_EnterSleepMode_2 */
+  return;
+}
+
+/**
+  * @brief Exits Low Power Sleep Mode
+  * @note ARM exits the function when waking up
+  * @param none
+  * @retval none
+  */
+void PWR_ExitSleepMode(void)
+{
+/* USER CODE BEGIN PWR_ExitSleepMode_1 */
+
+/* USER CODE END PWR_ExitSleepMode_1 */
+  HAL_ResumeTick();
+/* USER CODE BEGIN PWR_ExitSleepMode_2 */
+
+/* USER CODE END PWR_ExitSleepMode_2 */
+  return;
+}
+
+/*************************************************************
+ *
+ * LOCAL FUNCTIONS
+ *
+ *************************************************************/
+/**
+  * @brief Setup the system to enter either stop or off mode
+  * @param none
+  * @retval none
+  */
+static void EnterLowPower(void)
+{
+  /**
+   * This function is called from CRITICAL SECTION
+   */
+
+  while(LL_HSEM_1StepLock(HSEM, CFG_HW_RCC_SEMID));
+
+  if (! LL_HSEM_1StepLock(HSEM, CFG_HW_ENTRY_STOP_MODE_SEMID))
+  {
+    if(LL_PWR_IsActiveFlag_C2DS() || LL_PWR_IsActiveFlag_C2SB())
+    {
+      /* Release ENTRY_STOP_MODE semaphore */
+      LL_HSEM_ReleaseLock(HSEM, CFG_HW_ENTRY_STOP_MODE_SEMID, 0);
+
+      Switch_On_HSI();
+      __HAL_FLASH_SET_LATENCY(FLASH_LATENCY_0);
+    }
+  }
+  else
+  {
+    Switch_On_HSI();
+    __HAL_FLASH_SET_LATENCY(FLASH_LATENCY_0);
+  }
+
+  /* Release RCC semaphore */
+  LL_HSEM_ReleaseLock(HSEM, CFG_HW_RCC_SEMID, 0);
+
+  return;
+}
+
+/**
+  * @brief Restore the system to exit stop mode
+  * @param none
+  * @retval none
+  */
+static void ExitLowPower(void)
+{
+  /* Release ENTRY_STOP_MODE semaphore */
+  LL_HSEM_ReleaseLock(HSEM, CFG_HW_ENTRY_STOP_MODE_SEMID, 0);
+
+  while(LL_HSEM_1StepLock(HSEM, CFG_HW_RCC_SEMID));
+
+  if(LL_RCC_GetSysClkSource() == LL_RCC_SYS_CLKSOURCE_STATUS_HSI)
+  {
+/* Restore the clock configuration of the application in this user section */
+/* USER CODE BEGIN ExitLowPower_1 */
+    LL_RCC_HSE_Enable( );
+    __HAL_FLASH_SET_LATENCY(FLASH_LATENCY_1);
+    while(__HAL_FLASH_GET_LATENCY() != FLASH_LATENCY_1);
+    while(!LL_RCC_HSE_IsReady( ));
+    LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_HSE);
+    while (LL_RCC_GetSysClkSource( ) != LL_RCC_SYS_CLKSOURCE_STATUS_HSE);
+
+/* USER CODE END ExitLowPower_1 */
+  }
+  else
+  {
+/* If the application is not running on HSE restore the clock configuration in this user section */
+/* USER CODE BEGIN ExitLowPower_2 */
+
+/* USER CODE END ExitLowPower_2 */
+  }
+
+  /* Release RCC semaphore */
+  LL_HSEM_ReleaseLock(HSEM, CFG_HW_RCC_SEMID, 0);
+
+  return;
+}
+
+/**
+  * @brief Switch the system clock on HSI
+  * @param none
+  * @retval none
+  */
+static void Switch_On_HSI(void)
+{
+  LL_RCC_HSI_Enable();
+  while(!LL_RCC_HSI_IsReady());
+  LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_HSI);
+  LL_RCC_SetSMPSClockSource(LL_RCC_SMPS_CLKSOURCE_HSI);
+  while (LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_HSI);
+  return;
+}
+
+/* USER CODE BEGIN Private_Functions */
+
+/* USER CODE END Private_Functions */
+

Core/Src/stm32wbxx_hal_msp.c

@@ -0,0 +1,427 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file         stm32wbxx_hal_msp.c
+  * @brief        This file provides code for the MSP Initialization
+  *               and de-Initialization codes.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019-2023 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+extern DMA_HandleTypeDef hdma_lpuart1_tx;
+
+extern DMA_HandleTypeDef hdma_usart1_tx;
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN Define */
+
+/* USER CODE END Define */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN Macro */
+
+/* USER CODE END Macro */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* External functions --------------------------------------------------------*/
+/* USER CODE BEGIN ExternalFunctions */
+
+/* USER CODE END ExternalFunctions */
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+/**
+  * Initializes the Global MSP.
+  */
+void HAL_MspInit(void)
+{
+  /* USER CODE BEGIN MspInit 0 */
+
+  /* USER CODE END MspInit 0 */
+
+  __HAL_RCC_HSEM_CLK_ENABLE();
+
+  /* System interrupt init*/
+
+  /* Peripheral interrupt init */
+  /* PVD_PVM_IRQn interrupt configuration */
+  HAL_NVIC_SetPriority(PVD_PVM_IRQn, 0, 0);
+  HAL_NVIC_EnableIRQ(PVD_PVM_IRQn);
+  /* FLASH_IRQn interrupt configuration */
+  HAL_NVIC_SetPriority(FLASH_IRQn, 0, 0);
+  HAL_NVIC_EnableIRQ(FLASH_IRQn);
+  /* RCC_IRQn interrupt configuration */
+  HAL_NVIC_SetPriority(RCC_IRQn, 0, 0);
+  HAL_NVIC_EnableIRQ(RCC_IRQn);
+  /* C2SEV_PWR_C2H_IRQn interrupt configuration */
+  HAL_NVIC_SetPriority(C2SEV_PWR_C2H_IRQn, 0, 0);
+  HAL_NVIC_EnableIRQ(C2SEV_PWR_C2H_IRQn);
+  /* PWR_SOTF_BLEACT_802ACT_RFPHASE_IRQn interrupt configuration */
+  HAL_NVIC_SetPriority(PWR_SOTF_BLEACT_802ACT_RFPHASE_IRQn, 0, 0);
+  HAL_NVIC_EnableIRQ(PWR_SOTF_BLEACT_802ACT_RFPHASE_IRQn);
+  /* HSEM_IRQn interrupt configuration */
+  HAL_NVIC_SetPriority(HSEM_IRQn, 0, 0);
+  HAL_NVIC_EnableIRQ(HSEM_IRQn);
+  /* FPU_IRQn interrupt configuration */
+  HAL_NVIC_SetPriority(FPU_IRQn, 0, 0);
+  HAL_NVIC_EnableIRQ(FPU_IRQn);
+
+  /* USER CODE BEGIN MspInit 1 */
+
+  /* USER CODE END MspInit 1 */
+}
+
+/**
+* @brief IPCC MSP Initialization
+* This function configures the hardware resources used in this example
+* @param hipcc: IPCC handle pointer
+* @retval None
+*/
+void HAL_IPCC_MspInit(IPCC_HandleTypeDef* hipcc)
+{
+  if(hipcc->Instance==IPCC)
+  {
+  /* USER CODE BEGIN IPCC_MspInit 0 */
+
+  /* USER CODE END IPCC_MspInit 0 */
+    /* Peripheral clock enable */
+    __HAL_RCC_IPCC_CLK_ENABLE();
+    /* IPCC interrupt Init */
+    HAL_NVIC_SetPriority(IPCC_C1_RX_IRQn, 0, 0);
+    HAL_NVIC_EnableIRQ(IPCC_C1_RX_IRQn);
+    HAL_NVIC_SetPriority(IPCC_C1_TX_IRQn, 0, 0);
+    HAL_NVIC_EnableIRQ(IPCC_C1_TX_IRQn);
+  /* USER CODE BEGIN IPCC_MspInit 1 */
+
+  /* USER CODE END IPCC_MspInit 1 */
+  }
+
+}
+
+/**
+* @brief IPCC MSP De-Initialization
+* This function freeze the hardware resources used in this example
+* @param hipcc: IPCC handle pointer
+* @retval None
+*/
+void HAL_IPCC_MspDeInit(IPCC_HandleTypeDef* hipcc)
+{
+  if(hipcc->Instance==IPCC)
+  {
+  /* USER CODE BEGIN IPCC_MspDeInit 0 */
+
+  /* USER CODE END IPCC_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_IPCC_CLK_DISABLE();
+
+    /* IPCC interrupt DeInit */
+    HAL_NVIC_DisableIRQ(IPCC_C1_RX_IRQn);
+    HAL_NVIC_DisableIRQ(IPCC_C1_TX_IRQn);
+  /* USER CODE BEGIN IPCC_MspDeInit 1 */
+
+  /* USER CODE END IPCC_MspDeInit 1 */
+  }
+
+}
+
+/**
+* @brief UART MSP Initialization
+* This function configures the hardware resources used in this example
+* @param huart: UART handle pointer
+* @retval None
+*/
+void HAL_UART_MspInit(UART_HandleTypeDef* huart)
+{
+  GPIO_InitTypeDef GPIO_InitStruct = {0};
+  RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
+  if(huart->Instance==LPUART1)
+  {
+  /* USER CODE BEGIN LPUART1_MspInit 0 */
+
+  /* USER CODE END LPUART1_MspInit 0 */
+
+  /** Initializes the peripherals clock
+  */
+    PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_LPUART1;
+    PeriphClkInitStruct.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_PCLK1;
+    if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
+    {
+      Error_Handler();
+    }
+
+    /* Peripheral clock enable */
+    __HAL_RCC_LPUART1_CLK_ENABLE();
+
+    __HAL_RCC_GPIOA_CLK_ENABLE();
+    /**LPUART1 GPIO Configuration
+    PA2     ------> LPUART1_TX
+    PA3     ------> LPUART1_RX
+    */
+    GPIO_InitStruct.Pin = GPIO_PIN_2|GPIO_PIN_3;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+    GPIO_InitStruct.Alternate = GPIO_AF8_LPUART1;
+    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+
+    /* LPUART1 DMA Init */
+    /* LPUART1_TX Init */
+    hdma_lpuart1_tx.Instance = DMA1_Channel1;
+    hdma_lpuart1_tx.Init.Request = DMA_REQUEST_LPUART1_TX;
+    hdma_lpuart1_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;
+    hdma_lpuart1_tx.Init.PeriphInc = DMA_PINC_DISABLE;
+    hdma_lpuart1_tx.Init.MemInc = DMA_MINC_ENABLE;
+    hdma_lpuart1_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
+    hdma_lpuart1_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
+    hdma_lpuart1_tx.Init.Mode = DMA_NORMAL;
+    hdma_lpuart1_tx.Init.Priority = DMA_PRIORITY_LOW;
+    if (HAL_DMA_Init(&hdma_lpuart1_tx) != HAL_OK)
+    {
+      Error_Handler();
+    }
+
+    __HAL_LINKDMA(huart,hdmatx,hdma_lpuart1_tx);
+
+    /* LPUART1 interrupt Init */
+    HAL_NVIC_SetPriority(LPUART1_IRQn, 0, 0);
+    HAL_NVIC_EnableIRQ(LPUART1_IRQn);
+  /* USER CODE BEGIN LPUART1_MspInit 1 */
+
+  /* USER CODE END LPUART1_MspInit 1 */
+  }
+  else if(huart->Instance==USART1)
+  {
+  /* USER CODE BEGIN USART1_MspInit 0 */
+
+  /* USER CODE END USART1_MspInit 0 */
+
+  /** Initializes the peripherals clock
+  */
+    PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USART1;
+    PeriphClkInitStruct.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2;
+    if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
+    {
+      Error_Handler();
+    }
+
+    /* Peripheral clock enable */
+    __HAL_RCC_USART1_CLK_ENABLE();
+
+    __HAL_RCC_GPIOA_CLK_ENABLE();
+    __HAL_RCC_GPIOB_CLK_ENABLE();
+    /**USART1 GPIO Configuration
+    PA11     ------> USART1_CTS
+    PB6     ------> USART1_TX
+    PB7     ------> USART1_RX
+    */
+    GPIO_InitStruct.Pin = GPIO_PIN_11;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+    GPIO_InitStruct.Alternate = GPIO_AF7_USART1;
+    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+
+    GPIO_InitStruct.Pin = GPIO_PIN_6|GPIO_PIN_7;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+    GPIO_InitStruct.Alternate = GPIO_AF7_USART1;
+    HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
+
+    /* USART1 DMA Init */
+    /* USART1_TX Init */
+    hdma_usart1_tx.Instance = DMA1_Channel2;
+    hdma_usart1_tx.Init.Request = DMA_REQUEST_USART1_TX;
+    hdma_usart1_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;
+    hdma_usart1_tx.Init.PeriphInc = DMA_PINC_DISABLE;
+    hdma_usart1_tx.Init.MemInc = DMA_MINC_ENABLE;
+    hdma_usart1_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
+    hdma_usart1_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
+    hdma_usart1_tx.Init.Mode = DMA_NORMAL;
+    hdma_usart1_tx.Init.Priority = DMA_PRIORITY_LOW;
+    if (HAL_DMA_Init(&hdma_usart1_tx) != HAL_OK)
+    {
+      Error_Handler();
+    }
+
+    __HAL_LINKDMA(huart,hdmatx,hdma_usart1_tx);
+
+    /* USART1 interrupt Init */
+    HAL_NVIC_SetPriority(USART1_IRQn, 0, 0);
+    HAL_NVIC_EnableIRQ(USART1_IRQn);
+  /* USER CODE BEGIN USART1_MspInit 1 */
+
+  /* USER CODE END USART1_MspInit 1 */
+  }
+
+}
+
+/**
+* @brief UART MSP De-Initialization
+* This function freeze the hardware resources used in this example
+* @param huart: UART handle pointer
+* @retval None
+*/
+void HAL_UART_MspDeInit(UART_HandleTypeDef* huart)
+{
+  if(huart->Instance==LPUART1)
+  {
+  /* USER CODE BEGIN LPUART1_MspDeInit 0 */
+
+  /* USER CODE END LPUART1_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_LPUART1_CLK_DISABLE();
+
+    /**LPUART1 GPIO Configuration
+    PA2     ------> LPUART1_TX
+    PA3     ------> LPUART1_RX
+    */
+    HAL_GPIO_DeInit(GPIOA, GPIO_PIN_2|GPIO_PIN_3);
+
+    /* LPUART1 DMA DeInit */
+    HAL_DMA_DeInit(huart->hdmatx);
+
+    /* LPUART1 interrupt DeInit */
+    HAL_NVIC_DisableIRQ(LPUART1_IRQn);
+  /* USER CODE BEGIN LPUART1_MspDeInit 1 */
+
+  /* USER CODE END LPUART1_MspDeInit 1 */
+  }
+  else if(huart->Instance==USART1)
+  {
+  /* USER CODE BEGIN USART1_MspDeInit 0 */
+
+  /* USER CODE END USART1_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_USART1_CLK_DISABLE();
+
+    /**USART1 GPIO Configuration
+    PA11     ------> USART1_CTS
+    PB6     ------> USART1_TX
+    PB7     ------> USART1_RX
+    */
+    HAL_GPIO_DeInit(GPIOA, GPIO_PIN_11);
+
+    HAL_GPIO_DeInit(GPIOB, GPIO_PIN_6|GPIO_PIN_7);
+
+    /* USART1 DMA DeInit */
+    HAL_DMA_DeInit(huart->hdmatx);
+
+    /* USART1 interrupt DeInit */
+    HAL_NVIC_DisableIRQ(USART1_IRQn);
+  /* USER CODE BEGIN USART1_MspDeInit 1 */
+
+  /* USER CODE END USART1_MspDeInit 1 */
+  }
+
+}
+
+/**
+* @brief RTC MSP Initialization
+* This function configures the hardware resources used in this example
+* @param hrtc: RTC handle pointer
+* @retval None
+*/
+void HAL_RTC_MspInit(RTC_HandleTypeDef* hrtc)
+{
+  RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
+  if(hrtc->Instance==RTC)
+  {
+  /* USER CODE BEGIN RTC_MspInit 0 */
+    /* Enable access to the RTC registers */
+    HAL_PWR_EnableBkUpAccess(); 
+
+    /*
+     *  Write twice the value to flush the APB-AHB bridge
+     *  This bit shall be written in the register before writing the next one
+     */
+    HAL_PWR_EnableBkUpAccess();
+
+    /* Select LSE as RTC Input */
+    __HAL_RCC_RTC_CONFIG(RCC_RTCCLKSOURCE_LSE); 
+
+  /* USER CODE END RTC_MspInit 0 */
+
+  /** Initializes the peripherals clock
+  */
+    PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_RTC;
+    PeriphClkInitStruct.RTCClockSelection = RCC_RTCCLKSOURCE_LSE;
+    if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
+    {
+      Error_Handler();
+    }
+
+    /* Peripheral clock enable */
+    __HAL_RCC_RTC_ENABLE();
+    __HAL_RCC_RTCAPB_CLK_ENABLE();
+    /* RTC interrupt Init */
+    HAL_NVIC_SetPriority(RTC_WKUP_IRQn, 0, 0);
+    HAL_NVIC_EnableIRQ(RTC_WKUP_IRQn);
+  /* USER CODE BEGIN RTC_MspInit 1 */
+    
+    MODIFY_REG(RTC->CR, RTC_CR_WUCKSEL, CFG_RTC_WUCKSEL_DIVIDER);
+  /* USER CODE END RTC_MspInit 1 */
+  }
+
+}
+
+/**
+* @brief RTC MSP De-Initialization
+* This function freeze the hardware resources used in this example
+* @param hrtc: RTC handle pointer
+* @retval None
+*/
+void HAL_RTC_MspDeInit(RTC_HandleTypeDef* hrtc)
+{
+  if(hrtc->Instance==RTC)
+  {
+  /* USER CODE BEGIN RTC_MspDeInit 0 */
+
+  /* USER CODE END RTC_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_RTC_DISABLE();
+    __HAL_RCC_RTCAPB_CLK_DISABLE();
+
+    /* RTC interrupt DeInit */
+    HAL_NVIC_DisableIRQ(RTC_WKUP_IRQn);
+  /* USER CODE BEGIN RTC_MspDeInit 1 */
+
+  /* USER CODE END RTC_MspDeInit 1 */
+  }
+
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */

Core/Src/stm32wbxx_it.c

@@ -0,0 +1,431 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    stm32wbxx_it.c
+  * @brief   Interrupt Service Routines.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2020-2023 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "stm32wbxx_it.h"
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/* External variables --------------------------------------------------------*/
+extern IPCC_HandleTypeDef hipcc;
+extern DMA_HandleTypeDef hdma_lpuart1_tx;
+extern DMA_HandleTypeDef hdma_usart1_tx;
+extern UART_HandleTypeDef hlpuart1;
+extern UART_HandleTypeDef huart1;
+extern RTC_HandleTypeDef hrtc;
+/* USER CODE BEGIN EV */
+
+/* USER CODE END EV */
+
+/******************************************************************************/
+/*           Cortex Processor Interruption and Exception Handlers          */
+/******************************************************************************/
+/**
+  * @brief This function handles Non maskable interrupt.
+  */
+void NMI_Handler(void)
+{
+  /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
+
+  /* USER CODE END NonMaskableInt_IRQn 0 */
+  /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
+  while (1)
+  {
+  }
+  /* USER CODE END NonMaskableInt_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Hard fault interrupt.
+  */
+void HardFault_Handler(void)
+{
+  /* USER CODE BEGIN HardFault_IRQn 0 */
+
+  /* USER CODE END HardFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_HardFault_IRQn 0 */
+    /* USER CODE END W1_HardFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Memory management fault.
+  */
+void MemManage_Handler(void)
+{
+  /* USER CODE BEGIN MemoryManagement_IRQn 0 */
+
+  /* USER CODE END MemoryManagement_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
+    /* USER CODE END W1_MemoryManagement_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Prefetch fault, memory access fault.
+  */
+void BusFault_Handler(void)
+{
+  /* USER CODE BEGIN BusFault_IRQn 0 */
+
+  /* USER CODE END BusFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_BusFault_IRQn 0 */
+    /* USER CODE END W1_BusFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Undefined instruction or illegal state.
+  */
+void UsageFault_Handler(void)
+{
+  /* USER CODE BEGIN UsageFault_IRQn 0 */
+
+  /* USER CODE END UsageFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_UsageFault_IRQn 0 */
+    /* USER CODE END W1_UsageFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles System service call via SWI instruction.
+  */
+void SVC_Handler(void)
+{
+  /* USER CODE BEGIN SVCall_IRQn 0 */
+
+  /* USER CODE END SVCall_IRQn 0 */
+  /* USER CODE BEGIN SVCall_IRQn 1 */
+
+  /* USER CODE END SVCall_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Debug monitor.
+  */
+void DebugMon_Handler(void)
+{
+  /* USER CODE BEGIN DebugMonitor_IRQn 0 */
+
+  /* USER CODE END DebugMonitor_IRQn 0 */
+  /* USER CODE BEGIN DebugMonitor_IRQn 1 */
+
+  /* USER CODE END DebugMonitor_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Pendable request for system service.
+  */
+void PendSV_Handler(void)
+{
+  /* USER CODE BEGIN PendSV_IRQn 0 */
+
+  /* USER CODE END PendSV_IRQn 0 */
+  /* USER CODE BEGIN PendSV_IRQn 1 */
+
+  /* USER CODE END PendSV_IRQn 1 */
+}
+
+/**
+  * @brief This function handles System tick timer.
+  */
+void SysTick_Handler(void)
+{
+  /* USER CODE BEGIN SysTick_IRQn 0 */
+
+  /* USER CODE END SysTick_IRQn 0 */
+  HAL_IncTick();
+  /* USER CODE BEGIN SysTick_IRQn 1 */
+
+  /* USER CODE END SysTick_IRQn 1 */
+}
+
+/******************************************************************************/
+/* STM32WBxx Peripheral Interrupt Handlers                                    */
+/* Add here the Interrupt Handlers for the used peripherals.                  */
+/* For the available peripheral interrupt handler names,                      */
+/* please refer to the startup file (startup_stm32wbxx.s).                    */
+/******************************************************************************/
+
+/**
+  * @brief This function handles PVD/PVM0/PVM2 interrupts through EXTI lines 16/31/33.
+  */
+void PVD_PVM_IRQHandler(void)
+{
+  /* USER CODE BEGIN PVD_PVM_IRQn 0 */
+
+  /* USER CODE END PVD_PVM_IRQn 0 */
+  HAL_PWREx_PVD_PVM_IRQHandler();
+  /* USER CODE BEGIN PVD_PVM_IRQn 1 */
+
+  /* USER CODE END PVD_PVM_IRQn 1 */
+}
+
+/**
+  * @brief This function handles RTC wake-up interrupt through EXTI line 19.
+  */
+void RTC_WKUP_IRQHandler(void)
+{
+  /* USER CODE BEGIN RTC_WKUP_IRQn 0 */
+
+  /* USER CODE END RTC_WKUP_IRQn 0 */
+  HAL_RTCEx_WakeUpTimerIRQHandler(&hrtc);
+  /* USER CODE BEGIN RTC_WKUP_IRQn 1 */
+
+  /* USER CODE END RTC_WKUP_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Flash global interrupt.
+  */
+void FLASH_IRQHandler(void)
+{
+  /* USER CODE BEGIN FLASH_IRQn 0 */
+
+  /* USER CODE END FLASH_IRQn 0 */
+  HAL_FLASH_IRQHandler();
+  /* USER CODE BEGIN FLASH_IRQn 1 */
+
+  /* USER CODE END FLASH_IRQn 1 */
+}
+
+/**
+  * @brief This function handles RCC global interrupt.
+  */
+void RCC_IRQHandler(void)
+{
+  /* USER CODE BEGIN RCC_IRQn 0 */
+
+  /* USER CODE END RCC_IRQn 0 */
+  /* USER CODE BEGIN RCC_IRQn 1 */
+
+  /* USER CODE END RCC_IRQn 1 */
+}
+
+/**
+  * @brief This function handles DMA1 channel1 global interrupt.
+  */
+void DMA1_Channel1_IRQHandler(void)
+{
+  /* USER CODE BEGIN DMA1_Channel1_IRQn 0 */
+
+  /* USER CODE END DMA1_Channel1_IRQn 0 */
+  HAL_DMA_IRQHandler(&hdma_lpuart1_tx);
+  /* USER CODE BEGIN DMA1_Channel1_IRQn 1 */
+
+  /* USER CODE END DMA1_Channel1_IRQn 1 */
+}
+
+/**
+  * @brief This function handles DMA1 channel2 global interrupt.
+  */
+void DMA1_Channel2_IRQHandler(void)
+{
+  /* USER CODE BEGIN DMA1_Channel2_IRQn 0 */
+
+  /* USER CODE END DMA1_Channel2_IRQn 0 */
+  HAL_DMA_IRQHandler(&hdma_usart1_tx);
+  /* USER CODE BEGIN DMA1_Channel2_IRQn 1 */
+
+  /* USER CODE END DMA1_Channel2_IRQn 1 */
+}
+
+/**
+  * @brief This function handles CPU2 SEV interrupt through EXTI line 40 and PWR CPU2 HOLD wake-up interrupt.
+  */
+void C2SEV_PWR_C2H_IRQHandler(void)
+{
+  /* USER CODE BEGIN C2SEV_PWR_C2H_IRQn 0 */
+
+  /* USER CODE END C2SEV_PWR_C2H_IRQn 0 */
+  /* USER CODE BEGIN C2SEV_PWR_C2H_IRQn 1 */
+
+  /* USER CODE END C2SEV_PWR_C2H_IRQn 1 */
+}
+
+/**
+  * @brief This function handles USART1 global interrupt.
+  */
+void USART1_IRQHandler(void)
+{
+  /* USER CODE BEGIN USART1_IRQn 0 */
+
+  /* USER CODE END USART1_IRQn 0 */
+  HAL_UART_IRQHandler(&huart1);
+  /* USER CODE BEGIN USART1_IRQn 1 */
+
+  /* USER CODE END USART1_IRQn 1 */
+}
+
+/**
+  * @brief This function handles LPUART1 global interrupt.
+  */
+void LPUART1_IRQHandler(void)
+{
+  /* USER CODE BEGIN LPUART1_IRQn 0 */
+
+  /* USER CODE END LPUART1_IRQn 0 */
+  HAL_UART_IRQHandler(&hlpuart1);
+  /* USER CODE BEGIN LPUART1_IRQn 1 */
+
+  /* USER CODE END LPUART1_IRQn 1 */
+}
+
+/**
+  * @brief This function handles PWR switching on the fly, end of BLE activity, end of 802.15.4 activity, end of critical radio phase interrupt.
+  */
+void PWR_SOTF_BLEACT_802ACT_RFPHASE_IRQHandler(void)
+{
+  /* USER CODE BEGIN PWR_SOTF_BLEACT_802ACT_RFPHASE_IRQn 0 */
+
+  /* USER CODE END PWR_SOTF_BLEACT_802ACT_RFPHASE_IRQn 0 */
+  /* USER CODE BEGIN PWR_SOTF_BLEACT_802ACT_RFPHASE_IRQn 1 */
+
+  /* USER CODE END PWR_SOTF_BLEACT_802ACT_RFPHASE_IRQn 1 */
+}
+
+/**
+  * @brief This function handles IPCC RX occupied interrupt.
+  */
+void IPCC_C1_RX_IRQHandler(void)
+{
+  /* USER CODE BEGIN IPCC_C1_RX_IRQn 0 */
+
+  /* USER CODE END IPCC_C1_RX_IRQn 0 */
+  HAL_IPCC_RX_IRQHandler(&hipcc);
+  /* USER CODE BEGIN IPCC_C1_RX_IRQn 1 */
+
+  /* USER CODE END IPCC_C1_RX_IRQn 1 */
+}
+
+/**
+  * @brief This function handles IPCC TX free interrupt.
+  */
+void IPCC_C1_TX_IRQHandler(void)
+{
+  /* USER CODE BEGIN IPCC_C1_TX_IRQn 0 */
+
+  /* USER CODE END IPCC_C1_TX_IRQn 0 */
+  HAL_IPCC_TX_IRQHandler(&hipcc);
+  /* USER CODE BEGIN IPCC_C1_TX_IRQn 1 */
+
+  /* USER CODE END IPCC_C1_TX_IRQn 1 */
+}
+
+/**
+  * @brief This function handles HSEM global interrupt.
+  */
+void HSEM_IRQHandler(void)
+{
+  /* USER CODE BEGIN HSEM_IRQn 0 */
+
+  /* USER CODE END HSEM_IRQn 0 */
+  HAL_HSEM_IRQHandler();
+  /* USER CODE BEGIN HSEM_IRQn 1 */
+
+  /* USER CODE END HSEM_IRQn 1 */
+}
+
+/**
+  * @brief This function handles FPU global interrupt.
+  */
+void FPU_IRQHandler(void)
+{
+  /* USER CODE BEGIN FPU_IRQn 0 */
+
+  /* USER CODE END FPU_IRQn 0 */
+  /* USER CODE BEGIN FPU_IRQn 1 */
+
+  /* USER CODE END FPU_IRQn 1 */
+}
+
+/* USER CODE BEGIN 1 */
+
+
+/**
+  * @brief  This function handles External External line 4 interrupt request.
+  * @param  None
+  * @retval None
+  */
+void EXTI4_IRQHandler(void)
+{
+  HAL_GPIO_EXTI_IRQHandler(BUTTON_SW1_PIN);
+}
+
+/**
+  * @brief  This function handles External External line 0 interrupt request.
+  * @param  None
+  * @retval None
+  */
+void EXTI0_IRQHandler(void)
+{
+  HAL_GPIO_EXTI_IRQHandler(BUTTON_SW2_PIN);
+}
+
+/**
+  * @brief  This function handles External External line 1 interrupt request.
+  * @param  None
+  * @retval None
+  */
+void EXTI1_IRQHandler(void)
+{
+  HAL_GPIO_EXTI_IRQHandler(BUTTON_SW3_PIN);
+}
+
+/* USER CODE END 1 */

Core/Src/stm_logging.c

@@ -0,0 +1,203 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    stm_logging.c
+  * @author  MCD Application Team
+  * @brief   This file contains all the defines and functions used
+  *                     for logging on Application examples.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019-2023 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/**
+ * @file
+ *   This file implements logging functions to be used in Application examples.
+ *
+ */
+
+#include <ctype.h>
+#include <inttypes.h>
+#include <stdarg.h>
+#include <stdio.h>
+#include <stdint.h>
+#include <string.h>
+
+#include "app_conf.h"
+#include "stm_logging.h"
+
+#define LOG_PARSE_BUFFER_SIZE  256U
+
+#define LOG_TIMESTAMP_ENABLE 0
+#define LOG_REGION_ENABLE 1U
+#define LOG_RTT_COLOR_ENABLE 1U
+
+#if (LOG_RTT_COLOR_ENABLE == 1U)
+#define RTT_COLOR_CODE_DEFAULT "\x1b[0m"
+#define RTT_COLOR_CODE_RED     "\x1b[0;91m"
+#define RTT_COLOR_CODE_GREEN   "\x1b[0;92m"
+#define RTT_COLOR_CODE_YELLOW  "\x1b[0;93m"
+#define RTT_COLOR_CODE_CYAN    "\x1b[0;96m"
+
+#else /* LOG_RTT_COLOR_ENABLE == 1 */
+#define RTT_COLOR_CODE_DEFAULT ""
+#define RTT_COLOR_CODE_RED     ""
+#define RTT_COLOR_CODE_GREEN   ""
+#define RTT_COLOR_CODE_YELLOW  ""
+#define RTT_COLOR_CODE_CYAN    ""
+#endif /* LOG_RTT_COLOR_ENABLE == 1 */
+
+#if (CFG_DEBUG_TRACE != 0)
+/**
+ * Function for outputting code region string.
+ *
+ * @param[input]  aLogString  Pointer to log buffer.
+ * @param[in]     aMaxSize    Maximum size of log buffer.
+ * @param[in]     otLogRegion The region ID.
+ *
+ * @returns  String with a log level color value.
+ */
+static inline uint16_t logRegion(char *aLogString, uint16_t aMaxSize,
+        appliLogRegion_t aLogRegion)
+{
+  char logRegionString[30U];
+
+  switch (aLogRegion)
+  {
+    case APPLI_LOG_REGION_GENERAL:
+      strcpy(logRegionString, "[M4 APPLICATION]");
+      break;
+    case APPLI_LOG_REGION_ZIGBEE_API:
+      strcpy(logRegionString, "[M4 ZIGBEE API]");
+      break;
+    default:
+      strcpy(logRegionString, "[M4]");
+      break;
+  }
+
+  return snprintf(aLogString, aMaxSize, "%s ", logRegionString);
+}
+#endif /* CFG_DEBUG_TRACE */
+
+#if (LOG_RTT_COLOR_ENABLE == 1U)
+#if (CFG_DEBUG_TRACE != 0)
+/**
+ * Function for getting color of a given level log.
+ *
+ * @param[in]  aLogLevel The log level.
+ *
+ * @returns  String with a log level color value.
+ */
+static inline const char *levelToString(appliLogLevel_t aLogLevel)
+{
+  switch (aLogLevel)
+  {
+  case LOG_LEVEL_CRIT:
+    return RTT_COLOR_CODE_RED;
+
+  case LOG_LEVEL_WARN:
+    return RTT_COLOR_CODE_YELLOW;
+
+  case LOG_LEVEL_INFO:
+    return RTT_COLOR_CODE_GREEN;
+
+  case LOG_LEVEL_DEBG:
+  default:
+    return RTT_COLOR_CODE_DEFAULT;
+  }
+}
+#endif /* CFG_DEBUG_TRACE */
+
+#if (CFG_DEBUG_TRACE != 0)
+/**
+ * Function for printing log level.
+ *
+ * @param[input]  aLogString  Pointer to log buffer.
+ * @param[in]     aMaxSize    Maximum size of log buffer.
+ * @param[in]     aLogLevel   Log level.
+ *
+ * @returns  Number of bytes successfully written to the log buffer.
+ */
+static inline uint16_t logLevel(char *aLogString, uint16_t aMaxSize,
+                                appliLogLevel_t aLogLevel)
+{
+  return snprintf(aLogString, aMaxSize, "%s", levelToString(aLogLevel));
+}
+#endif /* CFG_DEBUG_TRACE */
+#endif /* LOG_RTT_COLOR_ENABLE */
+
+#if (LOG_TIMESTAMP_ENABLE == 1U)
+/**
+ * Function for printing actual timestamp.
+ *
+ * @param[input]  aLogString Pointer to the log buffer.
+ * @param[in]     aMaxSize   Maximum size of the log buffer.
+ *
+ * @returns  Number of bytes successfully written to the log buffer.
+ */
+static inline uint16_t logTimestamp(char *aLogString, uint16_t aMaxSize)
+{
+  return snprintf(aLogString, aMaxSize, "%s[%010ld]", RTT_COLOR_CODE_DEFAULT,
+                  HAL_GetTick());
+}
+#endif /* LOG_TIMESTAMP_ENABLE */
+
+/**
+ * Function for printing application log
+ *
+ * @param[in]     aLogLevel   Log level.
+ * @param[in]     aLogRegion  The region ID.
+ * @param[in]     aFormat     User string format.
+ *
+ * @returns  Number of bytes successfully written to the log buffer.
+ */
+void logApplication(appliLogLevel_t aLogLevel, appliLogRegion_t aLogRegion, const char *aFormat, ...)
+{
+#if (CFG_DEBUG_TRACE != 0) /* Since the traces are disabled, there is nothing to print */
+  uint16_t length = 0;
+  char logString[LOG_PARSE_BUFFER_SIZE + 1U];
+
+#if (LOG_TIMESTAMP_ENABLE == 1U)
+  length += logTimestamp(logString, LOG_PARSE_BUFFER_SIZE);
+#endif
+
+#if (LOG_RTT_COLOR_ENABLE == 1U)
+  /* Add level information */
+  length += logLevel(&logString[length], (LOG_PARSE_BUFFER_SIZE - length),
+      aLogLevel);
+#endif
+
+#if (LOG_REGION_ENABLE == 1U)
+  /* Add Region information */
+  length += logRegion(&logString[length], (LOG_PARSE_BUFFER_SIZE - length),
+      aLogRegion);
+#endif
+
+  /* Parse user string */
+  va_list paramList;
+  va_start(paramList, aFormat);
+  length += vsnprintf(&logString[length], (LOG_PARSE_BUFFER_SIZE - length),
+      aFormat, paramList);
+  logString[length++] = '\r';
+  logString[length++] = '\n';
+  logString[length++] = 0;
+  va_end(paramList);
+
+  if (aLogLevel <= APPLI_CONFIG_LOG_LEVEL)
+  {
+    printf("%s", logString);
+  }else
+  {
+    /* Print nothing */
+  }
+#endif /* CFG_DEBUG_TRACE */
+}

Core/Src/system_stm32wbxx.c

@@ -0,0 +1,366 @@
+/**
+  ******************************************************************************
+  * @file    system_stm32wbxx.c
+  * @author  MCD Application Team
+  * @brief   CMSIS Cortex Device Peripheral Access Layer System Source File
+  *
+  *   This file provides two functions and one global variable to be called from
+  *   user application:
+  *      - SystemInit(): This function is called at startup just after reset and
+  *                      before branch to main program. This call is made inside
+  *                      the "startup_stm32wbxx.s" file.
+  *
+  *      - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
+  *                                  by the user application to setup the SysTick
+  *                                  timer or configure other parameters.
+  *
+  *      - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
+  *                                 be called whenever the core clock is changed
+  *                                 during program execution.
+  *
+  *   After each device reset the MSI (4 MHz) is used as system clock source.
+  *   Then SystemInit() function is called, in "startup_stm32wbxx.s" file, to
+  *   configure the system clock before to branch to main program.
+  *
+  *   This file configures the system clock as follows:
+  *=============================================================================
+  *-----------------------------------------------------------------------------
+  *        System Clock source                    | MSI
+  *-----------------------------------------------------------------------------
+  *        SYSCLK(Hz)                             | 4000000
+  *-----------------------------------------------------------------------------
+  *        HCLK(Hz)                               | 4000000
+  *-----------------------------------------------------------------------------
+  *        AHB Prescaler                          | 1
+  *-----------------------------------------------------------------------------
+  *        APB1 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        APB2 Prescaler                         | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_M                                  | 1
+  *-----------------------------------------------------------------------------
+  *        PLL_N                                  | 8
+  *-----------------------------------------------------------------------------
+  *        PLL_P                                  | 7
+  *-----------------------------------------------------------------------------
+  *        PLL_Q                                  | 2
+  *-----------------------------------------------------------------------------
+  *        PLL_R                                  | 2
+  *-----------------------------------------------------------------------------
+  *        PLLSAI1_P                              | NA
+  *-----------------------------------------------------------------------------
+  *        PLLSAI1_Q                              | NA
+  *-----------------------------------------------------------------------------
+  *        PLLSAI1_R                              | NA
+  *-----------------------------------------------------------------------------
+  *        Require 48MHz for USB OTG FS,          | Disabled
+  *        SDIO and RNG clock                     |
+  *-----------------------------------------------------------------------------
+  *=============================================================================
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2020-2021 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/** @addtogroup CMSIS
+  * @{
+  */
+
+/** @addtogroup stm32WBxx_system
+  * @{
+  */
+
+/** @addtogroup stm32WBxx_System_Private_Includes
+  * @{
+  */
+
+#include "stm32wbxx.h"
+
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE    (32000000UL) /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (MSI_VALUE)
+   #define MSI_VALUE    (4000000UL) /*!< Value of the Internal oscillator in Hz*/
+#endif /* MSI_VALUE */
+
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    (16000000UL) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+#if !defined  (LSI_VALUE) 
+ #define LSI_VALUE  (32000UL)       /*!< Value of LSI in Hz*/
+#endif /* LSI_VALUE */ 
+
+#if !defined  (LSE_VALUE)
+  #define LSE_VALUE    (32768UL)    /*!< Value of LSE in Hz*/
+#endif /* LSE_VALUE */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32WBxx_System_Private_TypesDefinitions
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32WBxx_System_Private_Defines
+  * @{
+  */
+
+/* Note: Following vector table addresses must be defined in line with linker
+         configuration. */
+/*!< Uncomment the following line if you need to relocate CPU1 CM4 and/or CPU2
+     CM0+ vector table anywhere in Sram or Flash. Else vector table will be kept
+     at address 0x00 which correspond to automatic remap of boot address selected */
+/* #define USER_VECT_TAB_ADDRESS */
+#if defined(USER_VECT_TAB_ADDRESS)
+ /*!< Uncomment this line for user vector table remap in Sram else user remap
+      will be done in Flash. */
+/* #define VECT_TAB_SRAM */
+#if defined(VECT_TAB_SRAM)
+#define VECT_TAB_BASE_ADDRESS   SRAM1_BASE      /*!< Vector Table base address field.
+                                                     This value must be a multiple of 0x200. */
+#define VECT_TAB_OFFSET         0x00000000U     /*!< Vector Table base offset field.
+                                                     This value must be a multiple of 0x200. */
+#else
+#define VECT_TAB_BASE_ADDRESS   FLASH_BASE      /*!< Vector Table base address field.
+                                                     This value must be a multiple of 0x200. */
+#define VECT_TAB_OFFSET         0x00000000U     /*!< Vector Table base offset field.
+                                                     This value must be a multiple of 0x200. */
+#endif
+#endif
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32WBxx_System_Private_Macros
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32WBxx_System_Private_Variables
+  * @{
+  */
+  /* The SystemCoreClock variable is updated in three ways:
+      1) by calling CMSIS function SystemCoreClockUpdate()
+      2) by calling HAL API function HAL_RCC_GetHCLKFreq()
+      3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
+         Note: If you use this function to configure the system clock; then there
+               is no need to call the 2 first functions listed above, since SystemCoreClock
+               variable is updated automatically.
+  */
+  uint32_t SystemCoreClock  = 4000000UL ; /*CPU1: M4 on MSI clock after startup (4MHz)*/
+
+  const uint32_t AHBPrescTable[16UL] = {1UL, 3UL, 5UL, 1UL, 1UL, 6UL, 10UL, 32UL, 2UL, 4UL, 8UL, 16UL, 64UL, 128UL, 256UL, 512UL};
+
+  const uint32_t APBPrescTable[8UL]  = {0UL, 0UL, 0UL, 0UL, 1UL, 2UL, 3UL, 4UL};
+
+  const uint32_t MSIRangeTable[16UL] = {100000UL, 200000UL, 400000UL, 800000UL, 1000000UL, 2000000UL, \
+                                      4000000UL, 8000000UL, 16000000UL, 24000000UL, 32000000UL, 48000000UL, 0UL, 0UL, 0UL, 0UL}; /* 0UL values are incorrect cases */
+
+#if defined(STM32WB55xx) || defined(STM32WB5Mxx) || defined(STM32WB35xx) || defined (STM32WB15xx)
+  const uint32_t SmpsPrescalerTable[4UL][6UL]={{1UL,3UL,2UL,2UL,1UL,2UL}, \
+                                        {2UL,6UL,4UL,3UL,2UL,4UL}, \
+                                        {4UL,12UL,8UL,6UL,4UL,8UL}, \
+                                        {4UL,12UL,8UL,6UL,4UL,8UL}};
+#endif
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32WBxx_System_Private_FunctionPrototypes
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32WBxx_System_Private_Functions
+  * @{
+  */
+
+/**
+  * @brief  Setup the microcontroller system.
+  * @param  None
+  * @retval None
+  */
+void SystemInit(void)
+{
+#if defined(USER_VECT_TAB_ADDRESS)
+  /* Configure the Vector Table location add offset address ------------------*/
+  SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET;
+#endif
+
+  /* FPU settings ------------------------------------------------------------*/
+  #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+    SCB->CPACR |= ((3UL << (10UL*2UL))|(3UL << (11UL*2UL)));  /* set CP10 and CP11 Full Access */
+  #endif
+  
+  /* Reset the RCC clock configuration to the default reset state ------------*/
+  /* Set MSION bit */
+  RCC->CR |= RCC_CR_MSION;
+
+  /* Reset CFGR register */
+  RCC->CFGR = 0x00070000U;
+
+  /* Reset PLLSAI1ON, PLLON, HSECSSON, HSEON, HSION, and MSIPLLON bits */
+  RCC->CR &= (uint32_t)0xFAF6FEFBU;
+
+  /*!< Reset LSI1 and LSI2 bits */
+  RCC->CSR &= (uint32_t)0xFFFFFFFAU;
+  
+  /*!< Reset HSI48ON  bit */
+  RCC->CRRCR &= (uint32_t)0xFFFFFFFEU;
+    
+  /* Reset PLLCFGR register */
+  RCC->PLLCFGR = 0x22041000U;
+
+#if defined(STM32WB55xx) || defined(STM32WB5Mxx)
+  /* Reset PLLSAI1CFGR register */
+  RCC->PLLSAI1CFGR = 0x22041000U;
+#endif
+  
+  /* Reset HSEBYP bit */
+  RCC->CR &= 0xFFFBFFFFU;
+
+  /* Disable all interrupts */
+  RCC->CIER = 0x00000000;
+}
+
+/**
+  * @brief  Update SystemCoreClock variable according to Clock Register Values.
+  *         The SystemCoreClock variable contains the core clock (HCLK), it can
+  *         be used by the user application to setup the SysTick timer or configure
+  *         other parameters.
+  *
+  * @note   Each time the core clock (HCLK) changes, this function must be called
+  *         to update SystemCoreClock variable value. Otherwise, any configuration
+  *         based on this variable will be incorrect.
+  *
+  * @note   - The system frequency computed by this function is not the real
+  *           frequency in the chip. It is calculated based on the predefined
+  *           constant and the selected clock source:
+  *
+  *           - If SYSCLK source is MSI, SystemCoreClock will contain the MSI_VALUE(*)
+  *
+  *           - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**)
+  *
+  *           - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***)
+  *
+  *           - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(***)
+  *             or HSI_VALUE(*) or MSI_VALUE(*) multiplied/divided by the PLL factors.
+  *
+  *         (*) MSI_VALUE is a constant defined in stm32wbxx_hal.h file (default value
+  *             4 MHz) but the real value may vary depending on the variations
+  *             in voltage and temperature.
+  *
+  *         (**) HSI_VALUE is a constant defined in stm32wbxx_hal_conf.h file (default value
+  *              16 MHz) but the real value may vary depending on the variations
+  *              in voltage and temperature.
+  *
+  *         (***) HSE_VALUE is a constant defined in stm32wbxx_hal_conf.h file (default value
+  *              32 MHz), user has to ensure that HSE_VALUE is same as the real
+  *              frequency of the crystal used. Otherwise, this function may
+  *              have wrong result.
+  *
+  *         - The result of this function could be not correct when using fractional
+  *           value for HSE crystal.
+  *
+  * @param  None
+  * @retval None
+  */
+void SystemCoreClockUpdate(void)
+{
+  uint32_t tmp, msirange, pllvco, pllr, pllsource , pllm;
+
+  /* Get MSI Range frequency--------------------------------------------------*/
+
+  /*MSI frequency range in Hz*/
+  msirange = MSIRangeTable[(RCC->CR & RCC_CR_MSIRANGE) >> RCC_CR_MSIRANGE_Pos];
+
+  /* Get SYSCLK source -------------------------------------------------------*/
+  switch (RCC->CFGR & RCC_CFGR_SWS)
+  {
+    case 0x00:   /* MSI used as system clock source */
+      SystemCoreClock = msirange;
+      break;
+
+    case 0x04:  /* HSI used as system clock source */
+      /* HSI used as system clock source */
+        SystemCoreClock = HSI_VALUE;
+      break;
+
+    case 0x08:  /* HSE used as system clock source */
+      SystemCoreClock = HSE_VALUE;
+      break;
+
+    case 0x0C: /* PLL used as system clock  source */
+      /* PLL_VCO = (HSE_VALUE or HSI_VALUE or MSI_VALUE/ PLLM) * PLLN
+         SYSCLK = PLL_VCO / PLLR
+         */
+      pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC);
+      pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> RCC_PLLCFGR_PLLM_Pos) + 1UL ;
+
+      if(pllsource == 0x02UL) /* HSI used as PLL clock source */
+      {
+        pllvco = (HSI_VALUE / pllm);
+      }
+      else if(pllsource == 0x03UL) /* HSE used as PLL clock source */
+      {
+        pllvco = (HSE_VALUE / pllm);
+      }
+      else /* MSI used as PLL clock source */
+      {
+        pllvco = (msirange / pllm);
+      }
+      
+      pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos);
+      pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> RCC_PLLCFGR_PLLR_Pos) + 1UL);
+      
+      SystemCoreClock = pllvco/pllr;
+      break;
+
+    default:
+      SystemCoreClock = msirange;
+      break;
+  }
+  
+  /* Compute HCLK clock frequency --------------------------------------------*/
+  /* Get HCLK1 prescaler */
+  tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> RCC_CFGR_HPRE_Pos)];
+  /* HCLK clock frequency */
+  SystemCoreClock = SystemCoreClock / tmp;
+
+}
+
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */

EWARM/Project.eww

@@ -0,0 +1,7 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<workspace>
+    <project>
+        <path>$WS_DIR$\Zigbee_OnOff_Server_Coord.ewp</path>
+    </project>
+    <batchBuild />
+</workspace>

EWARM/Zigbee_OnOff_Server_Coord.ewd

@@ -0,0 +1,1534 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+    <fileVersion>3</fileVersion>
+    <configuration>
+        <name>Zigbee_OnOff_Server_Coord</name>
+        <toolchain>
+            <name>ARM</name>
+        </toolchain>
+        <debug>1</debug>
+        <settings>
+            <name>C-SPY</name>
+            <archiveVersion>2</archiveVersion>
+            <data>
+                <version>32</version>
+                <wantNonLocal>1</wantNonLocal>
+                <debug>1</debug>
+                <option>
+                    <name>CInput</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CEndian</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CProcessor</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>OCVariant</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>MacOverride</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>MacFile</name>
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+                    <name>RunToName</name>
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+                    <name>OCDownloadVerifyAll</name>
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+                    <name>OCImagesPath1</name>
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+                <version>1</version>
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+                    <name>OCSimEnablePSP</name>
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+                    <name>OCSimPspOverrideConfig</name>
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+                    <name>OCSimPspConfigFile</name>
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+            <name>CADI_ID</name>
+            <archiveVersion>2</archiveVersion>
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+                <version>0</version>
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+                    <name>CCadiMemory</name>
+                    <state>1</state>
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+                <option>
+                    <name>Fast Model</name>
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+                <option>
+                    <name>CCADILogFileCheck</name>
+                    <state>0</state>
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+                <option>
+                    <name>CCADILogFileEditB</name>
+                    <state>$PROJ_DIR$\cspycomm.log</state>
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+                <option>
+                    <name>OCDriverInfo</name>
+                    <state>1</state>
+                </option>
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+        <settings>
+            <name>CMSISDAP_ID</name>
+            <archiveVersion>2</archiveVersion>
+            <data>
+                <version>4</version>
+                <wantNonLocal>1</wantNonLocal>
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+                    <name>OCDriverInfo</name>
+                    <state>1</state>
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+                    <name>OCIarProbeScriptFile</name>
+                    <state>1</state>
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+                    <name>CMSISDAPResetList</name>
+                    <version>1</version>
+                    <state>10</state>
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+                    <state>300</state>
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+                    <name>CMSISDAPHWResetDelay</name>
+                    <state>200</state>
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+                    <name>CMSISDAPDoLogfile</name>
+                    <state>0</state>
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+                    <name>CMSISDAPLogFile</name>
+                    <state>$PROJ_DIR$\cspycomm.log</state>
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+                    <name>CMSISDAPInterfaceRadio</name>
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+                    <name>CMSISDAPInterfaceCmdLine</name>
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+                    <name>CMSISDAPMultiTargetEnable</name>
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+                    <name>CMSISDAPMultiTarget</name>
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+                    <name>CMSISDAPJtagSpeedList</name>
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+                    <state>0</state>
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+                    <name>CMSISDAPBreakpointRadio</name>
+                    <state>0</state>
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+                <option>
+                    <name>CMSISDAPRestoreBreakpointsCheck</name>
+                    <state>0</state>
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+                <option>
+                    <name>CMSISDAPUpdateBreakpointsEdit</name>
+                    <state>_call_main</state>
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+                    <name>RDICatchReset</name>
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+                    <name>RDICatchUndef</name>
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+                    <name>RDICatchSWI</name>
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+                    <name>RDICatchData</name>
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+                    <name>RDICatchPrefetch</name>
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+                    <name>RDICatchFIQ</name>
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+                    <name>CMSISDAPMultiCPUEnable</name>
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+                    <name>CMSISDAPMultiCPUNumber</name>
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+                    <name>CMSISDAPProbeConfigRadio</name>
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+                    <name>CMSISDAPSelectedCPUBehaviour</name>
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+                    <name>ICpuName</name>
+                    <state />
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+                <option>
+                    <name>OCJetEmuParams</name>
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+                    <name>CCCMSISDAPUsbSerialNo</name>
+                    <state />
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+                <option>
+                    <name>CCCMSISDAPUsbSerialNoSelect</name>
+                    <state>0</state>
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+                    <state>1</state>
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+                    <name>TCPIP</name>
+                    <state>aaa.bbb.ccc.ddd</state>
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+                    <name>DoLogfile</name>
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+                <option>
+                    <name>LogFile</name>
+                    <state>$PROJ_DIR$\cspycomm.log</state>
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+                    <name>CCJTagBreakpointRadio</name>
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+                    <name>CCJTagDoUpdateBreakpoints</name>
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+                <option>
+                    <name>CCJTagUpdateBreakpoints</name>
+                    <state>_call_main</state>
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+            <archiveVersion>2</archiveVersion>
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+                    <state>300</state>
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+                    <state>200</state>
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+                    <name>IjetPowerFromProbe</name>
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+                    <name>IjetInterfaceCmdLine</name>
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+                    <name>IjetMultiTargetEnable</name>
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+                    <name>IjetJtagSpeedList</name>
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+                    <name>IjetProtocolRadio</name>
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+                    <name>IjetSwoPin</name>
+                    <state>0</state>
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+                    <name>IjetCpuClockEdit</name>
+                    <state />
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+                    <name>IjetSwoPrescalerList</name>
+                    <version>1</version>
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+                    <name>IjetRestoreBreakpointsCheck</name>
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+                <option>
+                    <name>IjetUpdateBreakpointsEdit</name>
+                    <state>_call_main</state>
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+                    <name>RDICatchReset</name>
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+                <wantNonLocal>1</wantNonLocal>
+                <debug>1</debug>
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+                    <state>1000</state>
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+                    <state>aaa.bbb.ccc.ddd</state>
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+                    <name>CCUSBDevice</name>
+                    <version>1</version>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CCRDICatchReset</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCRDICatchUndef</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCRDICatchSWI</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCRDICatchData</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCRDICatchPrefetch</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCRDICatchIRQ</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCRDICatchFIQ</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCJLinkBreakpointRadio</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCJLinkDoUpdateBreakpoints</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCJLinkUpdateBreakpoints</name>
+                    <state>_call_main</state>
+                </option>
+                <option>
+                    <name>CCJLinkInterfaceRadio</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCJLinkResetList</name>
+                    <version>6</version>
+                    <state>5</state>
+                </option>
+                <option>
+                    <name>CCJLinkInterfaceCmdLine</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCCatchCORERESET</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCCatchMMERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCCatchNOCPERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCCatchCHRERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCCatchSTATERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCCatchBUSERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCCatchINTERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCCatchSFERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCCatchHARDERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCCatchDummy</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OCJLinkScriptFile</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CCJLinkUsbSerialNo</name>
+                    <state />
+                </option>
+                <option>
+                    <name>CCTcpIpAlt</name>
+                    <version>0</version>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCJLinkTcpIpSerialNo</name>
+                    <state />
+                </option>
+                <option>
+                    <name>CCCpuClockEdit</name>
+                    <state />
+                </option>
+                <option>
+                    <name>CCSwoClockAuto</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCSwoClockEdit</name>
+                    <state>2000</state>
+                </option>
+                <option>
+                    <name>OCJLinkTraceSource</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OCJLinkTraceSourceDummy</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OCJLinkDeviceName</name>
+                    <state>1</state>
+                </option>
+            </data>
+        </settings>
+        <settings>
+            <name>LMIFTDI_ID</name>
+            <archiveVersion>2</archiveVersion>
+            <data>
+                <version>3</version>
+                <wantNonLocal>1</wantNonLocal>
+                <debug>1</debug>
+                <option>
+                    <name>OCDriverInfo</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>LmiftdiSpeed</name>
+                    <state>500</state>
+                </option>
+                <option>
+                    <name>CCLmiftdiDoLogfile</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCLmiftdiLogFile</name>
+                    <state>$PROJ_DIR$\cspycomm.log</state>
+                </option>
+                <option>
+                    <name>CCLmiFtdiInterfaceRadio</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCLmiFtdiInterfaceCmdLine</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCLmiftdiUsbSerialNo</name>
+                    <state />
+                </option>
+                <option>
+                    <name>CCLmiftdiUsbSerialNoSelect</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCLmiftdiResetList</name>
+                    <version>0</version>
+                    <state>0</state>
+                </option>
+            </data>
+        </settings>
+        <settings>
+            <name>NULINK_ID</name>
+            <archiveVersion>2</archiveVersion>
+            <data>
+                <version>0</version>
+                <wantNonLocal>1</wantNonLocal>
+                <debug>1</debug>
+                <option>
+                    <name>OCDriverInfo</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>DoLogfile</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>LogFile</name>
+                    <state>$PROJ_DIR$\cspycomm.log</state>
+                </option>
+            </data>
+        </settings>
+        <settings>
+            <name>PEMICRO_ID</name>
+            <archiveVersion>2</archiveVersion>
+            <data>
+                <version>3</version>
+                <wantNonLocal>1</wantNonLocal>
+                <debug>1</debug>
+                <option>
+                    <name>OCDriverInfo</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CCJPEMicroShowSettings</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>DoLogfile</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>LogFile</name>
+                    <state>$PROJ_DIR$\cspycomm.log</state>
+                </option>
+            </data>
+        </settings>
+        <settings>
+            <name>STLINK_ID</name>
+            <archiveVersion>2</archiveVersion>
+            <data>
+                <version>7</version>
+                <wantNonLocal>1</wantNonLocal>
+                <debug>1</debug>
+                <option>
+                    <name>OCDriverInfo</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CCSTLinkInterfaceRadio</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CCSTLinkInterfaceCmdLine</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCSTLinkResetList</name>
+                    <version>3</version>
+                    <state>4</state>
+                </option>
+                <option>
+                    <name>CCCpuClockEdit</name>
+                    <state>32.0</state>
+                </option>
+                <option>
+                    <name>CCSwoClockAuto</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCSwoClockEdit</name>
+                    <state>2000</state>
+                </option>
+                <option>
+                    <name>DoLogfile</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>LogFile</name>
+                    <state>$PROJ_DIR$\cspycomm.log</state>
+                </option>
+                <option>
+                    <name>CCSTLinkDoUpdateBreakpoints</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCSTLinkUpdateBreakpoints</name>
+                    <state>_call_main</state>
+                </option>
+                <option>
+                    <name>CCSTLinkCatchCORERESET</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCSTLinkCatchMMERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCSTLinkCatchNOCPERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCSTLinkCatchCHRERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCSTLinkCatchSTATERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCSTLinkCatchBUSERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCSTLinkCatchINTERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCSTLinkCatchSFERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCSTLinkCatchHARDERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCSTLinkCatchDummy</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCSTLinkUsbSerialNo</name>
+                    <state />
+                </option>
+                <option>
+                    <name>CCSTLinkUsbSerialNoSelect</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCSTLinkJtagSpeedList</name>
+                    <version>2</version>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCSTLinkDAPNumber</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCSTLinkDebugAccessPortRadio</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCSTLinkUseServerSelect</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCSTLinkProbeList</name>
+                    <version>1</version>
+                    <state>0</state>
+                </option>
+            </data>
+        </settings>
+        <settings>
+            <name>THIRDPARTY_ID</name>
+            <archiveVersion>2</archiveVersion>
+            <data>
+                <version>0</version>
+                <wantNonLocal>1</wantNonLocal>
+                <debug>1</debug>
+                <option>
+                    <name>CThirdPartyDriverDll</name>
+                    <state>###Uninitialized###</state>
+                </option>
+                <option>
+                    <name>CThirdPartyLogFileCheck</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CThirdPartyLogFileEditB</name>
+                    <state>$PROJ_DIR$\cspycomm.log</state>
+                </option>
+                <option>
+                    <name>OCDriverInfo</name>
+                    <state>1</state>
+                </option>
+            </data>
+        </settings>
+        <settings>
+            <name>TIFET_ID</name>
+            <archiveVersion>2</archiveVersion>
+            <data>
+                <version>1</version>
+                <wantNonLocal>1</wantNonLocal>
+                <debug>1</debug>
+                <option>
+                    <name>OCDriverInfo</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CCMSPFetResetList</name>
+                    <version>0</version>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCMSPFetInterfaceRadio</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCMSPFetInterfaceCmdLine</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCMSPFetTargetVccTypeDefault</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCMSPFetTargetVoltage</name>
+                    <state>###Uninitialized###</state>
+                </option>
+                <option>
+                    <name>CCMSPFetVCCDefault</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CCMSPFetTargetSettlingtime</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCMSPFetRadioJtagSpeedType</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CCMSPFetConnection</name>
+                    <version>0</version>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCMSPFetUsbComPort</name>
+                    <state>Automatic</state>
+                </option>
+                <option>
+                    <name>CCMSPFetAllowAccessToBSL</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCMSPFetDoLogfile</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCMSPFetLogFile</name>
+                    <state>$PROJ_DIR$\cspycomm.log</state>
+                </option>
+                <option>
+                    <name>CCMSPFetRadioEraseFlash</name>
+                    <state>1</state>
+                </option>
+            </data>
+        </settings>
+        <settings>
+            <name>XDS100_ID</name>
+            <archiveVersion>2</archiveVersion>
+            <data>
+                <version>9</version>
+                <wantNonLocal>1</wantNonLocal>
+                <debug>1</debug>
+                <option>
+                    <name>OCDriverInfo</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>TIPackageOverride</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>TIPackage</name>
+                    <state />
+                </option>
+                <option>
+                    <name>BoardFile</name>
+                    <state />
+                </option>
+                <option>
+                    <name>DoLogfile</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>LogFile</name>
+                    <state>$PROJ_DIR$\cspycomm.log</state>
+                </option>
+                <option>
+                    <name>CCXds100BreakpointRadio</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100DoUpdateBreakpoints</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100UpdateBreakpoints</name>
+                    <state>_call_main</state>
+                </option>
+                <option>
+                    <name>CCXds100CatchReset</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100CatchUndef</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100CatchSWI</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100CatchData</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100CatchPrefetch</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100CatchIRQ</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100CatchFIQ</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100CatchCORERESET</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100CatchMMERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100CatchNOCPERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100CatchCHRERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100CatchSTATERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100CatchBUSERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100CatchINTERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100CatchSFERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100CatchHARDERR</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100CatchDummy</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100CpuClockEdit</name>
+                    <state />
+                </option>
+                <option>
+                    <name>CCXds100SwoClockAuto</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100SwoClockEdit</name>
+                    <state>1000</state>
+                </option>
+                <option>
+                    <name>CCXds100HWResetDelay</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100ResetList</name>
+                    <version>0</version>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100UsbSerialNo</name>
+                    <state />
+                </option>
+                <option>
+                    <name>CCXds100UsbSerialNoSelect</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100JtagSpeedList</name>
+                    <version>0</version>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100InterfaceRadio</name>
+                    <state>2</state>
+                </option>
+                <option>
+                    <name>CCXds100InterfaceCmdLine</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100ProbeList</name>
+                    <version>0</version>
+                    <state>2</state>
+                </option>
+                <option>
+                    <name>CCXds100SWOPortRadio</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXds100SWOPort</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CCXDSTargetVccEnable</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCXDSTargetVoltage</name>
+                    <state>###Uninitialized###</state>
+                </option>
+                <option>
+                    <name>OCXDSDigitalStatesConfigFile</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>OCSelectedCoreName</name>
+                    <state>1</state>
+                </option>
+            </data>
+        </settings>
+        <debuggerPlugins>
+            <plugin>
+                <file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin</file>
+                <loadFlag>0</loadFlag>
+            </plugin>
+            <plugin>
+                <file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin</file>
+                <loadFlag>0</loadFlag>
+            </plugin>
+            <plugin>
+                <file>$TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin</file>
+                <loadFlag>0</loadFlag>
+            </plugin>
+            <plugin>
+                <file>$TOOLKIT_DIR$\plugins\rtos\FreeRtos\FreeRtosArmPlugin.ENU.ewplugin</file>
+                <loadFlag>0</loadFlag>
+            </plugin>
+            <plugin>
+                <file>$TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin.ENU.ewplugin</file>
+                <loadFlag>0</loadFlag>
+            </plugin>
+            <plugin>
+                <file>$TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin2.ENU.ewplugin</file>
+                <loadFlag>0</loadFlag>
+            </plugin>
+            <plugin>
+                <file>$TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin</file>
+                <loadFlag>0</loadFlag>
+            </plugin>
+            <plugin>
+                <file>$TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin</file>
+                <loadFlag>0</loadFlag>
+            </plugin>
+            <plugin>
+                <file>$TOOLKIT_DIR$\plugins\rtos\SMX\smxAwareIarArm9.ewplugin</file>
+                <loadFlag>0</loadFlag>
+            </plugin>
+            <plugin>
+                <file>$TOOLKIT_DIR$\plugins\rtos\SMX\smxAwareIarArm9BE.ewplugin</file>
+                <loadFlag>0</loadFlag>
+            </plugin>
+            <plugin>
+                <file>$TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin</file>
+                <loadFlag>0</loadFlag>
+            </plugin>
+            <plugin>
+                <file>$EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin</file>
+                <loadFlag>0</loadFlag>
+            </plugin>
+            <plugin>
+                <file>$EW_DIR$\common\plugins\TargetAccessServer\TargetAccessServer.ENU.ewplugin</file>
+                <loadFlag>0</loadFlag>
+            </plugin>
+            <plugin>
+                <file>$EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin</file>
+                <loadFlag>0</loadFlag>
+            </plugin>
+        </debuggerPlugins>
+    </configuration>
+</project>

EWARM/Zigbee_OnOff_Server_Coord.ewp

@@ -0,0 +1,1291 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+  <fileVersion>3</fileVersion>
+  <configuration>
+    <name>Zigbee_OnOff_Server_Coord</name>
+    <toolchain>
+      <name>ARM</name>
+    </toolchain>
+    <debug>1</debug>
+    <settings>
+      <name>General</name>
+      <archiveVersion>3</archiveVersion>
+      <data>
+        <version>34</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>BrowseInfoPath</name>
+          <state>Zigbee_OnOff_Server_Coord\BrowseInfo</state>
+        </option>
+        <option>
+          <name>ExePath</name>
+          <state>Zigbee_OnOff_Server_Coord/Exe</state>
+        </option>
+        <option>
+          <name>ObjPath</name>
+          <state>Zigbee_OnOff_Server_Coord/Obj</state>
+        </option>
+        <option>
+          <name>ListPath</name>
+          <state>Zigbee_OnOff_Server_Coord/List</state>
+        </option>
+        <option>
+          <name>GEndianMode</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>Input description</name>
+          <state>Full formatting, with multibyte support.</state>
+        </option>
+        <option>
+          <name>Output description</name>
+          <state>Full formatting, with multibyte support.</state>
+        </option>
+        <option>
+          <name>GOutputBinary</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGCoreOrChip</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelect</name>
+          <version>0</version>
+          <state>2</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelectSlave</name>
+          <version>0</version>
+          <state>2</state>
+        </option>
+        <option>
+          <name>RTDescription</name>
+          <state>Use the full configuration of the C/C++ runtime library. Full locale interface, C locale, file descriptor support, multibytes in printf and scanf, and hex floats in strtod.</state>
+        </option>
+        <option>
+          <name>OGProductVersion</name>
+          <state>4.41A</state>
+        </option>
+        <option>
+          <name>OGLastSavedByProductVersion</name>
+          <state>9.20.1.43525</state>
+        </option>
+        <option>
+          <name>OGChipSelectEditMenu</name>
+          <state>STM32WB55RG	ST STM32WB55RG</state>
+        </option>
+        <option>
+          <name>GenLowLevelInterface</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GEndianModeBE</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGBufferedTerminalOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GenStdoutInterface</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>RTConfigPath2</name>
+          <state>$TOOLKIT_DIR$\inc\c\DLib_Config_Full.h</state>
+        </option>
+        <option>
+          <name>GBECoreSlave</name>
+          <version>31</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>OGUseCmsis</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGUseCmsisDspLib</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GRuntimeLibThreads</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CoreVariant</name>
+          <version>31</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>GFPUDeviceSlave</name>
+          <state>STM32WB55RG	ST STM32WB55RG</state>
+        </option>
+        <option>
+          <name>FPU2</name>
+          <version>0</version>
+          <state>4</state>
+        </option>
+        <option>
+          <name>NrRegs</name>
+          <version>0</version>
+          <state>1</state>
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+        <option>
+          <name>NEON</name>
+          <state>0</state>
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+        <option>
+          <name>GFPUCoreSlave2</name>
+          <version>31</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>OGCMSISPackSelectDevice</name>
+        </option>
+        <option>
+          <name>OgLibHeap</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGLibAdditionalLocale</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGPrintfVariant</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGPrintfMultibyteSupport</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGScanfVariant</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGScanfMultibyteSupport</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GenLocaleTags</name>
+          <state></state>
+        </option>
+        <option>
+          <name>GenLocaleDisplayOnly</name>
+          <state></state>
+        </option>
+        <option>
+          <name>DSPExtension</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>TrustZone</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>TrustZoneModes</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGAarch64Abi</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OG_32_64Device</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>BuildFilesPath</name>
+          <state>Zigbee_OnOff_Server_Coord</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>ICCARM</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>37</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>CCOptimizationNoSizeConstraints</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDefines</name>
+          <state>USE_HAL_DRIVER</state>
+          <state>STM32WB55xx</state>
+          <state>USE_STM32WBXX_NUCLEO</state>
+          <state>ZIGBEE_WB</state>
+        </option>
+        <option>
+          <name>CCPreprocFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPreprocComments</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPreprocLine</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCMnemonics</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCMessages</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListAssFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListAssSource</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCEnableRemarks</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDiagSuppress</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagRemark</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagWarning</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagError</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCObjPrefix</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCAllowList</name>
+          <version>1</version>
+          <state>11111110</state>
+        </option>
+        <option>
+          <name>CCDebugInfo</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IEndianMode</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IExtraOptionsCheck</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IExtraOptions</name>
+          <state>--diag_suppress Pe111</state>
+          <state>--diag_suppress Pe188</state>
+        </option>
+        <option>
+          <name>CCLangConformance</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCSignedPlainChar</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCRequirePrototypes</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCDiagWarnAreErr</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCCompilerRuntimeInfo</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IFpuProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OutputFile</name>
+          <state>$FILE_BNAME$.o</state>
+        </option>
+        <option>
+          <name>CCLibConfigHeader</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>PreInclude</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCIncludePath2</name>
+          <state>$PROJ_DIR$/../Core/Inc</state>
+          <state>$PROJ_DIR$/../STM32_WPAN/App</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/BSP/P-NUCLEO-WB55.Nucleo</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/STM32WBxx_HAL_Driver/Inc</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/STM32WBxx_HAL_Driver/Inc/Legacy</state>
+          <state>$PROJ_DIR$/../../../../../../Middlewares/ST/STM32_WPAN</state>
+          <state>$PROJ_DIR$/../../../../../../Middlewares/ST/STM32_WPAN/interface/patterns/ble_thread</state>
+          <state>$PROJ_DIR$/../../../../../../Middlewares/ST/STM32_WPAN/interface/patterns/ble_thread/tl</state>
+          <state>$PROJ_DIR$/../../../../../../Middlewares/ST/STM32_WPAN/interface/patterns/ble_thread/shci</state>
+          <state>$PROJ_DIR$/../../../../../../Middlewares/ST/STM32_WPAN/utilities</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/CMSIS/Device/ST/STM32WBxx/Include</state>
+          <state>$PROJ_DIR$/../../../../../../Middlewares/ST/STM32_WPAN/zigbee/core/inc</state>
+          <state>$PROJ_DIR$/../../../../../../Middlewares/ST/STM32_WPAN/zigbee/stack</state>
+          <state>$PROJ_DIR$/../../../../../../Middlewares/ST/STM32_WPAN/zigbee/stack/include</state>
+          <state>$PROJ_DIR$/../../../../../../Middlewares/ST/STM32_WPAN/zigbee/stack/include/mac</state>
+          <state>$PROJ_DIR$/../../../../../../Drivers/CMSIS/Include</state>
+          <state>$PROJ_DIR$/../../../../../../Utilities/sequencer</state>
+          <state>$PROJ_DIR$/../../../../../../Utilities/lpm/tiny_lpm</state>
+          <state>$PROJ_DIR$/../../../../../../Middlewares/ST/STM32_WPAN/zigbee/stack/include/extras</state>
+          <state>$PROJ_DIR$/../../../../../../Middlewares/ST/STM32_WPAN/zigbee/stack/include/zgp</state>
+          <state>$PROJ_DIR$/../../../../../../Middlewares/ST/STM32_WPAN/zigbee/stack/include/zcl</state>
+          <state>$PROJ_DIR$/../../../../../../Middlewares/ST/STM32_WPAN/zigbee/stack/include/zcl/key</state>
+          <state>$PROJ_DIR$/../../../../../../Middlewares/ST/STM32_WPAN/zigbee/stack/include/zcl/se</state>
+          <state>$PROJ_DIR$/../../../../../../Middlewares/ST/STM32_WPAN/zigbee/stack/include/zcl/security</state>
+          <state>$PROJ_DIR$/../../../../../../Middlewares/ST/STM32_WPAN/zigbee/stack/include/zcl/general</state>
+          <state>$PROJ_DIR$/../../../../../../Middlewares/ST/STM32_WPAN/zigbee/platform</state>
+        </option>
+        <option>
+          <name>CCStdIncCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCCodeSection</name>
+          <state>.text</state>
+        </option>
+        <option>
+          <name>IProcessorMode2</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCOptLevel</name>
+          <state>3</state>
+        </option>
+        <option>
+          <name>CCOptStrategy</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCOptLevelSlave</name>
+          <state>3</state>
+        </option>
+        <option>
+          <name>CCPosIndRopi</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPosIndRwpi</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPosIndNoDynInit</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccLang</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccCDialect</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IccAllowVLA</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccStaticDestr</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccCppInlineSemantics</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccCmsis</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IccFloatSemantics</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCNoLiteralPool</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCOptStrategySlave</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCGuardCalls</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCEncSource</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCEncOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCEncOutputBom</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCEncInput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccExceptions2</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccRTTI2</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OICompilerExtraOption</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCStackProtection</name>
+          <state>0</state>
+        </option>
+      </data>
+    </settings>
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+      <name>AARM</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>11</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>AObjPrefix</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AEndian</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>ACaseSensitivity</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>MacroChars</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AWarnEnable</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AWarnWhat</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AWarnOne</name>
+          <state></state>
+        </option>
+        <option>
+          <name>AWarnRange1</name>
+          <state></state>
+        </option>
+        <option>
+          <name>AWarnRange2</name>
+          <state></state>
+        </option>
+        <option>
+          <name>ADebug</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AltRegisterNames</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>ADefines</name>
+          <state></state>
+        </option>
+        <option>
+          <name>AList</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AListHeader</name>
+          <state>1</state>
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+        <option>
+          <name>AListing</name>
+          <state>1</state>
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+        <option>
+          <name>Includes</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>MacDefs</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>MacExps</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>MacExec</name>
+          <state>0</state>
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+        <option>
+          <name>OnlyAssed</name>
+          <state>0</state>
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+        <option>
+          <name>MultiLine</name>
+          <state>0</state>
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+        <option>
+          <name>PageLengthCheck</name>
+          <state>0</state>
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+        <option>
+          <name>PageLength</name>
+          <state>80</state>
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+        <option>
+          <name>TabSpacing</name>
+          <state>8</state>
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+        <option>
+          <name>AXRef</name>
+          <state>0</state>
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+        <option>
+          <name>AXRefDefines</name>
+          <state>0</state>
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+          <name>AXRefInternal</name>
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+          <name>AXRefDual</name>
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+          <name>AProcessor</name>
+          <state>1</state>
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+        <option>
+          <name>AFpuProcessor</name>
+          <state>1</state>
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+        <option>
+          <name>AOutputFile</name>
+          <state>$FILE_BNAME$.o</state>
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+        <option>
+          <name>ALimitErrorsCheck</name>
+          <state>0</state>
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+        <option>
+          <name>ALimitErrorsEdit</name>
+          <state>100</state>
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+        <option>
+          <name>AIgnoreStdInclude</name>
+          <state>0</state>
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+        <option>
+          <name>AUserIncludes</name>
+          <state></state>
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+        <option>
+          <name>AExtraOptionsCheckV2</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AExtraOptionsV2</name>
+          <state></state>
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+        <option>
+          <name>AsmNoLiteralPool</name>
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+        <option>
+          <name>PreInclude</name>
+          <state></state>
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+      <name>OBJCOPY</name>
+      <archiveVersion>0</archiveVersion>
+      <data>
+        <version>1</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>OOCOutputFormat</name>
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+          <state>3</state>
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+        <option>
+          <name>OCOutputOverride</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OOCOutputFile</name>
+          <state>Zigbee_OnOff_Server_Coord.bin</state>
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+        <option>
+          <name>OOCCommandLineProducer</name>
+          <state>1</state>
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+        <option>
+          <name>OOCObjCopyEnable</name>
+          <state>1</state>
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+        <cmdline></cmdline>
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+        <prebuild></prebuild>
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+        <option>
+          <name>IlinkOutputFile</name>
+          <state>Zigbee_OnOff_Server_Coord.out</state>
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+          <name>IlinkDebugInfoEnable</name>
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+          <name>IlinkKeepSymbols</name>
+          <state></state>
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+          <name>IlinkRawBinaryFile</name>
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+          <name>IlinkRawBinaryAlign</name>
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+          <name>IlinkConfigDefines</name>
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+          <name>IlinkMapFile</name>
+          <state>1</state>
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+          <name>IlinkLogFile</name>
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+          <name>IlinkLogInitialization</name>
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+          <name>IlinkLogModule</name>
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+          <name>IlinkLogSection</name>
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+          <name>IlinkLogVeneer</name>
+          <state>0</state>
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+          <name>IlinkIcfOverride</name>
+          <state>1</state>
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+        <option>
+          <name>IlinkIcfFile</name>
+          <state>$PROJ_DIR$\stm32wb55xx_flash_cm4.icf</state>
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+          <name>IlinkIcfFileSlave</name>
+          <state></state>
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+        <option>
+          <name>IlinkEnableRemarks</name>
+          <state>0</state>
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+        <option>
+          <name>IlinkSuppressDiags</name>
+          <state></state>
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+        <option>
+          <name>IlinkTreatAsRem</name>
+          <state></state>
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+        <option>
+          <name>IlinkTreatAsWarn</name>
+          <state></state>
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+        <option>
+          <name>IlinkTreatAsErr</name>
+          <state></state>
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+          <name>IlinkWarningsAreErrors</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkUseExtraOptions</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkExtraOptions</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkLowLevelInterfaceSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkAutoLibEnable</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkAdditionalLibs</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkOverrideProgramEntryLabel</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkProgramEntryLabelSelect</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkProgramEntryLabel</name>
+          <state>__iar_program_start</state>
+        </option>
+        <option>
+          <name>DoFill</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>FillerByte</name>
+          <state>0xFF</state>
+        </option>
+        <option>
+          <name>FillerStart</name>
+          <state>0x0</state>
+        </option>
+        <option>
+          <name>FillerEnd</name>
+          <state>0x0</state>
+        </option>
+        <option>
+          <name>CrcSize</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcAlign</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcPoly</name>
+          <state>0x11021</state>
+        </option>
+        <option>
+          <name>CrcCompl</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CrcBitOrder</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CrcInitialValue</name>
+          <state>0x0</state>
+        </option>
+        <option>
+          <name>DoCrc</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkBE8Slave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkBufferedTerminalOutput</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkStdoutInterfaceSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcFullSize</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkIElfToolPostProcess</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogAutoLibSelect</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogRedirSymbols</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogUnusedFragments</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCrcReverseByteOrder</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCrcUseAsInput</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptInline</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkOptExceptionsAllow</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptExceptionsForce</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCmsis</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptMergeDuplSections</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkOptUseVfe</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptForceVfe</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkStackAnalysisEnable</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkStackControlFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkStackCallGraphFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CrcAlgorithm</name>
+          <version>1</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcUnitSize</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkThreadsSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkLogCallGraph</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkIcfFile_AltDefault</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkEncInput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkEncOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkEncOutputBom</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkHeapSelect</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkLocaleSelect</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkTrustzoneImportLibraryOut</name>
+          <state>Zigbee_OnOff_Server_Coord_import_lib.o</state>
+        </option>
+        <option>
+          <name>OILinkExtraOption</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkRawBinaryFile2</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkRawBinarySymbol2</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkRawBinarySegment2</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkRawBinaryAlign2</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkLogCrtRoutineSelection</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogFragmentInfo</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogInlining</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogMerging</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkDemangle</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkWrapperFileEnable</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkWrapperFile</name>
+          <state></state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>IARCHIVE</name>
+      <archiveVersion>0</archiveVersion>
+      <data>
+        <version>0</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>IarchiveInputs</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IarchiveOverride</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IarchiveOutput</name>
+          <state>###Unitialized###</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>Coder</name>
+      <archiveVersion>0</archiveVersion>
+      <data></data>
+    </settings>
+  </configuration>
+  <group>
+    <name>Application</name>
+    <group>
+      <name>EWARM</name>
+      <file>
+        <name>$PROJ_DIR$\startup_stm32wb55xx_cm4.s</name>
+      </file>
+    </group>
+    <group>
+      <name>User</name>
+      <group>
+        <name>Core</name>
+        <file>
+          <name>$PROJ_DIR$\..\Core\Src\main.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$\..\Core\Src\app_entry.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$\..\Core\Src\hw_timerserver.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$\..\Core\Src\hw_uart.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$\..\Core\Src\stm32_lpm_if.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$\..\Core\Src\stm_logging.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$\..\Core\Src\stm32wbxx_it.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$\..\Core\Src\stm32wbxx_hal_msp.c</name>
+        </file>
+      </group>
+      <group>
+        <name>STM32_WPAN</name>
+        <group>
+          <name>App</name>
+          <file>
+            <name>$PROJ_DIR$\..\STM32_WPAN\App\app_zigbee.c</name>
+          </file>
+        </group>
+        <group>
+          <name>Target</name>
+          <file>
+            <name>$PROJ_DIR$\..\STM32_WPAN\Target\hw_ipcc.c</name>
+          </file>
+        </group>
+      </group>
+    </group>
+  </group>
+  <group>
+    <name>Doc</name>
+    <file>
+      <name>$PROJ_DIR$\..\readme.txt</name>
+    </file>
+  </group>
+  <group>
+    <name>Drivers</name>
+    <group>
+      <name>BSP</name>
+      <group>
+        <name>STM32WBxx_Nucleo</name>
+        <file>
+          <name>$PROJ_DIR$\..\..\..\..\..\..\Drivers\BSP\P-NUCLEO-WB55.Nucleo\stm32wbxx_nucleo.c</name>
+        </file>
+      </group>
+    </group>
+    <group>
+      <name>CMSIS</name>
+      <file>
+        <name>$PROJ_DIR$\..\Core\Src\system_stm32wbxx.c</name>
+      </file>
+    </group>
+    <group>
+      <name>STM32WBxx_HAL_Driver</name>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_hsem.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_rcc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_ll_rcc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_rcc_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_flash.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_flash_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_gpio.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_dma.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_dma_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_pwr.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_pwr_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_cortex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_exti.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_ipcc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_uart.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_uart_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_rtc.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_rtc_ex.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_tim.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_tim_ex.c</name>
+      </file>
+    </group>
+  </group>
+  <group>
+    <name>Middlewares</name>
+    <group>
+      <name>STM32_WPAN</name>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Middlewares/ST/STM32_WPAN/zigbee/lib/stm32wb_zigbee_wb_lib.a</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Middlewares/ST/STM32_WPAN/interface/patterns/ble_thread/tl/tl_mbox.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Middlewares/ST/STM32_WPAN/interface/patterns/ble_thread/shci/shci.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Middlewares/ST/STM32_WPAN/utilities/dbg_trace.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Middlewares/ST/STM32_WPAN/utilities/otp.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Middlewares/ST/STM32_WPAN/utilities/stm_list.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Middlewares/ST/STM32_WPAN/utilities/stm_queue.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Middlewares/ST/STM32_WPAN/interface/patterns/ble_thread/tl/tl_zigbee_hci.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Middlewares/ST/STM32_WPAN/interface/patterns/ble_thread/tl/shci_tl.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Middlewares/ST/STM32_WPAN/interface/patterns/ble_thread/tl/shci_tl_if.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Middlewares/ST/STM32_WPAN/zigbee/platform/ee.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Middlewares/ST/STM32_WPAN/zigbee/platform/hw_flash.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$/../../../../../../Middlewares/ST/STM32_WPAN/zigbee/core/src/zigbee_core_wb.c</name>
+      </file>
+    </group>
+  </group>
+  <group>
+    <name>Utilities</name>
+    <file>
+      <name>$PROJ_DIR$/../../../../../../Utilities/lpm/tiny_lpm/stm32_lpm.c</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$/../../../../../../Utilities/sequencer/stm32_seq.c</name>
+    </file>
+  </group>
+</project>
+

EWARM/startup_stm32wb55xx_cm4.s

@@ -0,0 +1,515 @@
+;******************************************************************************
+;* File Name          : startup_stm32wb55xx_cm4.s
+;* Author             : MCD Application Team
+;* Description        : M4 core vector table of the STM32WB55xx devices for the
+;*                      IAR (EWARM) toolchain.
+;*
+;*                      This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == _iar_program_start,
+;*                      - Set the vector table entries with the exceptions ISR
+;*                        address.
+;*                      - Branches to main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;******************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;*
+;******************************************************************************
+;
+;
+; The modules in this file are included in the libraries, and may be replaced
+; by any user-defined modules that define the PUBLIC symbol _program_start or
+; a user defined start symbol.
+; To override the cstartup defined in the library, simply add your modified
+; version to the workbench project.
+;
+; The vector table is normally located at address 0.
+; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
+; The name "__vector_table" has special meaning for C-SPY:
+; it is where the SP start value is found, and the NVIC vector
+; table register (VTOR) is initialized to this address if != 0.
+;
+; Cortex-M version
+;
+
+        MODULE  ?cstartup
+
+        ;; Forward declaration of sections.
+        SECTION CSTACK:DATA:NOROOT(3)
+
+        SECTION .intvec:CODE:NOROOT(2)
+
+        EXTERN  __iar_program_start
+        EXTERN  SystemInit
+        PUBLIC  __vector_table
+
+        DATA
+__vector_table
+        DCD     sfe(CSTACK)
+        DCD     Reset_Handler                     ; Reset Handler
+
+        DCD     NMI_Handler                       ; NMI Handler
+        DCD     HardFault_Handler                 ; Hard Fault Handler
+        DCD     MemManage_Handler                 ; MPU Fault Handler
+        DCD     BusFault_Handler                  ; Bus Fault Handler
+        DCD     UsageFault_Handler                ; Usage Fault Handler
+        DCD     0                                 ; Reserved
+        DCD     0                                 ; Reserved
+        DCD     0                                 ; Reserved
+        DCD     0                                 ; Reserved
+        DCD     SVC_Handler                       ; SVCall Handler
+        DCD     DebugMon_Handler                  ; Debug Monitor Handler
+        DCD     0                                 ; Reserved
+        DCD     PendSV_Handler                    ; PendSV Handler
+        DCD     SysTick_Handler                   ; SysTick Handler
+
+        ; External Interrupts
+        DCD     WWDG_IRQHandler                   ; Window WatchDog
+        DCD     PVD_PVM_IRQHandler                ; PVD and PVM Interrupt
+        DCD     TAMP_STAMP_LSECSS_IRQHandler      ; RTC Tamper, TimeStamp Interrupts and LSECSS Interrupts
+        DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup Interrupt
+        DCD     FLASH_IRQHandler                  ; FLASH global Interrupt
+        DCD     RCC_IRQHandler                    ; RCC Interrupt
+        DCD     EXTI0_IRQHandler                  ; EXTI Line 0 Interrupt
+        DCD     EXTI1_IRQHandler                  ; EXTI Line 1 Interrupt
+        DCD     EXTI2_IRQHandler                  ; EXTI Line 2 Interrupt
+        DCD     EXTI3_IRQHandler                  ; EXTI Line 3 Interrupt
+        DCD     EXTI4_IRQHandler                  ; EXTI Line 4 Interrupt
+        DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1 Interrupt
+        DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2 Interrupt
+        DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3 Interrupt
+        DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4 Interrupt
+        DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5 Interrupt
+        DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6 Interrupt
+        DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7 Interrupt
+        DCD     ADC1_IRQHandler                   ; ADC1 Interrupt
+        DCD     USB_HP_IRQHandler                 ; USB High Priority Interrupt
+        DCD     USB_LP_IRQHandler                 ; USB Low Priority Interrupt
+        DCD     C2SEV_PWR_C2H_IRQHandler          ; CPU M0+ SEV Interrupt
+        DCD     COMP_IRQHandler                   ; COMP1 and COMP2  Interrupts
+        DCD     EXTI9_5_IRQHandler                ; EXTI Lines [9:5] Interrupt
+        DCD     TIM1_BRK_IRQHandler               ; TIM1 Break Interrupt
+        DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16 global Interrupts
+        DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger and Communication and TIM17 global Interrupts
+        DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare Interrupt
+        DCD     TIM2_IRQHandler                   ; TIM2 Global Interrupt
+        DCD     PKA_IRQHandler                    ; PKA Interrupt
+        DCD     I2C1_EV_IRQHandler                ; I2C1 Event Interrupt
+        DCD     I2C1_ER_IRQHandler                ; I2C1 Error Interrupt
+        DCD     I2C3_EV_IRQHandler                ; I2C3 Event Interrupt
+        DCD     I2C3_ER_IRQHandler                ; I2C3 Error Interrupt
+        DCD     SPI1_IRQHandler                   ; SPI1 Interrupt
+        DCD     SPI2_IRQHandler                   ; SPI2 Interrupt
+        DCD     USART1_IRQHandler                 ; USART1 Interrupt
+        DCD     LPUART1_IRQHandler                ; LPUART1 Interrupt
+        DCD     SAI1_IRQHandler                   ; SAI Interrupt
+        DCD     TSC_IRQHandler                    ; TSC Interrupt
+        DCD     EXTI15_10_IRQHandler              ; EXTI Lines1[15:10 ]Interrupts
+        DCD     RTC_Alarm_IRQHandler              ; RTC Alarms (A and B) Interrupt
+        DCD     CRS_IRQHandler                    ; CRS interrupt
+        DCD     PWR_SOTF_BLEACT_802ACT_RFPHASE_IRQHandler ; WKUP Interrupt from PWR
+        DCD     IPCC_C1_RX_IRQHandler             ; IPCC CPU1 RX occupied interrupt
+        DCD     IPCC_C1_TX_IRQHandler             ; IPCC CPU1 RX free interrupt
+        DCD     HSEM_IRQHandler                   ; HSEM0 Interrupt
+        DCD     LPTIM1_IRQHandler                 ; LPTIM1 Interrupt
+        DCD     LPTIM2_IRQHandler                 ; LPTIM2 Interrupt
+        DCD     LCD_IRQHandler                    ; LCD Interrupt
+        DCD     QUADSPI_IRQHandler                ; QUADSPI Interrupt
+        DCD     AES1_IRQHandler                   ; AES1 Interrupt
+        DCD     AES2_IRQHandler                   ; AES2 Interrupt
+        DCD     RNG_IRQHandler                    ; RNG1 Interrupt
+        DCD     FPU_IRQHandler                    ; FPU Interrupt
+        DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1 Interrupt
+        DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2 Interrupt
+        DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3 Interrupt
+        DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4 Interrupt
+        DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5 Interrupt
+        DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6 Interrupt
+        DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7 Interrupt
+        DCD     DMAMUX1_OVR_IRQHandler            ; DMAMUX overrun Interrupt
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;;
+;; Default interrupt handlers.
+;;
+        THUMB
+
+        PUBWEAK Reset_Handler
+        SECTION .text:CODE:NOROOT:REORDER(2)
+Reset_Handler
+        LDR     R0, =SystemInit
+        BLX     R0
+        LDR     R0, =__iar_program_start
+        BX      R0
+
+        PUBWEAK NMI_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+NMI_Handler
+        B NMI_Handler
+
+        PUBWEAK HardFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HardFault_Handler
+        B HardFault_Handler
+
+        PUBWEAK MemManage_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+MemManage_Handler
+        B MemManage_Handler
+
+        PUBWEAK BusFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+BusFault_Handler
+        B BusFault_Handler
+
+        PUBWEAK UsageFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UsageFault_Handler
+        B UsageFault_Handler
+
+        PUBWEAK SVC_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SVC_Handler
+        B SVC_Handler
+
+        PUBWEAK DebugMon_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DebugMon_Handler
+        B DebugMon_Handler
+
+        PUBWEAK PendSV_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PendSV_Handler
+        B PendSV_Handler
+
+        PUBWEAK SysTick_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SysTick_Handler
+        B SysTick_Handler
+
+        PUBWEAK WWDG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+WWDG_IRQHandler
+        B WWDG_IRQHandler
+
+        PUBWEAK PVD_PVM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PVD_PVM_IRQHandler
+        B PVD_PVM_IRQHandler
+
+        PUBWEAK TAMP_STAMP_LSECSS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TAMP_STAMP_LSECSS_IRQHandler
+        B TAMP_STAMP_LSECSS_IRQHandler
+
+        PUBWEAK RTC_WKUP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_WKUP_IRQHandler
+        B RTC_WKUP_IRQHandler
+
+        PUBWEAK FLASH_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FLASH_IRQHandler
+        B FLASH_IRQHandler
+
+        PUBWEAK RCC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RCC_IRQHandler
+        B RCC_IRQHandler
+
+        PUBWEAK EXTI0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI0_IRQHandler
+        B EXTI0_IRQHandler
+
+        PUBWEAK EXTI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI1_IRQHandler
+        B EXTI1_IRQHandler
+
+        PUBWEAK EXTI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI2_IRQHandler
+        B EXTI2_IRQHandler
+
+        PUBWEAK EXTI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI3_IRQHandler
+        B EXTI3_IRQHandler
+
+        PUBWEAK EXTI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI4_IRQHandler
+        B EXTI4_IRQHandler
+
+        PUBWEAK DMA1_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel1_IRQHandler
+        B DMA1_Channel1_IRQHandler
+
+        PUBWEAK DMA1_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel2_IRQHandler
+        B DMA1_Channel2_IRQHandler
+
+        PUBWEAK DMA1_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel3_IRQHandler
+        B DMA1_Channel3_IRQHandler
+
+        PUBWEAK DMA1_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel4_IRQHandler
+        B DMA1_Channel4_IRQHandler
+
+        PUBWEAK DMA1_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel5_IRQHandler
+        B DMA1_Channel5_IRQHandler
+
+        PUBWEAK DMA1_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel6_IRQHandler
+        B DMA1_Channel6_IRQHandler
+
+        PUBWEAK DMA1_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel7_IRQHandler
+        B DMA1_Channel7_IRQHandler
+
+        PUBWEAK ADC1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC1_IRQHandler
+        B ADC1_IRQHandler
+
+        PUBWEAK USB_HP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_HP_IRQHandler
+        B USB_HP_IRQHandler
+
+        PUBWEAK USB_LP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_LP_IRQHandler
+        B USB_LP_IRQHandler
+
+        PUBWEAK C2SEV_PWR_C2H_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+C2SEV_PWR_C2H_IRQHandler
+        B C2SEV_PWR_C2H_IRQHandler
+
+        PUBWEAK COMP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP_IRQHandler
+        B COMP_IRQHandler
+
+        PUBWEAK EXTI9_5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI9_5_IRQHandler
+        B EXTI9_5_IRQHandler
+
+        PUBWEAK TIM1_BRK_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_BRK_IRQHandler
+        B TIM1_BRK_IRQHandler
+
+        PUBWEAK TIM1_UP_TIM16_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_UP_TIM16_IRQHandler
+        B TIM1_UP_TIM16_IRQHandler
+
+        PUBWEAK TIM1_TRG_COM_TIM17_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_TRG_COM_TIM17_IRQHandler
+        B TIM1_TRG_COM_TIM17_IRQHandler
+
+        PUBWEAK TIM1_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_CC_IRQHandler
+        B TIM1_CC_IRQHandler
+
+        PUBWEAK TIM2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM2_IRQHandler
+        B TIM2_IRQHandler
+
+        PUBWEAK PKA_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PKA_IRQHandler
+        B PKA_IRQHandler
+
+        PUBWEAK I2C1_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_EV_IRQHandler
+        B I2C1_EV_IRQHandler
+
+        PUBWEAK I2C1_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_ER_IRQHandler
+        B I2C1_ER_IRQHandler
+
+        PUBWEAK I2C3_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_EV_IRQHandler
+        B I2C3_EV_IRQHandler
+
+        PUBWEAK I2C3_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_ER_IRQHandler
+        B I2C3_ER_IRQHandler
+
+        PUBWEAK SPI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI1_IRQHandler
+        B SPI1_IRQHandler
+
+        PUBWEAK SPI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI2_IRQHandler
+        B SPI2_IRQHandler
+
+        PUBWEAK USART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART1_IRQHandler
+        B USART1_IRQHandler
+
+        PUBWEAK LPUART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPUART1_IRQHandler
+        B LPUART1_IRQHandler
+
+        PUBWEAK SAI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SAI1_IRQHandler
+        B SAI1_IRQHandler
+
+        PUBWEAK TSC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TSC_IRQHandler
+        B TSC_IRQHandler
+
+        PUBWEAK EXTI15_10_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI15_10_IRQHandler
+        B EXTI15_10_IRQHandler
+
+        PUBWEAK RTC_Alarm_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_Alarm_IRQHandler
+        B RTC_Alarm_IRQHandler
+
+        PUBWEAK CRS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CRS_IRQHandler
+        B CRS_IRQHandler
+
+        PUBWEAK PWR_SOTF_BLEACT_802ACT_RFPHASE_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PWR_SOTF_BLEACT_802ACT_RFPHASE_IRQHandler
+        B PWR_SOTF_BLEACT_802ACT_RFPHASE_IRQHandler
+
+        PUBWEAK IPCC_C1_RX_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+IPCC_C1_RX_IRQHandler
+        B IPCC_C1_RX_IRQHandler
+
+        PUBWEAK IPCC_C1_TX_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+IPCC_C1_TX_IRQHandler
+        B IPCC_C1_TX_IRQHandler
+
+        PUBWEAK HSEM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HSEM_IRQHandler
+        B HSEM_IRQHandler
+
+        PUBWEAK LPTIM1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPTIM1_IRQHandler
+        B LPTIM1_IRQHandler
+
+        PUBWEAK LPTIM2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LPTIM2_IRQHandler
+        B LPTIM2_IRQHandler
+
+        PUBWEAK LCD_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+LCD_IRQHandler
+        B LCD_IRQHandler
+
+        PUBWEAK QUADSPI_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+QUADSPI_IRQHandler
+        B QUADSPI_IRQHandler
+
+        PUBWEAK AES1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+AES1_IRQHandler
+        B AES1_IRQHandler
+
+        PUBWEAK AES2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+AES2_IRQHandler
+        B AES2_IRQHandler
+
+        PUBWEAK RNG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RNG_IRQHandler
+        B RNG_IRQHandler
+
+        PUBWEAK FPU_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FPU_IRQHandler
+        B FPU_IRQHandler
+
+        PUBWEAK DMA2_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel1_IRQHandler
+        B DMA2_Channel1_IRQHandler
+
+        PUBWEAK DMA2_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel2_IRQHandler
+        B DMA2_Channel2_IRQHandler
+
+        PUBWEAK DMA2_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel3_IRQHandler
+        B DMA2_Channel3_IRQHandler
+
+        PUBWEAK DMA2_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel4_IRQHandler
+        B DMA2_Channel4_IRQHandler
+
+        PUBWEAK DMA2_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel5_IRQHandler
+        B DMA2_Channel5_IRQHandler
+
+        PUBWEAK DMA2_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel6_IRQHandler
+        B DMA2_Channel6_IRQHandler
+
+        PUBWEAK DMA2_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel7_IRQHandler
+        B DMA2_Channel7_IRQHandler
+
+        PUBWEAK DMAMUX1_OVR_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMAMUX1_OVR_IRQHandler
+        B DMAMUX1_OVR_IRQHandler
+
+        END
+

EWARM/stm32wb55xx_flash_cm4.icf

@@ -0,0 +1,47 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x08000000;
+/*-Memory Regions-*/
+/***** FLASH Part dedicated to M4 *****/
+define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
+define symbol __ICFEDIT_region_ROM_end__   = 0x0807FFFF;
+define symbol __ICFEDIT_region_RAM_start__ = 0x20000008;
+define symbol __ICFEDIT_region_RAM_end__   = 0x2002F000;
+
+ /*0x2002FFFF---------------------------------------|
+ *           | Emulation Flash                      |
+ * 0x2002F000-------------------------------------- |
+ *           | Region_RAM                           |
+ * 0x20000004-------------------------------------- |
+
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0x1000;
+define symbol __ICFEDIT_size_heap__   = 0x19000;
+/**** End of ICF editor section. ###ICF###*/
+
+define symbol __ICFEDIT_region_RAM_SHARED_start__ = 0x20030000;
+define symbol __ICFEDIT_region_RAM_SHARED_end__   = 0x20031000;
+
+define memory mem with size = 4G;
+define region ROM_region        = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
+define region RAM_region        = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
+define region RAM_SHARED_region = mem:[from __ICFEDIT_region_RAM_SHARED_start__   to __ICFEDIT_region_RAM_SHARED_end__];
+
+define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
+define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
+
+/* MB_MEM1 and MB_MEM2 are sections reserved to mailbox communication. It is placed in the shared memory */
+initialize by copy { readwrite };
+do not initialize  { section .noinit,
+                     section MAPPING_TABLE,
+                     section MB_MEM1 };
+
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+place at address mem:__ICFEDIT_region_RAM_SHARED_start__ { section MAPPING_TABLE };
+
+place in ROM_region        { readonly };
+place in RAM_region        { readwrite,block CSTACK, block HEAP };
+place in RAM_SHARED_region { section MB_MEM1};
+place in RAM_SHARED_region { section MB_MEM2};

MDK-ARM/EventRecorderStub.scvd

@@ -0,0 +1,9 @@
+<?xml version="1.0" encoding="utf-8"?>
+
+<component_viewer schemaVersion="0.1" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="Component_Viewer.xsd">
+
+<component name="EventRecorderStub" version="1.0.0"/>       <!--name and version of the component-->
+  <events>
+  </events>
+
+</component_viewer>

MDK-ARM/RTE/_Zigbee_OnOff_Server_Coord/RTE_Components.h

@@ -0,0 +1,14 @@
+/*
+ * UVISION generated file: DO NOT EDIT!
+ * Generated by: uVision version 5.41.0.0
+ *
+ * Project: 'Zigbee_OnOff_Server_Coord' 
+ * Target:  'Zigbee_OnOff_Server_Coord' 
+ */
+
+#ifndef RTE_COMPONENTS_H
+#define RTE_COMPONENTS_H
+
+
+
+#endif /* RTE_COMPONENTS_H */

MDK-ARM/Zigbee_OnOff_Server_Coord.bak.uvoptx

@@ -0,0 +1,966 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
+
+  <SchemaVersion>1.0</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Extensions>
+    <cExt>*.c</cExt>
+    <aExt>*.s*; *.src; *.a*</aExt>
+    <oExt>*.obj; *.o</oExt>
+    <lExt>*.lib</lExt>
+    <tExt>*.txt; *.h; *.inc; *.md</tExt>
+    <pExt>*.plm</pExt>
+    <CppX>*.cpp; *.cc; *.cxx</CppX>
+    <nMigrate>0</nMigrate>
+  </Extensions>
+
+  <DaveTm>
+    <dwLowDateTime>0</dwLowDateTime>
+    <dwHighDateTime>0</dwHighDateTime>
+  </DaveTm>
+
+  <Target>
+    <TargetName>Zigbee_OnOff_Server_Coord</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>12000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath></ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>1</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>18</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>1</tLdApp>
+        <tGomain>1</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>6</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile></tIfile>
+        <pMon>STLink\ST-LINKIII-KEIL_SWO.dll</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMRTXEVENTFLAGS</Key>
+          <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGTARM</Key>
+          <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMDBGFLAGS</Key>
+          <Name></Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGUARM</Key>
+          <Name>(105=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ST-LINKIII-KEIL_SWO</Key>
+          <Name>-U0671FF515075485067075739 -O206 -SF4000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P1 -N00("ARM CoreSight SW-DP") -D00(6BA02477) -L00(0) -TO131090 -TC10000000 -TT10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC8000 -FN1 -FF0STM32WB5x_M4_1024.FLM -FS08000000 -FL0100000 -FP0($$Device:STM32WB55CGUx$CMSIS\Flash\STM32WB5x_M4_1024.FLM) -WA0 -WE0 -WVCE4 -WS2710 -WM0 -WP2 -WK0-R0</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 )  -FN1 -FC8000 -FD20000000 -FF0STM32WB5x_M4_1024 -FL0100000 -FS08000000 -FP0($$Device:STM32WB55CGUx$CMSIS\Flash\STM32WB5x_M4_1024.FLM)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <WatchWindow1>
+        <Ww>
+          <count>0</count>
+          <WinNumber>1</WinNumber>
+          <ItemText>g_app</ItemText>
+        </Ww>
+      </WatchWindow1>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>0</periodic>
+        <aLwin>1</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>1</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
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MDK-ARM/Zigbee_OnOff_Server_Coord.uvoptx

@@ -0,0 +1,1020 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
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+  <SchemaVersion>1.0</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Extensions>
+    <cExt>*.c</cExt>
+    <aExt>*.s*; *.src; *.a*</aExt>
+    <oExt>*.obj; *.o</oExt>
+    <lExt>*.lib</lExt>
+    <tExt>*.txt; *.h; *.inc; *.md</tExt>
+    <pExt>*.plm</pExt>
+    <CppX>*.cpp</CppX>
+    <nMigrate>0</nMigrate>
+  </Extensions>
+
+  <DaveTm>
+    <dwLowDateTime>0</dwLowDateTime>
+    <dwHighDateTime>0</dwHighDateTime>
+  </DaveTm>
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+    <TargetName>Zigbee_OnOff_Server_Coord</TargetName>
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+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>12000000</CLKADS>
+      <OPTTT>
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+        <BeepAtEnd>1</BeepAtEnd>
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+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
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+        <HexRangeHighAddress>0</HexRangeHighAddress>
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+      <OPTLEX>
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+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath></ListingPath>
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+      <ListingPage>
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+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
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+        <AsmCond>1</AsmCond>
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+        <CCode>0</CCode>
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+        <LComments>1</LComments>
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+        <IsCurrentTarget>1</IsCurrentTarget>
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+      <CpuCode>18</CpuCode>
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+        <bSchkAxf>0</bSchkAxf>
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+        <sDll></sDll>
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+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
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+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile></tIfile>
+        <pMon>STLink\ST-LINKIII-KEIL_SWO.dll</pMon>
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+          <Name>UL2CM3(-S0 -C0 -P0 ) -FN1 -FC8000 -FD20000000 -FF0STM32WB5x_M4_1024 -FL0100000 -FS08000000 -FP0($$Device:STM32WB55CGUx$CMSIS\Flash\STM32WB5x_M4_1024.FLM)</Name>
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+          <Key>ST-LINKIII-KEIL_SWO</Key>
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+        <Ww>
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+          <ItemText>watch_zigbee_state </ItemText>
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+        </Ww>
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+          <ItemText>watch_report_tx_confirm_status</ItemText>
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+          <ItemText>watch_rejoin_request_count</ItemText>
+        </Ww>
+      </WatchWindow1>
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+      <DebugFlag>
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+        <periodic>1</periodic>
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MDK-ARM/Zigbee_OnOff_Server_Coord/Exe/ExtDll.iex

@@ -0,0 +1,2 @@
+[EXTDLL]
+Count=0