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This commit is contained in:
113
Core/Inc/app_common.h
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113
Core/Inc/app_common.h
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/* USER CODE BEGIN Header */
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/**
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******************************************************************************
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* @file app_common.h
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* @author MCD Application Team
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* @brief App Common application configuration file for STM32WPAN Middleware.
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******************************************************************************
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* @attention
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*
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* Copyright (c) 2019-2023 STMicroelectronics.
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* All rights reserved.
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*
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* This software is licensed under terms that can be found in the LICENSE file
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* in the root directory of this software component.
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* If no LICENSE file comes with this software, it is provided AS-IS.
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*
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******************************************************************************
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*/
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/* USER CODE END Header */
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef APP_COMMON_H
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#define APP_COMMON_H
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#ifdef __cplusplus
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extern "C"{
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#endif
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#include <stdint.h>
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#include <string.h>
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#include <stdio.h>
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#include <stdlib.h>
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#include <stdarg.h>
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#include "app_conf.h"
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/* -------------------------------- *
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* Basic definitions *
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* -------------------------------- */
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#undef NULL
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#define NULL 0
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#undef FALSE
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#define FALSE 0
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#undef TRUE
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#define TRUE (!0)
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/* -------------------------------- *
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* Critical Section definition *
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* -------------------------------- */
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#define BACKUP_PRIMASK() uint32_t primask_bit= __get_PRIMASK()
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#define DISABLE_IRQ() __disable_irq()
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#define RESTORE_PRIMASK() __set_PRIMASK(primask_bit)
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/* -------------------------------- *
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* Macro delimiters *
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* -------------------------------- */
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#define M_BEGIN do {
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#define M_END } while(0)
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/* -------------------------------- *
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* Some useful macro definitions *
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* -------------------------------- */
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#ifndef MAX
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#define MAX( x, y ) (((x)>(y))?(x):(y))
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#endif
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#ifndef MIN
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#define MIN( x, y ) (((x)<(y))?(x):(y))
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#endif
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#define MODINC( a, m ) M_BEGIN (a)++; if ((a)>=(m)) (a)=0; M_END
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#define MODDEC( a, m ) M_BEGIN if ((a)==0) (a)=(m); (a)--; M_END
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#define MODADD( a, b, m ) M_BEGIN (a)+=(b); if ((a)>=(m)) (a)-=(m); M_END
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#define MODSUB( a, b, m ) MODADD( a, (m)-(b), m )
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#define PAUSE( t ) M_BEGIN \
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__IO int _i; \
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for ( _i = t; _i > 0; _i -- ); \
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M_END
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#define DIVF( x, y ) ((x)/(y))
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#define DIVC( x, y ) (((x)+(y)-1)/(y))
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#define DIVR( x, y ) (((x)+((y)/2))/(y))
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#define SHRR( x, n ) ((((x)>>((n)-1))+1)>>1)
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#define BITN( w, n ) (((w)[(n)/32] >> ((n)%32)) & 1)
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#define BITNSET( w, n, b ) M_BEGIN (w)[(n)/32] |= ((U32)(b))<<((n)%32); M_END
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/* -------------------------------- *
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* Compiler *
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* -------------------------------- */
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#define PLACE_IN_SECTION( __x__ ) __attribute__((section (__x__)))
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#ifdef WIN32
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#define ALIGN(n)
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#else
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#define ALIGN(n) __attribute__((aligned(n)))
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#endif
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#ifdef __cplusplus
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} /* extern "C" */
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#endif
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#endif /*APP_COMMON_H */
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385
Core/Inc/app_conf.h
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385
Core/Inc/app_conf.h
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@@ -0,0 +1,385 @@
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/* USER CODE BEGIN Header */
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/**
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******************************************************************************
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* @file app_conf.h
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* @author MCD Application Team
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* @brief Application configuration file for STM32WPAN Middleware.
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******************************************************************************
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* @attention
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*
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* Copyright (c) 2019-2023 STMicroelectronics.
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* All rights reserved.
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*
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* This software is licensed under terms that can be found in the LICENSE file
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* in the root directory of this software component.
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* If no LICENSE file comes with this software, it is provided AS-IS.
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*
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******************************************************************************
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*/
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/* USER CODE END Header */
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef APP_CONF_H
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#define APP_CONF_H
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#include "hw.h"
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#include "hw_conf.h"
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#include "hw_if.h"
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/******************************************************************************
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* Application Config
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******************************************************************************/
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/******************************************************************************
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* Transport Layer
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******************************************************************************/
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/**
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* Queue length of BLE Event
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* This parameter defines the number of asynchronous events that can be stored in the HCI layer before
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* being reported to the application. When a command is sent to the BLE core coprocessor, the HCI layer
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* is waiting for the event with the Num_HCI_Command_Packets set to 1. The receive queue shall be large
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* enough to store all asynchronous events received in between.
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* When CFG_TLBLE_MOST_EVENT_PAYLOAD_SIZE is set to 27, this allow to store three 255 bytes long asynchronous events
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* between the HCI command and its event.
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* This parameter depends on the value given to CFG_TLBLE_MOST_EVENT_PAYLOAD_SIZE. When the queue size is to small,
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* the system may hang if the queue is full with asynchronous events and the HCI layer is still waiting
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* for a CC/CS event, In that case, the notification TL_BLE_HCI_ToNot() is called to indicate
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* to the application a HCI command did not receive its command event within 30s (Default HCI Timeout).
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*/
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#define CFG_TL_EVT_QUEUE_LENGTH 5
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/**
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* This parameter should be set to fit most events received by the HCI layer. It defines the buffer size of each element
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* allocated in the queue of received events and can be used to optimize the amount of RAM allocated by the Memory Manager.
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* It should not exceed 255 which is the maximum HCI packet payload size (a greater value is a lost of memory as it will
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* never be used)
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* It shall be at least 4 to receive the command status event in one frame.
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* The default value is set to 27 to allow receiving an event of MTU size in a single buffer. This value maybe reduced
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* further depending on the application.
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*/
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#define CFG_TL_MOST_EVENT_PAYLOAD_SIZE 255 /**< Set to 255 with the memory manager and the mailbox */
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#define TL_EVENT_FRAME_SIZE ( TL_EVT_HDR_SIZE + CFG_TL_MOST_EVENT_PAYLOAD_SIZE )
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/******************************************************************************
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* UART interfaces
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******************************************************************************/
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/**
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* Select UART interfaces
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*/
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#define CFG_DEBUG_TRACE_UART hw_uart1
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#define CFG_CONSOLE_MENU
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#define CFG_CLI_UART hw_lpuart1
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/******************************************************************************
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* USB interface
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******************************************************************************/
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/**
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* Enable/Disable USB interface
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*/
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#define CFG_USB_INTERFACE_ENABLE 0
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/******************************************************************************
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* IPCC interface
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******************************************************************************/
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/**
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* The IPCC is dedicated to the communication between the CPU2 and the CPU1
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* and shall not be modified by the application
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* The two following definitions shall not be modified
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*/
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#define HAL_IPCC_TX_IRQHandler(...) HW_IPCC_Tx_Handler( )
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#define HAL_IPCC_RX_IRQHandler(...) HW_IPCC_Rx_Handler( )
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/******************************************************************************
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* Low Power
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*
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* When CFG_FULL_LOW_POWER is set to 1, the system is configured in full
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* low power mode. It means that all what can have an impact on the consumptions
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* are powered down.(For instance LED, Access to Debugger, Etc.)
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*
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* When CFG_FULL_LOW_POWER is set to 0, the low power mode is not activated
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*
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******************************************************************************/
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#define CFG_FULL_LOW_POWER 0
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#if (CFG_FULL_LOW_POWER == 1)
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#undef CFG_LPM_SUPPORTED
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#define CFG_LPM_SUPPORTED 1
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#endif /* CFG_FULL_LOW_POWER */
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/******************************************************************************
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* RTC interface
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******************************************************************************/
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#define HAL_RTCEx_WakeUpTimerIRQHandler(...) HW_TS_RTC_Wakeup_Handler( )
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/******************************************************************************
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* Timer Server
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******************************************************************************/
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/**
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* CFG_RTC_WUCKSEL_DIVIDER: This sets the RTCCLK divider to the wakeup timer.
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* The lower is the value, the better is the power consumption and the accuracy of the timerserver
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* The higher is the value, the finest is the granularity
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*
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* CFG_RTC_ASYNCH_PRESCALER: This sets the asynchronous prescaler of the RTC. It should as high as possible ( to output
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* clock as low as possible) but the output clock should be equal or higher frequency compare to the clock feeding
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* the wakeup timer. A lower clock speed would impact the accuracy of the timer server.
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*
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* CFG_RTC_SYNCH_PRESCALER: This sets the synchronous prescaler of the RTC.
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* When the 1Hz calendar clock is required, it shall be sets according to other settings
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* When the 1Hz calendar clock is not needed, CFG_RTC_SYNCH_PRESCALER should be set to 0x7FFF (MAX VALUE)
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*
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* CFG_RTCCLK_DIVIDER_CONF:
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* Shall be set to either 0,2,4,8,16
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* When set to either 2,4,8,16, the 1Hhz calendar is supported
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* When set to 0, the user sets its own configuration
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*
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* The following settings are computed with LSI as input to the RTC
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*/
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#define CFG_RTCCLK_DIVIDER_CONF 0
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#if (CFG_RTCCLK_DIVIDER_CONF == 0)
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/**
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* Custom configuration
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* It does not support 1Hz calendar
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* It divides the RTC CLK by 16
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*/
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#define CFG_RTCCLK_DIV (16)
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#define CFG_RTC_WUCKSEL_DIVIDER (0)
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#define CFG_RTC_ASYNCH_PRESCALER (0x0F)
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#define CFG_RTC_SYNCH_PRESCALER (0x7FFF)
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#else
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#if (CFG_RTCCLK_DIVIDER_CONF == 2)
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/**
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* It divides the RTC CLK by 2
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*/
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#define CFG_RTC_WUCKSEL_DIVIDER (3)
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#endif
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#if (CFG_RTCCLK_DIVIDER_CONF == 4)
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/**
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* It divides the RTC CLK by 4
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*/
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#define CFG_RTC_WUCKSEL_DIVIDER (2)
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#endif
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#if (CFG_RTCCLK_DIVIDER_CONF == 8)
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/**
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* It divides the RTC CLK by 8
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*/
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#define CFG_RTC_WUCKSEL_DIVIDER (1)
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#endif
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#if (CFG_RTCCLK_DIVIDER_CONF == 16)
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/**
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* It divides the RTC CLK by 16
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*/
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#define CFG_RTC_WUCKSEL_DIVIDER (0)
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#endif
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#define CFG_RTCCLK_DIV CFG_RTCCLK_DIVIDER_CONF
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#define CFG_RTC_ASYNCH_PRESCALER (CFG_RTCCLK_DIV - 1)
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#define CFG_RTC_SYNCH_PRESCALER (DIVR( LSE_VALUE, (CFG_RTC_ASYNCH_PRESCALER+1) ) - 1 )
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#endif
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/** tick timer values */
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#define CFG_TS_TICK_VAL DIVR( (CFG_RTCCLK_DIV * 1000000), LSE_VALUE )
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#define CFG_TS_TICK_VAL_PS DIVR( ((uint64_t)CFG_RTCCLK_DIV * 1e12), (uint64_t)LSE_VALUE )
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typedef enum
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{
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CFG_TIM_PROC_ID_ISR,
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/* USER CODE BEGIN CFG_TimProcID_t */
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|
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/* USER CODE END CFG_TimProcID_t */
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} CFG_TimProcID_t;
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|
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/******************************************************************************
|
||||
* Debug
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||||
******************************************************************************/
|
||||
/**
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||||
* When set, this resets some hw resources to put the device in the same state as at power up.
|
||||
* It resets only register that may prevent the FW to run properly.
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*
|
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* This shall be set to 0 in a final product
|
||||
*
|
||||
*/
|
||||
#define CFG_HW_RESET_BY_FW 0
|
||||
|
||||
/**
|
||||
* keep debugger enabled while in any low power mode when set to 1
|
||||
* should be set to 0 in production
|
||||
*/
|
||||
#define CFG_DEBUGGER_SUPPORTED 1
|
||||
|
||||
#if (CFG_FULL_LOW_POWER == 1)
|
||||
#undef CFG_DEBUGGER_SUPPORTED
|
||||
#define CFG_DEBUGGER_SUPPORTED 0
|
||||
#endif /* CFG_FULL_LOW_POWER */
|
||||
|
||||
/*****************************************************************************
|
||||
* Traces
|
||||
* Enable or Disable traces in application
|
||||
* When CFG_DEBUG_TRACE is set, traces are activated
|
||||
*
|
||||
* Note : Refer to utilities_conf.h file in order to details
|
||||
* the level of traces : CFG_DEBUG_TRACE_FULL or CFG_DEBUG_TRACE_LIGHT
|
||||
*****************************************************************************/
|
||||
#define CFG_DEBUG_TRACE 1
|
||||
|
||||
#if (CFG_FULL_LOW_POWER == 1)
|
||||
#undef CFG_DEBUG_TRACE
|
||||
#define CFG_DEBUG_TRACE 0
|
||||
#endif /* CFG_FULL_LOW_POWER */
|
||||
|
||||
/**
|
||||
* When CFG_DEBUG_TRACE_FULL is set to 1, the trace are output with the API name, the file name and the line number
|
||||
* When CFG_DEBUG_TRACE_LIGHT is set to 1, only the debug message is output
|
||||
*
|
||||
* When both are set to 0, no trace are output
|
||||
* When both are set to 1, CFG_DEBUG_TRACE_FULL is selected
|
||||
*/
|
||||
#define CFG_DEBUG_TRACE_LIGHT 1
|
||||
#define CFG_DEBUG_TRACE_FULL 0
|
||||
|
||||
#if (( CFG_DEBUG_TRACE != 0 ) && ( CFG_DEBUG_TRACE_LIGHT == 0 ) && (CFG_DEBUG_TRACE_FULL == 0))
|
||||
#undef CFG_DEBUG_TRACE_FULL
|
||||
#undef CFG_DEBUG_TRACE_LIGHT
|
||||
#define CFG_DEBUG_TRACE_FULL 0
|
||||
#define CFG_DEBUG_TRACE_LIGHT 1
|
||||
#endif
|
||||
|
||||
#if ( CFG_DEBUG_TRACE == 0 )
|
||||
#undef CFG_DEBUG_TRACE_FULL
|
||||
#undef CFG_DEBUG_TRACE_LIGHT
|
||||
#define CFG_DEBUG_TRACE_FULL 0
|
||||
#define CFG_DEBUG_TRACE_LIGHT 0
|
||||
#endif
|
||||
|
||||
/**
|
||||
* When not set, the traces is looping on sending the trace over UART
|
||||
*/
|
||||
#define DBG_TRACE_USE_CIRCULAR_QUEUE 1
|
||||
|
||||
/**
|
||||
* max buffer Size to queue data traces and max data trace allowed.
|
||||
* Only Used if DBG_TRACE_USE_CIRCULAR_QUEUE is defined
|
||||
*/
|
||||
#define DBG_TRACE_MSG_QUEUE_SIZE 4096
|
||||
#define MAX_DBG_TRACE_MSG_SIZE 1024
|
||||
|
||||
/******************************************************************************
|
||||
* Configure Log level for Application
|
||||
******************************************************************************/
|
||||
#define APPLI_CONFIG_LOG_LEVEL LOG_LEVEL_INFO
|
||||
#define APPLI_PRINT_FILE_FUNC_LINE 0
|
||||
|
||||
/* USER CODE BEGIN Defines */
|
||||
/******************************************************************************
|
||||
* User interaction
|
||||
* When CFG_LED_SUPPORTED is set, LEDS are activated if requested
|
||||
* When CFG_BUTTON_SUPPORTED is set, the push button are activated if requested
|
||||
******************************************************************************/
|
||||
#if (CFG_FULL_LOW_POWER == 1)
|
||||
#define CFG_LED_SUPPORTED 0
|
||||
#define CFG_BUTTON_SUPPORTED 0
|
||||
#else
|
||||
#define CFG_LED_SUPPORTED 1
|
||||
#define CFG_BUTTON_SUPPORTED 1
|
||||
#endif /* CFG_FULL_LOW_POWER */
|
||||
|
||||
/* USER CODE END Defines */
|
||||
|
||||
/******************************************************************************
|
||||
* Scheduler
|
||||
******************************************************************************/
|
||||
/**
|
||||
* This is the list of task id required by the application
|
||||
* Each Id shall be in the range 0..31
|
||||
*/
|
||||
|
||||
typedef enum
|
||||
{
|
||||
CFG_TASK_NOTIFY_FROM_M0_TO_M4,
|
||||
CFG_TASK_REQUEST_FROM_M0_TO_M4,
|
||||
CFG_TASK_ZIGBEE_NETWORK_FORM,
|
||||
CFG_TASK_SYSTEM_HCI_ASYNCH_EVT,
|
||||
#if (CFG_USB_INTERFACE_ENABLE != 0)
|
||||
CFG_TASK_VCP_SEND_DATA,
|
||||
#endif /* (CFG_USB_INTERFACE_ENABLE != 0) */
|
||||
/* USER CODE BEGIN CFG_IdleTask_Id_t */
|
||||
|
||||
/* USER CODE END CFG_IdleTask_Id_t */
|
||||
CFG_TASK_NBR /**< Shall be last in the list */
|
||||
} CFG_IdleTask_Id_t;
|
||||
|
||||
/* Scheduler types and defines */
|
||||
/*------------------------------------*/
|
||||
#define EVENT_ACK_FROM_M0_EVT (1U << CFG_EVT_ACK_FROM_M0_EVT)
|
||||
#define EVENT_SYNCHRO_BYPASS_IDLE (1U << CFG_EVT_SYNCHRO_BYPASS_IDLE)
|
||||
/* USER CODE BEGIN DEFINE_TASK */
|
||||
|
||||
/* USER CODE END DEFINE_TASK */
|
||||
|
||||
/**
|
||||
* This is the list of priority required by the application
|
||||
* Each Id shall be in the range 0..31
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
CFG_SCH_PRIO_0,
|
||||
CFG_SCH_PRIO_1,
|
||||
/* USER CODE BEGIN CFG_SCH_Prio_Id_t */
|
||||
|
||||
/* USER CODE END CFG_SCH_Prio_Id_t */
|
||||
CFG_SCH_PRIO_NBR /**< Shall be last in the list */
|
||||
} CFG_SCH_Prio_Id_t;
|
||||
|
||||
/**
|
||||
* This is a bit mapping over 32bits listing all events id supported in the application
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
CFG_EVT_SYSTEM_HCI_CMD_EVT_RESP,
|
||||
CFG_EVT_ACK_FROM_M0_EVT,
|
||||
CFG_EVT_SYNCHRO_BYPASS_IDLE,
|
||||
CFG_EVT_ZIGBEE_STARTUP_ENDED,
|
||||
/* USER CODE BEGIN CFG_IdleEvt_Id_t */
|
||||
|
||||
/* USER CODE END CFG_IdleEvt_Id_t */
|
||||
} CFG_IdleEvt_Id_t;
|
||||
|
||||
#define EVENT_ACK_FROM_M0_EVT (1U << CFG_EVT_ACK_FROM_M0_EVT)
|
||||
#define EVENT_SYNCHRO_BYPASS_IDLE (1U << CFG_EVT_SYNCHRO_BYPASS_IDLE)
|
||||
#define EVENT_ZIGBEE_STARTUP_ENDED (1U << CFG_EVT_ZIGBEE_STARTUP_ENDED)
|
||||
/* USER CODE BEGIN DEFINE_EVENT */
|
||||
|
||||
/* USER CODE END DEFINE_EVENT */
|
||||
|
||||
/******************************************************************************
|
||||
* LOW POWER
|
||||
******************************************************************************/
|
||||
/**
|
||||
* Supported requester to the MCU Low Power Manager - can be increased up to 32
|
||||
* It list a bit mapping of all user of the Low Power Manager
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
CFG_LPM_APP,
|
||||
/* USER CODE BEGIN CFG_LPM_Id_t */
|
||||
|
||||
/* USER CODE END CFG_LPM_Id_t */
|
||||
} CFG_LPM_Id_t;
|
||||
|
||||
/******************************************************************************
|
||||
* OTP manager
|
||||
******************************************************************************/
|
||||
#define CFG_OTP_BASE_ADDRESS OTP_AREA_BASE
|
||||
|
||||
#define CFG_OTP_END_ADRESS OTP_AREA_END_ADDR
|
||||
|
||||
#endif /*APP_CONF_H */
|
||||
|
||||
71
Core/Inc/app_entry.h
Normal file
71
Core/Inc/app_entry.h
Normal file
@@ -0,0 +1,71 @@
|
||||
/* USER CODE BEGIN Header */
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file app_entry.h
|
||||
* @author MCD Application Team
|
||||
* @brief Interface to the application
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2019-2023 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
/* USER CODE END Header */
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef APP_ENTRY_H
|
||||
#define APP_ENTRY_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
|
||||
/* Private includes ----------------------------------------------------------*/
|
||||
/* USER CODE BEGIN Includes */
|
||||
|
||||
/* USER CODE END Includes */
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/* USER CODE BEGIN ET */
|
||||
|
||||
/* USER CODE END ET */
|
||||
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
/* USER CODE BEGIN EC */
|
||||
|
||||
/* USER CODE END EC */
|
||||
|
||||
/* Exported variables --------------------------------------------------------*/
|
||||
/* USER CODE BEGIN EV */
|
||||
|
||||
/* USER CODE END EV */
|
||||
|
||||
/* Exported macros ------------------------------------------------------------*/
|
||||
/* USER CODE BEGIN EM */
|
||||
|
||||
/* USER CODE END EM */
|
||||
|
||||
/* Exported functions ---------------------------------------------*/
|
||||
void MX_APPE_Config(void);
|
||||
void MX_APPE_Init(void);
|
||||
void MX_APPE_Process(void);
|
||||
void Init_Exti(void);
|
||||
void Init_Smps(void);
|
||||
|
||||
/* USER CODE BEGIN EF */
|
||||
|
||||
/* USER CODE END EF */
|
||||
|
||||
#ifdef __cplusplus
|
||||
} /* extern "C" */
|
||||
#endif
|
||||
|
||||
#endif /*APP_ENTRY_H */
|
||||
264
Core/Inc/hw_conf.h
Normal file
264
Core/Inc/hw_conf.h
Normal file
@@ -0,0 +1,264 @@
|
||||
/* USER CODE BEGIN Header */
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file hw_conf.h
|
||||
* @author MCD Application Team
|
||||
* @brief Configuration of hardware interface
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2019-2023 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
/* USER CODE END Header */
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef HW_CONF_H
|
||||
#define HW_CONF_H
|
||||
|
||||
/******************************************************************************
|
||||
* Semaphores
|
||||
* THIS SHALL NO BE CHANGED AS THESE SEMAPHORES ARE USED AS WELL ON THE CM0+
|
||||
*****************************************************************************/
|
||||
/**
|
||||
* The CPU2 may be configured to store the Thread persistent data either in internal NVM storage on CPU2 or in
|
||||
* SRAM2 buffer provided by the user application. This can be configured with the system command SHCI_C2_Config()
|
||||
* When the CPU2 is requested to store persistent data in SRAM2, it can write data in this buffer at any time when needed.
|
||||
* In order to read consistent data with the CPU1 from the SRAM2 buffer, the flow should be:
|
||||
* + CPU1 takes CFG_HW_THREAD_NVM_SRAM_SEMID semaphore
|
||||
* + CPU1 reads all persistent data from SRAM2 (most of the time, the goal is to write these data into an NVM managed by CPU1)
|
||||
* + CPU1 releases CFG_HW_THREAD_NVM_SRAM_SEMID semaphore
|
||||
* CFG_HW_THREAD_NVM_SRAM_SEMID semaphore makes sure CPU2 does not update the persistent data in SRAM2 at the same time CPU1 is reading them.
|
||||
* There is no timing constraint on how long this semaphore can be kept.
|
||||
*/
|
||||
#define CFG_HW_THREAD_NVM_SRAM_SEMID 9
|
||||
|
||||
/**
|
||||
* The CPU2 may be configured to store the BLE persistent data either in internal NVM storage on CPU2 or in
|
||||
* SRAM2 buffer provided by the user application. This can be configured with the system command SHCI_C2_Config()
|
||||
* When the CPU2 is requested to store persistent data in SRAM2, it can write data in this buffer at any time when needed.
|
||||
* In order to read consistent data with the CPU1 from the SRAM2 buffer, the flow should be:
|
||||
* + CPU1 takes CFG_HW_BLE_NVM_SRAM_SEMID semaphore
|
||||
* + CPU1 reads all persistent data from SRAM2 (most of the time, the goal is to write these data into an NVM managed by CPU1)
|
||||
* + CPU1 releases CFG_HW_BLE_NVM_SRAM_SEMID semaphore
|
||||
* CFG_HW_BLE_NVM_SRAM_SEMID semaphore makes sure CPU2 does not update the persistent data in SRAM2 at the same time CPU1 is reading them.
|
||||
* There is no timing constraint on how long this semaphore can be kept.
|
||||
*/
|
||||
#define CFG_HW_BLE_NVM_SRAM_SEMID 8
|
||||
|
||||
/**
|
||||
* Index of the semaphore used by CPU2 to prevent the CPU1 to either write or erase data in flash
|
||||
* The CPU1 shall not either write or erase in flash when this semaphore is taken by the CPU2
|
||||
* When the CPU1 needs to either write or erase in flash, it shall first get the semaphore and release it just
|
||||
* after writing a raw (64bits data) or erasing one sector.
|
||||
* Once the Semaphore has been released, there shall be at least 1us before it can be taken again. This is required
|
||||
* to give the opportunity to CPU2 to take it.
|
||||
* On v1.4.0 and older CPU2 wireless firmware, this semaphore is unused and CPU2 is using PES bit.
|
||||
* By default, CPU2 is using the PES bit to protect its timing. The CPU1 may request the CPU2 to use the semaphore
|
||||
* instead of the PES bit by sending the system command SHCI_C2_SetFlashActivityControl()
|
||||
*/
|
||||
#define CFG_HW_BLOCK_FLASH_REQ_BY_CPU2_SEMID 7
|
||||
|
||||
/**
|
||||
* Index of the semaphore used by CPU1 to prevent the CPU2 to either write or erase data in flash
|
||||
* In order to protect its timing, the CPU1 may get this semaphore to prevent the CPU2 to either
|
||||
* write or erase in flash (as this will stall both CPUs)
|
||||
* The PES bit shall not be used as this may stall the CPU2 in some cases.
|
||||
*/
|
||||
#define CFG_HW_BLOCK_FLASH_REQ_BY_CPU1_SEMID 6
|
||||
|
||||
/**
|
||||
* Index of the semaphore used to manage the CLK48 clock configuration
|
||||
* When the USB is required, this semaphore shall be taken before configuring te CLK48 for USB
|
||||
* and should be released after the application switch OFF the clock when the USB is not used anymore
|
||||
* When using the RNG, it is good enough to use CFG_HW_RNG_SEMID to control CLK48.
|
||||
* More details in AN5289
|
||||
*/
|
||||
#define CFG_HW_CLK48_CONFIG_SEMID 5
|
||||
|
||||
/* Index of the semaphore used to manage the entry Stop Mode procedure */
|
||||
#define CFG_HW_ENTRY_STOP_MODE_SEMID 4
|
||||
|
||||
/* Index of the semaphore used to access the RCC */
|
||||
#define CFG_HW_RCC_SEMID 3
|
||||
|
||||
/* Index of the semaphore used to access the FLASH */
|
||||
#define CFG_HW_FLASH_SEMID 2
|
||||
|
||||
/* Index of the semaphore used to access the PKA */
|
||||
#define CFG_HW_PKA_SEMID 1
|
||||
|
||||
/* Index of the semaphore used to access the RNG */
|
||||
#define CFG_HW_RNG_SEMID 0
|
||||
|
||||
/******************************************************************************
|
||||
* HW TIMER SERVER
|
||||
*****************************************************************************/
|
||||
/**
|
||||
* The user may define the maximum number of virtual timers supported.
|
||||
* It shall not exceed 255
|
||||
*/
|
||||
#define CFG_HW_TS_MAX_NBR_CONCURRENT_TIMER 6
|
||||
|
||||
/**
|
||||
* The user may define the priority in the NVIC of the RTC_WKUP interrupt handler that is used to manage the
|
||||
* wakeup timer.
|
||||
* This setting is the preemptpriority part of the NVIC.
|
||||
*/
|
||||
#define CFG_HW_TS_NVIC_RTC_WAKEUP_IT_PREEMPTPRIO 3
|
||||
|
||||
/**
|
||||
* The user may define the priority in the NVIC of the RTC_WKUP interrupt handler that is used to manage the
|
||||
* wakeup timer.
|
||||
* This setting is the subpriority part of the NVIC. It does not exist on all processors. When it is not supported
|
||||
* on the CPU, the setting is ignored
|
||||
*/
|
||||
#define CFG_HW_TS_NVIC_RTC_WAKEUP_IT_SUBPRIO 0
|
||||
|
||||
/**
|
||||
* Define a critical section in the Timer server
|
||||
* The Timer server does not support the API to be nested
|
||||
* The Application shall either:
|
||||
* a) Ensure this will never happen
|
||||
* b) Define the critical section
|
||||
* The default implementations is masking all interrupts using the PRIMASK bit
|
||||
* The TimerServer driver uses critical sections to avoid context corruption. This is achieved with the macro
|
||||
* TIMER_ENTER_CRITICAL_SECTION and TIMER_EXIT_CRITICAL_SECTION. When CFG_HW_TS_USE_PRIMASK_AS_CRITICAL_SECTION is set
|
||||
* to 1, all STM32 interrupts are masked with the PRIMASK bit of the CortexM CPU. It is possible to use the BASEPRI
|
||||
* register of the CortexM CPU to keep allowed some interrupts with high priority. In that case, the user shall
|
||||
* re-implement TIMER_ENTER_CRITICAL_SECTION and TIMER_EXIT_CRITICAL_SECTION and shall make sure that no TimerServer
|
||||
* API are called when the TIMER critical section is entered
|
||||
*/
|
||||
#define CFG_HW_TS_USE_PRIMASK_AS_CRITICAL_SECTION 1
|
||||
|
||||
/**
|
||||
* This value shall reflect the maximum delay there could be in the application between the time the RTC interrupt
|
||||
* is generated by the Hardware and the time when the RTC interrupt handler is called. This time is measured in
|
||||
* number of RTCCLK ticks.
|
||||
* A relaxed timing would be 10ms
|
||||
* When the value is too short, the timerserver will not be able to count properly and all timeout may be random.
|
||||
* When the value is too long, the device may wake up more often than the most optimal configuration. However, the
|
||||
* impact on power consumption would be marginal (unless the value selected is extremely too long). It is strongly
|
||||
* recommended to select a value large enough to make sure it is not too short to ensure reliability of the system
|
||||
* as this will have marginal impact on low power mode
|
||||
*/
|
||||
#define CFG_HW_TS_RTC_HANDLER_MAX_DELAY ( 10 * (LSI_VALUE/1000) )
|
||||
|
||||
/**
|
||||
* Interrupt ID in the NVIC of the RTC Wakeup interrupt handler
|
||||
* It shall be type of IRQn_Type
|
||||
*/
|
||||
#define CFG_HW_TS_RTC_WAKEUP_HANDLER_ID RTC_WKUP_IRQn
|
||||
|
||||
/******************************************************************************
|
||||
* HW UART
|
||||
*****************************************************************************/
|
||||
#define CFG_HW_LPUART1_ENABLED 1
|
||||
#define CFG_HW_LPUART1_DMA_TX_SUPPORTED 1
|
||||
|
||||
#define CFG_HW_USART1_ENABLED 1
|
||||
#define CFG_HW_USART1_DMA_TX_SUPPORTED 1
|
||||
|
||||
/**
|
||||
* LPUART1
|
||||
*/
|
||||
#define CFG_HW_LPUART1_PREEMPTPRIORITY 0x0F
|
||||
#define CFG_HW_LPUART1_SUBPRIORITY 0
|
||||
|
||||
/** < The application shall check the selected source clock is enable */
|
||||
#define CFG_HW_LPUART1_SOURCE_CLOCK RCC_LPUART1CLKSOURCE_SYSCLK
|
||||
|
||||
#define CFG_HW_LPUART1_BAUDRATE 115200
|
||||
#define CFG_HW_LPUART1_WORDLENGTH UART_WORDLENGTH_8B
|
||||
#define CFG_HW_LPUART1_STOPBITS UART_STOPBITS_1
|
||||
#define CFG_HW_LPUART1_PARITY UART_PARITY_NONE
|
||||
#define CFG_HW_LPUART1_HWFLOWCTL UART_HWCONTROL_NONE
|
||||
#define CFG_HW_LPUART1_MODE UART_MODE_TX_RX
|
||||
#define CFG_HW_LPUART1_ADVFEATUREINIT UART_ADVFEATURE_NO_INIT
|
||||
#define CFG_HW_LPUART1_OVERSAMPLING UART_OVERSAMPLING_8
|
||||
|
||||
#define CFG_HW_LPUART1_TX_PORT_CLK_ENABLE __HAL_RCC_GPIOA_CLK_ENABLE
|
||||
#define CFG_HW_LPUART1_TX_PORT GPIOA
|
||||
#define CFG_HW_LPUART1_TX_PIN GPIO_PIN_2
|
||||
#define CFG_HW_LPUART1_TX_MODE GPIO_MODE_AF_PP
|
||||
#define CFG_HW_LPUART1_TX_PULL GPIO_NOPULL
|
||||
#define CFG_HW_LPUART1_TX_SPEED GPIO_SPEED_FREQ_VERY_HIGH
|
||||
#define CFG_HW_LPUART1_TX_ALTERNATE GPIO_AF8_LPUART1
|
||||
|
||||
#define CFG_HW_LPUART1_RX_PORT_CLK_ENABLE __HAL_RCC_GPIOA_CLK_ENABLE
|
||||
#define CFG_HW_LPUART1_RX_PORT GPIOA
|
||||
#define CFG_HW_LPUART1_RX_PIN GPIO_PIN_3
|
||||
#define CFG_HW_LPUART1_RX_MODE GPIO_MODE_AF_PP
|
||||
#define CFG_HW_LPUART1_RX_PULL GPIO_NOPULL
|
||||
#define CFG_HW_LPUART1_RX_SPEED GPIO_SPEED_FREQ_VERY_HIGH
|
||||
#define CFG_HW_LPUART1_RX_ALTERNATE GPIO_AF8_LPUART1
|
||||
|
||||
#define CFG_HW_LPUART1_DMA_TX_PREEMPTPRIORITY 0x0F
|
||||
#define CFG_HW_LPUART1_DMA_TX_SUBPRIORITY 0
|
||||
|
||||
#define CFG_HW_LPUART1_DMAMUX_CLK_ENABLE __HAL_RCC_DMAMUX1_CLK_ENABLE
|
||||
#define CFG_HW_LPUART1_DMA_CLK_ENABLE __HAL_RCC_DMA1_CLK_ENABLE
|
||||
#define CFG_HW_LPUART1_TX_DMA_REQ DMA_REQUEST_LPUART1_TX
|
||||
#define CFG_HW_LPUART1_TX_DMA_CHANNEL DMA1_Channel1
|
||||
#define CFG_HW_LPUART1_TX_DMA_IRQn DMA1_Channel1_IRQn
|
||||
#define CFG_HW_LPUART1_DMA_TX_IRQHandler DMA1_Channel1_IRQHandler
|
||||
|
||||
/**
|
||||
* UART1
|
||||
*/
|
||||
#define CFG_HW_USART1_PREEMPTPRIORITY 0x0F
|
||||
#define CFG_HW_USART1_SUBPRIORITY 0
|
||||
|
||||
/** < The application shall check the selected source clock is enable */
|
||||
#define CFG_HW_USART1_SOURCE_CLOCK RCC_USART1CLKSOURCE_SYSCLK
|
||||
|
||||
#define CFG_HW_USART1_BAUDRATE 115200
|
||||
#define CFG_HW_USART1_WORDLENGTH UART_WORDLENGTH_8B
|
||||
#define CFG_HW_USART1_STOPBITS UART_STOPBITS_1
|
||||
#define CFG_HW_USART1_PARITY UART_PARITY_NONE
|
||||
#define CFG_HW_USART1_HWFLOWCTL UART_HWCONTROL_NONE
|
||||
#define CFG_HW_USART1_MODE UART_MODE_TX_RX
|
||||
#define CFG_HW_USART1_ADVFEATUREINIT UART_ADVFEATURE_NO_INIT
|
||||
#define CFG_HW_USART1_OVERSAMPLING UART_OVERSAMPLING_8
|
||||
|
||||
#define CFG_HW_USART1_TX_PORT_CLK_ENABLE __HAL_RCC_GPIOB_CLK_ENABLE
|
||||
#define CFG_HW_USART1_TX_PORT GPIOB
|
||||
#define CFG_HW_USART1_TX_PIN GPIO_PIN_6
|
||||
#define CFG_HW_USART1_TX_MODE GPIO_MODE_AF_PP
|
||||
#define CFG_HW_USART1_TX_PULL GPIO_NOPULL
|
||||
#define CFG_HW_USART1_TX_SPEED GPIO_SPEED_FREQ_VERY_HIGH
|
||||
#define CFG_HW_USART1_TX_ALTERNATE GPIO_AF7_USART1
|
||||
|
||||
#define CFG_HW_USART1_RX_PORT_CLK_ENABLE __HAL_RCC_GPIOB_CLK_ENABLE
|
||||
#define CFG_HW_USART1_RX_PORT GPIOB
|
||||
#define CFG_HW_USART1_RX_PIN GPIO_PIN_7
|
||||
#define CFG_HW_USART1_RX_MODE GPIO_MODE_AF_PP
|
||||
#define CFG_HW_USART1_RX_PULL GPIO_NOPULL
|
||||
#define CFG_HW_USART1_RX_SPEED GPIO_SPEED_FREQ_VERY_HIGH
|
||||
#define CFG_HW_USART1_RX_ALTERNATE GPIO_AF7_USART1
|
||||
|
||||
#define CFG_HW_USART1_CTS_PORT_CLK_ENABLE __HAL_RCC_GPIOA_CLK_ENABLE
|
||||
#define CFG_HW_USART1_CTS_PORT GPIOA
|
||||
#define CFG_HW_USART1_CTS_PIN GPIO_PIN_11
|
||||
#define CFG_HW_USART1_CTS_MODE GPIO_MODE_AF_PP
|
||||
#define CFG_HW_USART1_CTS_PULL GPIO_PULLDOWN
|
||||
#define CFG_HW_USART1_CTS_SPEED GPIO_SPEED_FREQ_VERY_HIGH
|
||||
#define CFG_HW_USART1_CTS_ALTERNATE GPIO_AF7_USART1
|
||||
|
||||
#define CFG_HW_USART1_DMA_TX_PREEMPTPRIORITY 0x0F
|
||||
#define CFG_HW_USART1_DMA_TX_SUBPRIORITY 0
|
||||
|
||||
#define CFG_HW_USART1_DMAMUX_CLK_ENABLE __HAL_RCC_DMAMUX1_CLK_ENABLE
|
||||
#define CFG_HW_USART1_DMA_CLK_ENABLE __HAL_RCC_DMA1_CLK_ENABLE
|
||||
#define CFG_HW_USART1_TX_DMA_REQ DMA_REQUEST_USART1_TX
|
||||
#define CFG_HW_USART1_TX_DMA_CHANNEL DMA1_Channel2
|
||||
#define CFG_HW_USART1_TX_DMA_IRQn DMA1_Channel2_IRQn
|
||||
#define CFG_HW_USART1_DMA_TX_IRQHandler DMA1_Channel2_IRQHandler
|
||||
|
||||
#endif /*HW_CONF_H */
|
||||
247
Core/Inc/hw_if.h
Normal file
247
Core/Inc/hw_if.h
Normal file
@@ -0,0 +1,247 @@
|
||||
/* USER CODE BEGIN Header */
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file hw_if.h
|
||||
* @author MCD Application Team
|
||||
* @brief Hardware Interface
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2020-2023 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
/* USER CODE END Header */
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef HW_IF_H
|
||||
#define HW_IF_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32wbxx.h"
|
||||
#include "stm32wbxx_ll_exti.h"
|
||||
#include "stm32wbxx_ll_system.h"
|
||||
#include "stm32wbxx_ll_rcc.h"
|
||||
#include "stm32wbxx_ll_ipcc.h"
|
||||
#include "stm32wbxx_ll_bus.h"
|
||||
#include "stm32wbxx_ll_pwr.h"
|
||||
#include "stm32wbxx_ll_cortex.h"
|
||||
#include "stm32wbxx_ll_utils.h"
|
||||
#include "stm32wbxx_ll_hsem.h"
|
||||
#include "stm32wbxx_ll_gpio.h"
|
||||
#include "stm32wbxx_ll_rtc.h"
|
||||
|
||||
#ifdef USE_STM32WBXX_USB_DONGLE
|
||||
#include "stm32wbxx_usb_dongle.h"
|
||||
#endif
|
||||
#ifdef USE_STM32WBXX_NUCLEO
|
||||
#include "stm32wbxx_nucleo.h"
|
||||
#endif
|
||||
#ifdef USE_X_NUCLEO_EPD
|
||||
#include "x_nucleo_epd.h"
|
||||
#endif
|
||||
|
||||
/* Private includes ----------------------------------------------------------*/
|
||||
/* USER CODE BEGIN Includes */
|
||||
|
||||
/* USER CODE END Includes */
|
||||
|
||||
/******************************************************************************
|
||||
* HW UART
|
||||
******************************************************************************/
|
||||
typedef enum
|
||||
{
|
||||
hw_uart1,
|
||||
hw_uart2,
|
||||
hw_lpuart1,
|
||||
} hw_uart_id_t;
|
||||
|
||||
typedef enum
|
||||
{
|
||||
hw_uart_ok,
|
||||
hw_uart_error,
|
||||
hw_uart_busy,
|
||||
hw_uart_to,
|
||||
} hw_status_t;
|
||||
|
||||
void HW_UART_Init(hw_uart_id_t hw_uart_id);
|
||||
void HW_UART_Receive_IT(hw_uart_id_t hw_uart_id, uint8_t *pData, uint16_t Size, void (*Callback)(void));
|
||||
void HW_UART_Transmit_IT(hw_uart_id_t hw_uart_id, uint8_t *pData, uint16_t Size, void (*Callback)(void));
|
||||
hw_status_t HW_UART_Transmit(hw_uart_id_t hw_uart_id, uint8_t *p_data, uint16_t size, uint32_t timeout);
|
||||
hw_status_t HW_UART_Transmit_DMA(hw_uart_id_t hw_uart_id, uint8_t *p_data, uint16_t size, void (*Callback)(void));
|
||||
void HW_UART_Interrupt_Handler(hw_uart_id_t hw_uart_id);
|
||||
void HW_UART_DMA_Interrupt_Handler(hw_uart_id_t hw_uart_id);
|
||||
|
||||
/******************************************************************************
|
||||
* HW TimerServer
|
||||
******************************************************************************/
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/**
|
||||
* This setting is used when standby mode is supported.
|
||||
* hw_ts_InitMode_Limited should be used when the device restarts from Standby Mode. In that case, the Timer Server does
|
||||
* not re-initialized its context. Only the Hardware register which content has been lost is reconfigured
|
||||
* Otherwise, hw_ts_InitMode_Full should be requested (Start from Power ON) and everything is re-initialized.
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
hw_ts_InitMode_Full,
|
||||
hw_ts_InitMode_Limited,
|
||||
} HW_TS_InitMode_t;
|
||||
|
||||
/**
|
||||
* When a Timer is created as a SingleShot timer, it is not automatically restarted when the timeout occurs. However,
|
||||
* the timer is kept reserved in the list and could be restarted at anytime with HW_TS_Start()
|
||||
*
|
||||
* When a Timer is created as a Repeated timer, it is automatically restarted when the timeout occurs.
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
hw_ts_SingleShot,
|
||||
hw_ts_Repeated
|
||||
} HW_TS_Mode_t;
|
||||
|
||||
/**
|
||||
* hw_ts_Successful is returned when a Timer has been successfully created with HW_TS_Create(). Otherwise, hw_ts_Failed
|
||||
* is returned. When hw_ts_Failed is returned, that means there are not enough free slots in the list to create a
|
||||
* Timer. In that case, CFG_HW_TS_MAX_NBR_CONCURRENT_TIMER should be increased
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
hw_ts_Successful,
|
||||
hw_ts_Failed,
|
||||
}HW_TS_ReturnStatus_t;
|
||||
|
||||
typedef void (*HW_TS_pTimerCb_t)(void);
|
||||
|
||||
/**
|
||||
* @brief Initialize the timer server
|
||||
* This API shall be called by the application before any timer is requested to the timer server. It
|
||||
* configures the RTC module to be connected to the LSI input clock.
|
||||
*
|
||||
* @param TimerInitMode: When the device restarts from Standby, it should request hw_ts_InitMode_Limited so that the
|
||||
* Timer context is not re-initialized. Otherwise, hw_ts_InitMode_Full should be requested
|
||||
* @param hrtc: RTC Handle
|
||||
* @retval None
|
||||
*/
|
||||
void HW_TS_Init(HW_TS_InitMode_t TimerInitMode, RTC_HandleTypeDef *hrtc);
|
||||
|
||||
/**
|
||||
* @brief Interface to create a virtual timer
|
||||
* The user shall call this API to create a timer. Once created, the timer is reserved to the module until it
|
||||
* has been deleted. When creating a timer, the user shall specify the mode (single shot or repeated), the
|
||||
* callback to be notified when the timer expires and a module ID to identify in the timer interrupt handler
|
||||
* which module is concerned. In return, the user gets a timer ID to handle it.
|
||||
*
|
||||
* @param TimerProcessID: This is an identifier provided by the user and returned in the callback to allow
|
||||
* identification of the requester
|
||||
* @param pTimerId: Timer Id returned to the user to request operation (start, stop, delete)
|
||||
* @param TimerMode: Mode of the virtual timer (Single shot or repeated)
|
||||
* @param pTimerCallBack: Callback when the virtual timer expires
|
||||
* @retval HW_TS_ReturnStatus_t: Return whether the creation is successful or not
|
||||
*/
|
||||
HW_TS_ReturnStatus_t HW_TS_Create(uint32_t TimerProcessID, uint8_t *pTimerId, HW_TS_Mode_t TimerMode, HW_TS_pTimerCb_t pTimerCallBack);
|
||||
|
||||
/**
|
||||
* @brief Stop a virtual timer
|
||||
* This API may be used to stop a running timer. A timer which is stopped is move to the pending state.
|
||||
* A pending timer may be restarted at any time with a different timeout value but the mode cannot be changed.
|
||||
* Nothing is done when it is called to stop a timer which has been already stopped
|
||||
*
|
||||
* @param TimerID: Id of the timer to stop
|
||||
* @retval None
|
||||
*/
|
||||
void HW_TS_Stop(uint8_t TimerID);
|
||||
|
||||
/**
|
||||
* @brief Start a virtual timer
|
||||
* This API shall be used to start a timer. The timeout value is specified and may be different each time.
|
||||
* When the timer is in the single shot mode, it will move to the pending state when it expires. The user may
|
||||
* restart it at any time with a different timeout value. When the timer is in the repeated mode, it always
|
||||
* stay in the running state. When the timer expires, it will be restarted with the same timeout value.
|
||||
* This API shall not be called on a running timer.
|
||||
*
|
||||
* @param TimerID: The ID Id of the timer to start
|
||||
* @param timeout_ticks: Number of ticks of the virtual timer (Maximum value is (0xFFFFFFFF-0xFFFF = 0xFFFF0000)
|
||||
* @retval None
|
||||
*/
|
||||
void HW_TS_Start(uint8_t TimerID, uint32_t timeout_ticks);
|
||||
|
||||
/**
|
||||
* @brief Delete a virtual timer from the list
|
||||
* This API should be used when a timer is not needed anymore by the user. A deleted timer is removed from
|
||||
* the timer list managed by the timer server. It cannot be restarted again. The user has to go with the
|
||||
* creation of a new timer if required and may get a different timer id
|
||||
*
|
||||
* @param TimerID: The ID of the timer to remove from the list
|
||||
* @retval None
|
||||
*/
|
||||
void HW_TS_Delete(uint8_t TimerID);
|
||||
|
||||
/**
|
||||
* @brief Schedule the timer list on the timer interrupt handler
|
||||
* This interrupt handler shall be called by the application in the RTC interrupt handler. This handler takes
|
||||
* care of clearing all status flag required in the RTC and EXTI peripherals
|
||||
*
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void HW_TS_RTC_Wakeup_Handler(void);
|
||||
|
||||
/**
|
||||
* @brief Return the number of ticks to count before the interrupt
|
||||
* This API returns the number of ticks left to be counted before an interrupt is generated by the
|
||||
* Timer Server. This API may be used by the application for power management optimization. When the system
|
||||
* enters low power mode, the mode selection is a tradeoff between the wakeup time where the CPU is running
|
||||
* and the time while the CPU will be kept in low power mode before next wakeup. The deeper is the
|
||||
* low power mode used, the longer is the wakeup time. The low power mode management considering wakeup time
|
||||
* versus time in low power mode is implementation specific
|
||||
* When the timer is disabled (No timer in the list), it returns 0xFFFF
|
||||
*
|
||||
* @param None
|
||||
* @retval The number of ticks left to count
|
||||
*/
|
||||
uint16_t HW_TS_RTC_ReadLeftTicksToCount(void);
|
||||
|
||||
/**
|
||||
* @brief Notify the application that a registered timer has expired
|
||||
* This API shall be implemented by the user application.
|
||||
* This API notifies the application that a timer expires. This API is running in the RTC Wakeup interrupt
|
||||
* context. The application may implement an Operating System to change the context priority where the timer
|
||||
* callback may be handled. This API provides the module ID to identify which module is concerned and to allow
|
||||
* sending the information to the correct task
|
||||
*
|
||||
* @param TimerProcessID: The TimerProcessId associated with the timer when it has been created
|
||||
* @param TimerID: The TimerID of the expired timer
|
||||
* @param pTimerCallBack: The Callback associated with the timer when it has been created
|
||||
* @retval None
|
||||
*/
|
||||
void HW_TS_RTC_Int_AppNot(uint32_t TimerProcessID, uint8_t TimerID, HW_TS_pTimerCb_t pTimerCallBack);
|
||||
|
||||
/**
|
||||
* @brief Notify the application that the wakeupcounter has been updated
|
||||
* This API should be implemented by the user application
|
||||
* This API notifies the application that the counter has been updated. This is expected to be used along
|
||||
* with the HW_TS_RTC_ReadLeftTicksToCount () API. It could be that the counter has been updated since the
|
||||
* last call of HW_TS_RTC_ReadLeftTicksToCount () and before entering low power mode. This notification
|
||||
* provides a way to the application to solve that race condition to reevaluate the counter value before
|
||||
* entering low power mode
|
||||
*
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void HW_TS_RTC_CountUpdated_AppNot(void);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /*HW_IF_H */
|
||||
74
Core/Inc/main.h
Normal file
74
Core/Inc/main.h
Normal file
@@ -0,0 +1,74 @@
|
||||
/* USER CODE BEGIN Header */
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file : main.h
|
||||
* @brief : Header for main.c file.
|
||||
* This file contains the common defines of the application.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2020-2023 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
/* USER CODE END Header */
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __MAIN_H
|
||||
#define __MAIN_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32wbxx_hal.h"
|
||||
#include "app_conf.h"
|
||||
#include "app_entry.h"
|
||||
#include "app_common.h"
|
||||
|
||||
/* Private includes ----------------------------------------------------------*/
|
||||
/* USER CODE BEGIN Includes */
|
||||
|
||||
/* USER CODE END Includes */
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/* USER CODE BEGIN ET */
|
||||
|
||||
/* USER CODE END ET */
|
||||
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
/* USER CODE BEGIN EC */
|
||||
|
||||
/* USER CODE END EC */
|
||||
|
||||
/* Exported macro ------------------------------------------------------------*/
|
||||
/* USER CODE BEGIN EM */
|
||||
|
||||
/* USER CODE END EM */
|
||||
|
||||
/* Exported functions prototypes ---------------------------------------------*/
|
||||
void Error_Handler(void);
|
||||
void MX_LPUART1_UART_Init(void);
|
||||
void MX_USART1_UART_Init(void);
|
||||
|
||||
/* USER CODE BEGIN EFP */
|
||||
|
||||
/* USER CODE END EFP */
|
||||
|
||||
/* Private defines -----------------------------------------------------------*/
|
||||
|
||||
/* USER CODE BEGIN Private defines */
|
||||
|
||||
/* USER CODE END Private defines */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __MAIN_H */
|
||||
80
Core/Inc/stm32_lpm_if.h
Normal file
80
Core/Inc/stm32_lpm_if.h
Normal file
@@ -0,0 +1,80 @@
|
||||
/* USER CODE BEGIN Header */
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32_lpm_if.h
|
||||
* @author MCD Application Team
|
||||
* @brief Header for stm32_lpm_if.c module (device specific LP management)
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2019-2023 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
/* USER CODE END Header */
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef STM32_LPM_IF_H
|
||||
#define STM32_LPM_IF_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
* @brief Enters Low Power Off Mode
|
||||
* @param none
|
||||
* @retval none
|
||||
*/
|
||||
void PWR_EnterOffMode( void );
|
||||
/**
|
||||
* @brief Exits Low Power Off Mode
|
||||
* @param none
|
||||
* @retval none
|
||||
*/
|
||||
void PWR_ExitOffMode( void );
|
||||
|
||||
/**
|
||||
* @brief Enters Low Power Stop Mode
|
||||
* @note ARM exists the function when waking up
|
||||
* @param none
|
||||
* @retval none
|
||||
*/
|
||||
void PWR_EnterStopMode( void );
|
||||
/**
|
||||
* @brief Exits Low Power Stop Mode
|
||||
* @note Enable the pll at 32MHz
|
||||
* @param none
|
||||
* @retval none
|
||||
*/
|
||||
void PWR_ExitStopMode( void );
|
||||
|
||||
/**
|
||||
* @brief Enters Low Power Sleep Mode
|
||||
* @note ARM exits the function when waking up
|
||||
* @param none
|
||||
* @retval none
|
||||
*/
|
||||
void PWR_EnterSleepMode( void );
|
||||
|
||||
/**
|
||||
* @brief Exits Low Power Sleep Mode
|
||||
* @note ARM exits the function when waking up
|
||||
* @param none
|
||||
* @retval none
|
||||
*/
|
||||
void PWR_ExitSleepMode( void );
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /*STM32_LPM_IF_H */
|
||||
|
||||
352
Core/Inc/stm32wbxx_hal_conf.h
Normal file
352
Core/Inc/stm32wbxx_hal_conf.h
Normal file
@@ -0,0 +1,352 @@
|
||||
/* USER CODE BEGIN Header */
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32wbxx_hal_conf.h
|
||||
* @author MCD Application Team
|
||||
* @brief HAL configuration file.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2019 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
/* USER CODE END Header */
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32WBxx_HAL_CONF_H
|
||||
#define __STM32WBxx_HAL_CONF_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
|
||||
/* ########################## Module Selection ############################## */
|
||||
/**
|
||||
* @brief This is the list of modules to be used in the HAL driver
|
||||
*/
|
||||
#define HAL_MODULE_ENABLED
|
||||
/*#define HAL_ADC_MODULE_ENABLED */
|
||||
/*#define HAL_CRYP_MODULE_ENABLED */
|
||||
/*#define HAL_COMP_MODULE_ENABLED */
|
||||
/*#define HAL_CRC_MODULE_ENABLED */
|
||||
#define HAL_HSEM_MODULE_ENABLED
|
||||
/*#define HAL_I2C_MODULE_ENABLED */
|
||||
#define HAL_IPCC_MODULE_ENABLED
|
||||
/*#define HAL_IRDA_MODULE_ENABLED */
|
||||
/*#define HAL_IWDG_MODULE_ENABLED */
|
||||
/*#define HAL_LCD_MODULE_ENABLED */
|
||||
/*#define HAL_LPTIM_MODULE_ENABLED */
|
||||
/*#define HAL_PCD_MODULE_ENABLED */
|
||||
/*#define HAL_PKA_MODULE_ENABLED */
|
||||
/*#define HAL_QSPI_MODULE_ENABLED */
|
||||
/*#define HAL_RNG_MODULE_ENABLED */
|
||||
#define HAL_RTC_MODULE_ENABLED
|
||||
/*#define HAL_SAI_MODULE_ENABLED */
|
||||
/*#define HAL_SMBUS_MODULE_ENABLED */
|
||||
/*#define HAL_SMARTCARD_MODULE_ENABLED */
|
||||
/*#define HAL_SPI_MODULE_ENABLED */
|
||||
/*#define HAL_TIM_MODULE_ENABLED */
|
||||
/*#define HAL_TSC_MODULE_ENABLED */
|
||||
#define HAL_UART_MODULE_ENABLED
|
||||
/*#define HAL_USART_MODULE_ENABLED */
|
||||
/*#define HAL_WWDG_MODULE_ENABLED */
|
||||
#define HAL_EXTI_MODULE_ENABLED
|
||||
#define HAL_CORTEX_MODULE_ENABLED
|
||||
#define HAL_DMA_MODULE_ENABLED
|
||||
#define HAL_FLASH_MODULE_ENABLED
|
||||
#define HAL_GPIO_MODULE_ENABLED
|
||||
#define HAL_PWR_MODULE_ENABLED
|
||||
#define HAL_RCC_MODULE_ENABLED
|
||||
|
||||
#define USE_HAL_ADC_REGISTER_CALLBACKS 0u
|
||||
#define USE_HAL_COMP_REGISTER_CALLBACKS 0u
|
||||
#define USE_HAL_CRYP_REGISTER_CALLBACKS 0u
|
||||
#define USE_HAL_I2C_REGISTER_CALLBACKS 0u
|
||||
#define USE_HAL_IRDA_REGISTER_CALLBACKS 0u
|
||||
#define USE_HAL_LPTIM_REGISTER_CALLBACKS 0u
|
||||
#define USE_HAL_PCD_REGISTER_CALLBACKS 0u
|
||||
#define USE_HAL_PKA_REGISTER_CALLBACKS 0u
|
||||
#define USE_HAL_QSPI_REGISTER_CALLBACKS 0u
|
||||
#define USE_HAL_RNG_REGISTER_CALLBACKS 0u
|
||||
#define USE_HAL_RTC_REGISTER_CALLBACKS 0u
|
||||
#define USE_HAL_SAI_REGISTER_CALLBACKS 0u
|
||||
#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS 0u
|
||||
#define USE_HAL_SMBUS_REGISTER_CALLBACKS 0u
|
||||
#define USE_HAL_SPI_REGISTER_CALLBACKS 0u
|
||||
#define USE_HAL_TIM_REGISTER_CALLBACKS 0u
|
||||
#define USE_HAL_TSC_REGISTER_CALLBACKS 0u
|
||||
#define USE_HAL_UART_REGISTER_CALLBACKS 0u
|
||||
#define USE_HAL_USART_REGISTER_CALLBACKS 0u
|
||||
#define USE_HAL_WWDG_REGISTER_CALLBACKS 0u
|
||||
|
||||
/* ########################## Oscillator Values adaptation ####################*/
|
||||
/**
|
||||
* @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
|
||||
* This value is used by the RCC HAL module to compute the system frequency
|
||||
* (when HSE is used as system clock source, directly or through the PLL).
|
||||
*/
|
||||
#if !defined (HSE_VALUE)
|
||||
#define HSE_VALUE 32000000U /*!< Value of the External oscillator in Hz */
|
||||
#endif /* HSE_VALUE */
|
||||
|
||||
#if !defined (HSE_STARTUP_TIMEOUT)
|
||||
#define HSE_STARTUP_TIMEOUT ((uint32_t)100) /*!< Time out for HSE start up, in ms */
|
||||
#endif /* HSE_STARTUP_TIMEOUT */
|
||||
|
||||
/**
|
||||
* @brief Internal Multiple Speed oscillator (MSI) default value.
|
||||
* This value is the default MSI range value after Reset.
|
||||
*/
|
||||
#if !defined (MSI_VALUE)
|
||||
#define MSI_VALUE ((uint32_t)4000000) /*!< Value of the Internal oscillator in Hz*/
|
||||
#endif /* MSI_VALUE */
|
||||
|
||||
/**
|
||||
* @brief Internal High Speed oscillator (HSI) value.
|
||||
* This value is used by the RCC HAL module to compute the system frequency
|
||||
* (when HSI is used as system clock source, directly or through the PLL).
|
||||
*/
|
||||
#if !defined (HSI_VALUE)
|
||||
#define HSI_VALUE 16000000U /*!< Value of the Internal oscillator in Hz*/
|
||||
#endif /* HSI_VALUE */
|
||||
|
||||
/**
|
||||
* @brief Internal Low Speed oscillator (LSI1) value.
|
||||
*/
|
||||
#if !defined (LSI1_VALUE)
|
||||
#define LSI1_VALUE ((uint32_t)32000) /*!< LSI1 Typical Value in Hz*/
|
||||
#endif /* LSI1_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz
|
||||
The real value may vary depending on the variations
|
||||
in voltage and temperature.*/
|
||||
/**
|
||||
* @brief Internal Low Speed oscillator (LSI2) value.
|
||||
*/
|
||||
#if !defined (LSI2_VALUE)
|
||||
#define LSI2_VALUE ((uint32_t)32000) /*!< LSI2 Typical Value in Hz*/
|
||||
#endif /* LSI2_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz
|
||||
The real value may vary depending on the variations
|
||||
in voltage and temperature.*/
|
||||
|
||||
/**
|
||||
* @brief External Low Speed oscillator (LSE) value.
|
||||
* This value is used by the UART, RTC HAL module to compute the system frequency
|
||||
*/
|
||||
#if !defined (LSE_VALUE)
|
||||
#define LSE_VALUE 32768U /*!< Value of the External oscillator in Hz*/
|
||||
#endif /* LSE_VALUE */
|
||||
|
||||
/**
|
||||
* @brief Internal Multiple Speed oscillator (HSI48) default value.
|
||||
* This value is the default HSI48 range value after Reset.
|
||||
*/
|
||||
#if !defined (HSI48_VALUE)
|
||||
#define HSI48_VALUE ((uint32_t)48000000) /*!< Value of the Internal oscillator in Hz*/
|
||||
#endif /* HSI48_VALUE */
|
||||
|
||||
#if !defined (LSE_STARTUP_TIMEOUT)
|
||||
#define LSE_STARTUP_TIMEOUT 5000U /*!< Time out for LSE start up, in ms */
|
||||
#endif /* LSE_STARTUP_TIMEOUT */
|
||||
|
||||
/**
|
||||
* @brief External clock source for SAI1 peripheral
|
||||
* This value is used by the RCC HAL module to compute the SAI1 & SAI2 clock source
|
||||
* frequency.
|
||||
*/
|
||||
#if !defined (EXTERNAL_SAI1_CLOCK_VALUE)
|
||||
#define EXTERNAL_SAI1_CLOCK_VALUE ((uint32_t)2097000) /*!< Value of the SAI1 External clock source in Hz*/
|
||||
#endif /* EXTERNAL_SAI1_CLOCK_VALUE */
|
||||
|
||||
/* Tip: To avoid modifying this file each time you need to use different HSE,
|
||||
=== you can define the HSE value in your toolchain compiler preprocessor. */
|
||||
|
||||
/* ########################### System Configuration ######################### */
|
||||
/**
|
||||
* @brief This is the HAL system configuration section
|
||||
*/
|
||||
|
||||
#define VDD_VALUE 3300U /*!< Value of VDD in mv */
|
||||
#define TICK_INT_PRIORITY 0U /*!< tick interrupt priority */
|
||||
#define USE_RTOS 0U
|
||||
#define PREFETCH_ENABLE 1U
|
||||
#define INSTRUCTION_CACHE_ENABLE 1U
|
||||
#define DATA_CACHE_ENABLE 1U
|
||||
|
||||
/* ########################## Assert Selection ############################## */
|
||||
/**
|
||||
* @brief Uncomment the line below to expanse the "assert_param" macro in the
|
||||
* HAL drivers code
|
||||
*/
|
||||
/* #define USE_FULL_ASSERT 1U */
|
||||
|
||||
/* ################## SPI peripheral configuration ########################## */
|
||||
|
||||
/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
|
||||
* Activated: CRC code is present inside driver
|
||||
* Deactivated: CRC code cleaned from driver
|
||||
*/
|
||||
|
||||
#define USE_SPI_CRC 0U
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
/**
|
||||
* @brief Include module's header file
|
||||
*/
|
||||
#ifdef HAL_DMA_MODULE_ENABLED
|
||||
#include "stm32wbxx_hal_dma.h"
|
||||
#endif /* HAL_DMA_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_ADC_MODULE_ENABLED
|
||||
#include "stm32wbxx_hal_adc.h"
|
||||
#endif /* HAL_ADC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_COMP_MODULE_ENABLED
|
||||
#include "stm32wbxx_hal_comp.h"
|
||||
#endif /* HAL_COMP_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_CORTEX_MODULE_ENABLED
|
||||
#include "stm32wbxx_hal_cortex.h"
|
||||
#endif /* HAL_CORTEX_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_CRC_MODULE_ENABLED
|
||||
#include "stm32wbxx_hal_crc.h"
|
||||
#endif /* HAL_CRC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_CRYP_MODULE_ENABLED
|
||||
#include "stm32wbxx_hal_cryp.h"
|
||||
#endif /* HAL_CRYP_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_EXTI_MODULE_ENABLED
|
||||
#include "stm32wbxx_hal_exti.h"
|
||||
#endif /* HAL_EXTI_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_FLASH_MODULE_ENABLED
|
||||
#include "stm32wbxx_hal_flash.h"
|
||||
#endif /* HAL_FLASH_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_GPIO_MODULE_ENABLED
|
||||
#include "stm32wbxx_hal_gpio.h"
|
||||
#endif /* HAL_GPIO_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_HSEM_MODULE_ENABLED
|
||||
#include "stm32wbxx_hal_hsem.h"
|
||||
#endif /* HAL_HSEM_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_I2C_MODULE_ENABLED
|
||||
#include "stm32wbxx_hal_i2c.h"
|
||||
#endif /* HAL_I2C_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_IPCC_MODULE_ENABLED
|
||||
#include "stm32wbxx_hal_ipcc.h"
|
||||
#endif /* HAL_IPCC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_IRDA_MODULE_ENABLED
|
||||
#include "stm32wbxx_hal_irda.h"
|
||||
#endif /* HAL_IRDA_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_IWDG_MODULE_ENABLED
|
||||
#include "stm32wbxx_hal_iwdg.h"
|
||||
#endif /* HAL_IWDG_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_LCD_MODULE_ENABLED
|
||||
#include "stm32wbxx_hal_lcd.h"
|
||||
#endif /* HAL_LCD_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_LPTIM_MODULE_ENABLED
|
||||
#include "stm32wbxx_hal_lptim.h"
|
||||
#endif /* HAL_LPTIM_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_PCD_MODULE_ENABLED
|
||||
#include "stm32wbxx_hal_pcd.h"
|
||||
#endif /* HAL_PCD_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_PKA_MODULE_ENABLED
|
||||
#include "stm32wbxx_hal_pka.h"
|
||||
#endif /* HAL_PKA_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_PWR_MODULE_ENABLED
|
||||
#include "stm32wbxx_hal_pwr.h"
|
||||
#endif /* HAL_PWR_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_QSPI_MODULE_ENABLED
|
||||
#include "stm32wbxx_hal_qspi.h"
|
||||
#endif /* HAL_QSPI_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_RCC_MODULE_ENABLED
|
||||
#include "stm32wbxx_hal_rcc.h"
|
||||
#endif /* HAL_RCC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_RNG_MODULE_ENABLED
|
||||
#include "stm32wbxx_hal_rng.h"
|
||||
#endif /* HAL_RNG_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_RTC_MODULE_ENABLED
|
||||
#include "stm32wbxx_hal_rtc.h"
|
||||
#endif /* HAL_RTC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SAI_MODULE_ENABLED
|
||||
#include "stm32wbxx_hal_sai.h"
|
||||
#endif /* HAL_SAI_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SMARTCARD_MODULE_ENABLED
|
||||
#include "stm32wbxx_hal_smartcard.h"
|
||||
#endif /* HAL_SMARTCARD_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SMBUS_MODULE_ENABLED
|
||||
#include "stm32wbxx_hal_smbus.h"
|
||||
#endif /* HAL_SMBUS_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SPI_MODULE_ENABLED
|
||||
#include "stm32wbxx_hal_spi.h"
|
||||
#endif /* HAL_SPI_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_TIM_MODULE_ENABLED
|
||||
#include "stm32wbxx_hal_tim.h"
|
||||
#endif /* HAL_TIM_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_TSC_MODULE_ENABLED
|
||||
#include "stm32wbxx_hal_tsc.h"
|
||||
#endif /* HAL_TSC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_UART_MODULE_ENABLED
|
||||
#include "stm32wbxx_hal_uart.h"
|
||||
#endif /* HAL_UART_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_USART_MODULE_ENABLED
|
||||
#include "stm32wbxx_hal_usart.h"
|
||||
#endif /* HAL_USART_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_WWDG_MODULE_ENABLED
|
||||
#include "stm32wbxx_hal_wwdg.h"
|
||||
#endif /* HAL_WWDG_MODULE_ENABLED */
|
||||
|
||||
/* Exported macro ------------------------------------------------------------*/
|
||||
#ifdef USE_FULL_ASSERT
|
||||
/**
|
||||
* @brief The assert_param macro is used for function's parameters check.
|
||||
* @param expr If expr is false, it calls assert_failed function
|
||||
* which reports the name of the source file and the source
|
||||
* line number of the call that failed.
|
||||
* If expr is true, it returns no value.
|
||||
* @retval None
|
||||
*/
|
||||
#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
|
||||
/* Exported functions ------------------------------------------------------- */
|
||||
void assert_failed(uint8_t* file, uint32_t line);
|
||||
#else
|
||||
#define assert_param(expr) ((void)0U)
|
||||
#endif /* USE_FULL_ASSERT */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __STM32WBxx_HAL_CONF_H */
|
||||
83
Core/Inc/stm32wbxx_it.h
Normal file
83
Core/Inc/stm32wbxx_it.h
Normal file
@@ -0,0 +1,83 @@
|
||||
/* USER CODE BEGIN Header */
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32wbxx_it.h
|
||||
* @brief This file contains the headers of the interrupt handlers.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2020-2023 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
/* USER CODE END Header */
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32WBxx_IT_H
|
||||
#define __STM32WBxx_IT_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Private includes ----------------------------------------------------------*/
|
||||
/* USER CODE BEGIN Includes */
|
||||
|
||||
/* USER CODE END Includes */
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/* USER CODE BEGIN ET */
|
||||
|
||||
/* USER CODE END ET */
|
||||
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
/* USER CODE BEGIN EC */
|
||||
|
||||
/* USER CODE END EC */
|
||||
|
||||
/* Exported macro ------------------------------------------------------------*/
|
||||
/* USER CODE BEGIN EM */
|
||||
|
||||
/* USER CODE END EM */
|
||||
|
||||
/* Exported functions prototypes ---------------------------------------------*/
|
||||
void NMI_Handler(void);
|
||||
void HardFault_Handler(void);
|
||||
void MemManage_Handler(void);
|
||||
void BusFault_Handler(void);
|
||||
void UsageFault_Handler(void);
|
||||
void SVC_Handler(void);
|
||||
void DebugMon_Handler(void);
|
||||
void PendSV_Handler(void);
|
||||
void SysTick_Handler(void);
|
||||
void PVD_PVM_IRQHandler(void);
|
||||
void RTC_WKUP_IRQHandler(void);
|
||||
void FLASH_IRQHandler(void);
|
||||
void RCC_IRQHandler(void);
|
||||
void DMA1_Channel1_IRQHandler(void);
|
||||
void DMA1_Channel2_IRQHandler(void);
|
||||
void C2SEV_PWR_C2H_IRQHandler(void);
|
||||
void USART1_IRQHandler(void);
|
||||
void LPUART1_IRQHandler(void);
|
||||
void PWR_SOTF_BLEACT_802ACT_RFPHASE_IRQHandler(void);
|
||||
void IPCC_C1_RX_IRQHandler(void);
|
||||
void IPCC_C1_TX_IRQHandler(void);
|
||||
void HSEM_IRQHandler(void);
|
||||
void FPU_IRQHandler(void);
|
||||
/* USER CODE BEGIN EFP */
|
||||
void EXTI0_IRQHandler(void);
|
||||
void EXTI1_IRQHandler(void);
|
||||
void EXTI4_IRQHandler(void);
|
||||
|
||||
/* USER CODE END EFP */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __STM32WBxx_IT_H */
|
||||
79
Core/Inc/stm32wbxx_nucleo_conf.h
Normal file
79
Core/Inc/stm32wbxx_nucleo_conf.h
Normal file
@@ -0,0 +1,79 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32wbxx_nucleo_conf.h
|
||||
* @author MCD Application Team
|
||||
* @brief Discovery Module configuration file.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2019 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32WBXX_NUCLEO_CONF_H
|
||||
#define __STM32WBXX_NUCLEO_CONF_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32wbxx_hal.h"
|
||||
|
||||
/** @addtogroup BSP
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32WBXX_NUCLEO
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup STM32WBXX_NUCLEO_CONFIG CONFIG
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup STM32WBXX_NUCLEO_CONFIG_Exported_Constants Exported Constants
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Uncomment the following line to enable VCP */
|
||||
/* #define USE_VCP_CONNECTION */
|
||||
|
||||
/* COM port usage */
|
||||
#if defined(USE_VCP_CONNECTION)
|
||||
#define USE_BSP_COM_FEATURE 1U
|
||||
#define USE_COM_LOG 1U
|
||||
#else
|
||||
#define USE_BSP_COM_FEATURE 0U
|
||||
#define USE_COM_LOG 0U
|
||||
#endif /* USE_VCP_CONNECTION */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* STM32WBXX_NUCLEO_CONF_H */
|
||||
60
Core/Inc/stm_logging.h
Normal file
60
Core/Inc/stm_logging.h
Normal file
@@ -0,0 +1,60 @@
|
||||
/* USER CODE BEGIN Header */
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm_logging.h
|
||||
* @author MCD Application Team
|
||||
* @brief Application header file for logging
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2019-2023 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
/* USER CODE END Header */
|
||||
|
||||
#ifndef STM_LOGGING_H_
|
||||
#define STM_LOGGING_H_
|
||||
|
||||
#define LOG_LEVEL_NONE 0 /* None */
|
||||
#define LOG_LEVEL_CRIT 1U /* Critical */
|
||||
#define LOG_LEVEL_WARN 2U /* Warning */
|
||||
#define LOG_LEVEL_INFO 3U /* Info */
|
||||
#define LOG_LEVEL_DEBG 4U /* Debug */
|
||||
|
||||
#define APP_DBG_FULL(level, region, ...) \
|
||||
{ \
|
||||
if (APPLI_PRINT_FILE_FUNC_LINE == 1U) \
|
||||
{ \
|
||||
printf("\r\n[%s][%s][%d] ", DbgTraceGetFileName(__FILE__),__FUNCTION__,__LINE__); \
|
||||
} \
|
||||
logApplication(level, region, __VA_ARGS__); \
|
||||
}
|
||||
#define APP_DBG(...) \
|
||||
{ \
|
||||
if (APPLI_PRINT_FILE_FUNC_LINE == 1U) \
|
||||
{ \
|
||||
printf("\r\n[%s][%s][%d] ", DbgTraceGetFileName(__FILE__),__FUNCTION__,__LINE__); \
|
||||
} \
|
||||
logApplication(LOG_LEVEL_NONE, APPLI_LOG_REGION_GENERAL, __VA_ARGS__); \
|
||||
}
|
||||
/**
|
||||
* This enumeration represents log regions.
|
||||
*
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
APPLI_LOG_REGION_GENERAL = 1U, /* General */
|
||||
APPLI_LOG_REGION_ZIGBEE_API = 2U, /* Zigbee API */
|
||||
} appliLogRegion_t;
|
||||
|
||||
typedef uint8_t appliLogLevel_t;
|
||||
|
||||
void logApplication(appliLogLevel_t aLogLevel, appliLogRegion_t aLogRegion, const char *aFormat, ...);
|
||||
|
||||
#endif /* STM_LOGGING_H_ */
|
||||
66
Core/Inc/utilities_conf.h
Normal file
66
Core/Inc/utilities_conf.h
Normal file
@@ -0,0 +1,66 @@
|
||||
/* USER CODE BEGIN Header */
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file utilities_conf.h
|
||||
* @author MCD Application Team
|
||||
* @brief Configuration file for STM32 Utilities.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2019-2023 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
*****************************************************************************
|
||||
*/
|
||||
/* USER CODE END Header */
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef UTILITIES_CONF_H
|
||||
#define UTILITIES_CONF_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#include "cmsis_compiler.h"
|
||||
#include "string.h"
|
||||
#include "app_conf.h"
|
||||
|
||||
/******************************************************************************
|
||||
* common
|
||||
******************************************************************************/
|
||||
#define UTILS_ENTER_CRITICAL_SECTION( ) uint32_t primask_bit = __get_PRIMASK( );\
|
||||
__disable_irq( )
|
||||
|
||||
#define UTILS_EXIT_CRITICAL_SECTION( ) __set_PRIMASK( primask_bit )
|
||||
|
||||
#define UTILS_MEMSET8( dest, value, size ) memset( dest, value, size);
|
||||
|
||||
/******************************************************************************
|
||||
* tiny low power manager
|
||||
* (any macro that does not need to be modified can be removed)
|
||||
******************************************************************************/
|
||||
#define UTIL_LPM_INIT_CRITICAL_SECTION( )
|
||||
#define UTIL_LPM_ENTER_CRITICAL_SECTION( ) UTILS_ENTER_CRITICAL_SECTION( )
|
||||
#define UTIL_LPM_EXIT_CRITICAL_SECTION( ) UTILS_EXIT_CRITICAL_SECTION( )
|
||||
|
||||
/******************************************************************************
|
||||
* sequencer
|
||||
* (any macro that does not need to be modified can be removed)
|
||||
******************************************************************************/
|
||||
#define UTIL_SEQ_INIT_CRITICAL_SECTION( )
|
||||
#define UTIL_SEQ_ENTER_CRITICAL_SECTION( ) UTILS_ENTER_CRITICAL_SECTION( )
|
||||
#define UTIL_SEQ_EXIT_CRITICAL_SECTION( ) UTILS_EXIT_CRITICAL_SECTION( )
|
||||
#define UTIL_SEQ_CONF_TASK_NBR (32)
|
||||
#define UTIL_SEQ_CONF_PRIO_NBR CFG_SCH_PRIO_NBR
|
||||
#define UTIL_SEQ_MEMSET8( dest, value, size ) UTILS_MEMSET8( dest, value, size )
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /*UTILITIES_CONF_H */
|
||||
Reference in New Issue
Block a user