UKSS_ICE/v120/DSP2833x_examples/lpm_idlewake/Example_2833xIdleWake.c
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// TI File $Revision: /main/10 $
// Checkin $Date: May 12, 2008 14:23:32 $
//###########################################################################
//
// FILE: Example_2833xIdleWake.c
//
// TITLE: Device Idle Mode and Wakeup Program.
//
// ASSUMPTIONS:
//
// This program requires the DSP2833x header files.
//
// GPIO0 is configured as an XINT1 pin to trigger a
// XINT1 interrupt upon detection of a falling edge.
// Initially, pull GPIO0 high externally. To wake device
// from idle mode by triggering an XINT1 interrupt,
// pull GPIO0 low (falling edge)
//
// To observe when device wakes from IDLE mode, monitor
// GPIO1 with an oscilloscope (set to 1 in XINT1 ISR)
//
// As supplied, this project is configured for "boot to SARAM"
// operation. The 2833x Boot Mode table is shown below.
// For information on configuring the boot mode of an eZdsp,
// please refer to the documentation included with the eZdsp,
//
// $Boot_Table:
//
// GPIO87 GPIO86 GPIO85 GPIO84
// XA15 XA14 XA13 XA12
// PU PU PU PU
// ==========================================
// 1 1 1 1 Jump to Flash
// 1 1 1 0 SCI-A boot
// 1 1 0 1 SPI-A boot
// 1 1 0 0 I2C-A boot
// 1 0 1 1 eCAN-A boot
// 1 0 1 0 McBSP-A boot
// 1 0 0 1 Jump to XINTF x16
// 1 0 0 0 Jump to XINTF x32
// 0 1 1 1 Jump to OTP
// 0 1 1 0 Parallel GPIO I/O boot
// 0 1 0 1 Parallel XINTF boot
// 0 1 0 0 Jump to SARAM <- "boot to SARAM"
// 0 0 1 1 Branch to check boot mode
// 0 0 1 0 Boot to flash, bypass ADC cal
// 0 0 0 1 Boot to SARAM, bypass ADC cal
// 0 0 0 0 Boot to SCI-A, bypass ADC cal
// Boot_Table_End$
//
// DESCRIPTION:
//
// This example puts the device into IDLE mode.
//
// The example then wakes up the device from IDLE using XINT1
// which triggers on a falling edge from GPIO0.
// This pin must be pulled from high to low by an external agent for
// wakeup.
//
// To observe the device wakeup from IDLE mode, monitor GPIO1 with
// an oscilloscope, which goes high in the XINT_1_ISR.
//
//###########################################################################
// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
// $Release Date: August 1, 2008 $
//###########################################################################
#include "DSP28x_Project.h" // Device Headerfile and Examples Include File
// Prototype statements for functions found within this file.
interrupt void XINT_1_ISR(void); // ISR
void main()
{
// Step 1. Initialize System Control:
// PLL, WatchDog, enable Peripheral Clocks
// This example function is found in the DSP2833x_SysCtrl.c file.
InitSysCtrl();
// Step 2. Initalize GPIO:
// This example function is found in the DSP2833x_Gpio.c file and
// illustrates how to set the GPIO to it's default state.
// InitGpio(); // Skipped for this example
EALLOW;
GpioCtrlRegs.GPAPUD.all = 0; // Enable all Pull-ups
GpioCtrlRegs.GPBPUD.all = 0;
GpioIntRegs.GPIOXINT1SEL.bit.GPIOSEL = 0; // Choose GPIO0 as the XINT1 pin.
GpioCtrlRegs.GPADIR.all = 0xFFFFFFFE; // All pins are outputs except 0
GpioDataRegs.GPADAT.all = 0x00000000; // All I/O pins are driven low
EDIS;
XIntruptRegs.XINT1CR.bit.ENABLE = 1; // Enable XINT1 pin
XIntruptRegs.XINT1CR.bit.POLARITY = 0; // Interrupt triggers on falling edge
// Step 3. Clear all interrupts and initialize PIE vector table:
// Disable CPU interrupts
DINT;
// Initialize the PIE control registers to their default state.
// The default state is all PIE interrupts disabled and flags
// are cleared.
// This function is found in the DSP2833x_PieCtrl.c file.
InitPieCtrl();
// Disable CPU interrupts and clear all CPU interrupt flags:
IER = 0x0000;
IFR = 0x0000;
// Initialize the PIE vector table with pointers to the shell Interrupt
// Service Routines (ISR).
// This will populate the entire table, even if the interrupt
// is not used in this example. This is useful for debug purposes.
// The shell ISR routines are found in DSP2833x_DefaultIsr.c.
// This function is found in DSP2833x_PieVect.c.
InitPieVectTable();
// Interrupts that are used in this example are re-mapped to
// ISR functions found within this file.
EALLOW; // This is needed to write to EALLOW protected registers
PieVectTable.XINT1 = &XINT_1_ISR;
EDIS;
// Step 4. Initialize all the Device Peripherals:
// Not applicable for this example.
// Step 5. User specific code, enable interrupts:
// Enable CPU INT1 which is connected to WakeInt:
IER |= M_INT1;
// Enable XINT1 in the PIE: Group 1 interrupt 4
PieCtrlRegs.PIEIER1.bit.INTx4 = 1;
PieCtrlRegs.PIEACK.bit.ACK1 = 1;
// Enable global Interrupts:
EINT; // Enable Global interrupt INTM
// Write the LPM code value
EALLOW;
if (SysCtrlRegs.PLLSTS.bit.MCLKSTS != 1) // Only enter Idle mode when PLL is not in limp mode.
{
SysCtrlRegs.LPMCR0.bit.LPM = 0x0000; // LPM mode = Idle
}
EDIS;
asm(" IDLE"); // Device waits in IDLE until XINT1 interrupts
for(;;){}
}
interrupt void XINT_1_ISR(void)
{
GpioDataRegs.GPASET.bit.GPIO1 = 1; // GPIO1 is driven high upon exiting IDLE.
PieCtrlRegs.PIEACK.bit.ACK1 = 1;
EINT;
return;
}