176 lines
5.8 KiB
C
176 lines
5.8 KiB
C
// TI File $Revision: /main/10 $
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// Checkin $Date: May 12, 2008 14:23:32 $
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//###########################################################################
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//
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// FILE: Example_2833xIdleWake.c
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//
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// TITLE: Device Idle Mode and Wakeup Program.
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//
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// ASSUMPTIONS:
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//
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// This program requires the DSP2833x header files.
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//
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// GPIO0 is configured as an XINT1 pin to trigger a
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// XINT1 interrupt upon detection of a falling edge.
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// Initially, pull GPIO0 high externally. To wake device
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// from idle mode by triggering an XINT1 interrupt,
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// pull GPIO0 low (falling edge)
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//
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// To observe when device wakes from IDLE mode, monitor
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// GPIO1 with an oscilloscope (set to 1 in XINT1 ISR)
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//
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// As supplied, this project is configured for "boot to SARAM"
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// operation. The 2833x Boot Mode table is shown below.
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// For information on configuring the boot mode of an eZdsp,
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// please refer to the documentation included with the eZdsp,
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//
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// $Boot_Table:
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//
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// GPIO87 GPIO86 GPIO85 GPIO84
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// XA15 XA14 XA13 XA12
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// PU PU PU PU
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// ==========================================
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// 1 1 1 1 Jump to Flash
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// 1 1 1 0 SCI-A boot
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// 1 1 0 1 SPI-A boot
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// 1 1 0 0 I2C-A boot
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// 1 0 1 1 eCAN-A boot
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// 1 0 1 0 McBSP-A boot
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// 1 0 0 1 Jump to XINTF x16
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// 1 0 0 0 Jump to XINTF x32
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// 0 1 1 1 Jump to OTP
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// 0 1 1 0 Parallel GPIO I/O boot
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// 0 1 0 1 Parallel XINTF boot
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// 0 1 0 0 Jump to SARAM <- "boot to SARAM"
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// 0 0 1 1 Branch to check boot mode
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// 0 0 1 0 Boot to flash, bypass ADC cal
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// 0 0 0 1 Boot to SARAM, bypass ADC cal
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// 0 0 0 0 Boot to SCI-A, bypass ADC cal
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// Boot_Table_End$
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//
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// DESCRIPTION:
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//
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// This example puts the device into IDLE mode.
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//
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// The example then wakes up the device from IDLE using XINT1
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// which triggers on a falling edge from GPIO0.
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// This pin must be pulled from high to low by an external agent for
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// wakeup.
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//
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// To observe the device wakeup from IDLE mode, monitor GPIO1 with
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// an oscilloscope, which goes high in the XINT_1_ISR.
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//
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//###########################################################################
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// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
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// $Release Date: August 1, 2008 $
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//###########################################################################
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#include "DSP28x_Project.h" // Device Headerfile and Examples Include File
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// Prototype statements for functions found within this file.
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interrupt void XINT_1_ISR(void); // ISR
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void main()
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{
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// Step 1. Initialize System Control:
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// PLL, WatchDog, enable Peripheral Clocks
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// This example function is found in the DSP2833x_SysCtrl.c file.
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InitSysCtrl();
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// Step 2. Initalize GPIO:
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// This example function is found in the DSP2833x_Gpio.c file and
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// illustrates how to set the GPIO to it's default state.
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// InitGpio(); // Skipped for this example
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EALLOW;
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GpioCtrlRegs.GPAPUD.all = 0; // Enable all Pull-ups
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GpioCtrlRegs.GPBPUD.all = 0;
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GpioIntRegs.GPIOXINT1SEL.bit.GPIOSEL = 0; // Choose GPIO0 as the XINT1 pin.
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GpioCtrlRegs.GPADIR.all = 0xFFFFFFFE; // All pins are outputs except 0
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GpioDataRegs.GPADAT.all = 0x00000000; // All I/O pins are driven low
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EDIS;
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XIntruptRegs.XINT1CR.bit.ENABLE = 1; // Enable XINT1 pin
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XIntruptRegs.XINT1CR.bit.POLARITY = 0; // Interrupt triggers on falling edge
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// Step 3. Clear all interrupts and initialize PIE vector table:
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// Disable CPU interrupts
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DINT;
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// Initialize the PIE control registers to their default state.
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// The default state is all PIE interrupts disabled and flags
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// are cleared.
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// This function is found in the DSP2833x_PieCtrl.c file.
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InitPieCtrl();
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// Disable CPU interrupts and clear all CPU interrupt flags:
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IER = 0x0000;
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IFR = 0x0000;
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// Initialize the PIE vector table with pointers to the shell Interrupt
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// Service Routines (ISR).
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// This will populate the entire table, even if the interrupt
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// is not used in this example. This is useful for debug purposes.
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// The shell ISR routines are found in DSP2833x_DefaultIsr.c.
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// This function is found in DSP2833x_PieVect.c.
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InitPieVectTable();
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// Interrupts that are used in this example are re-mapped to
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// ISR functions found within this file.
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EALLOW; // This is needed to write to EALLOW protected registers
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PieVectTable.XINT1 = &XINT_1_ISR;
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EDIS;
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// Step 4. Initialize all the Device Peripherals:
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// Not applicable for this example.
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// Step 5. User specific code, enable interrupts:
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// Enable CPU INT1 which is connected to WakeInt:
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IER |= M_INT1;
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// Enable XINT1 in the PIE: Group 1 interrupt 4
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PieCtrlRegs.PIEIER1.bit.INTx4 = 1;
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PieCtrlRegs.PIEACK.bit.ACK1 = 1;
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// Enable global Interrupts:
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EINT; // Enable Global interrupt INTM
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// Write the LPM code value
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EALLOW;
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if (SysCtrlRegs.PLLSTS.bit.MCLKSTS != 1) // Only enter Idle mode when PLL is not in limp mode.
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{
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SysCtrlRegs.LPMCR0.bit.LPM = 0x0000; // LPM mode = Idle
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}
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EDIS;
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asm(" IDLE"); // Device waits in IDLE until XINT1 interrupts
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for(;;){}
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}
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interrupt void XINT_1_ISR(void)
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{
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GpioDataRegs.GPASET.bit.GPIO1 = 1; // GPIO1 is driven high upon exiting IDLE.
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PieCtrlRegs.PIEACK.bit.ACK1 = 1;
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EINT;
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return;
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}
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