205 lines
6.8 KiB
C
205 lines
6.8 KiB
C
// TI File $Revision: /main/1 $
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// Checkin $Date: August 18, 2006 13:46:38 $
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//###########################################################################
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//
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// FILE: DSP2833x_PieVect.c
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//
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// TITLE: DSP2833x Devices PIE Vector Table Initialization Functions.
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//
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//###########################################################################
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// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
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// $Release Date: August 1, 2008 $
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//###########################################################################
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#include "DSP2833x_Device.h" // DSP2833x Headerfile Include File
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#include "DSP2833x_Examples.h" // DSP2833x Examples Include File
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const struct PIE_VECT_TABLE PieVectTableInit = {
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PIE_RESERVED, // 0 Reserved space
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PIE_RESERVED, // 1 Reserved space
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PIE_RESERVED, // 2 Reserved space
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PIE_RESERVED, // 3 Reserved space
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PIE_RESERVED, // 4 Reserved space
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PIE_RESERVED, // 5 Reserved space
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PIE_RESERVED, // 6 Reserved space
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PIE_RESERVED, // 7 Reserved space
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PIE_RESERVED, // 8 Reserved space
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PIE_RESERVED, // 9 Reserved space
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PIE_RESERVED, // 10 Reserved space
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PIE_RESERVED, // 11 Reserved space
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PIE_RESERVED, // 12 Reserved space
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// Non-Peripheral Interrupts
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INT13_ISR, // XINT13 or CPU-Timer 1
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INT14_ISR, // CPU-Timer2
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DATALOG_ISR, // Datalogging interrupt
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RTOSINT_ISR, // RTOS interrupt
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EMUINT_ISR, // Emulation interrupt
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NMI_ISR, // Non-maskable interrupt
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ILLEGAL_ISR, // Illegal operation TRAP
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USER1_ISR, // User Defined trap 1
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USER2_ISR, // User Defined trap 2
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USER3_ISR, // User Defined trap 3
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USER4_ISR, // User Defined trap 4
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USER5_ISR, // User Defined trap 5
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USER6_ISR, // User Defined trap 6
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USER7_ISR, // User Defined trap 7
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USER8_ISR, // User Defined trap 8
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USER9_ISR, // User Defined trap 9
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USER10_ISR, // User Defined trap 10
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USER11_ISR, // User Defined trap 11
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USER12_ISR, // User Defined trap 12
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// Group 1 PIE Vectors
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SEQ1INT_ISR, // 1.1 ADC
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SEQ2INT_ISR, // 1.2 ADC
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rsvd_ISR, // 1.3
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XINT1_ISR, // 1.4
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XINT2_ISR, // 1.5
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ADCINT_ISR, // 1.6 ADC
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TINT0_ISR, // 1.7 Timer 0
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WAKEINT_ISR, // 1.8 WD, Low Power
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// Group 2 PIE Vectors
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EPWM1_TZINT_ISR, // 2.1 EPWM-1 Trip Zone
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EPWM2_TZINT_ISR, // 2.2 EPWM-2 Trip Zone
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EPWM3_TZINT_ISR, // 2.3 EPWM-3 Trip Zone
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EPWM4_TZINT_ISR, // 2.4 EPWM-4 Trip Zone
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EPWM5_TZINT_ISR, // 2.5 EPWM-5 Trip Zone
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EPWM6_TZINT_ISR, // 2.6 EPWM-6 Trip Zone
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rsvd_ISR, // 2.7
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rsvd_ISR, // 2.8
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// Group 3 PIE Vectors
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EPWM1_INT_ISR, // 3.1 EPWM-1 Interrupt
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EPWM2_INT_ISR, // 3.2 EPWM-2 Interrupt
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EPWM3_INT_ISR, // 3.3 EPWM-3 Interrupt
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EPWM4_INT_ISR, // 3.4 EPWM-4 Interrupt
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EPWM5_INT_ISR, // 3.5 EPWM-5 Interrupt
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EPWM6_INT_ISR, // 3.6 EPWM-6 Interrupt
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rsvd_ISR, // 3.7
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rsvd_ISR, // 3.8
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// Group 4 PIE Vectors
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ECAP1_INT_ISR, // 4.1 ECAP-1
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ECAP2_INT_ISR, // 4.2 ECAP-2
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ECAP3_INT_ISR, // 4.3 ECAP-3
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ECAP4_INT_ISR, // 4.4 ECAP-4
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ECAP5_INT_ISR, // 4.5 ECAP-5
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ECAP6_INT_ISR, // 4.6 ECAP-6
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rsvd_ISR, // 4.7
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rsvd_ISR, // 4.8
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// Group 5 PIE Vectors
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EQEP1_INT_ISR, // 5.1 EQEP-1
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EQEP2_INT_ISR, // 5.2 EQEP-2
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rsvd_ISR, // 5.3
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rsvd_ISR, // 5.4
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rsvd_ISR, // 5.5
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rsvd_ISR, // 5.6
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rsvd_ISR, // 5.7
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rsvd_ISR, // 5.8
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// Group 6 PIE Vectors
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SPIRXINTA_ISR, // 6.1 SPI-A
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SPITXINTA_ISR, // 6.2 SPI-A
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MRINTA_ISR, // 6.3 McBSP-A
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MXINTA_ISR, // 6.4 McBSP-A
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MRINTB_ISR, // 6.5 McBSP-B
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MXINTB_ISR, // 6.6 McBSP-B
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rsvd_ISR, // 6.7
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rsvd_ISR, // 6.8
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// Group 7 PIE Vectors
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DINTCH1_ISR, // 7.1 DMA channel 1
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DINTCH2_ISR, // 7.2 DMA channel 2
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DINTCH3_ISR, // 7.3 DMA channel 3
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DINTCH4_ISR, // 7.4 DMA channel 4
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DINTCH5_ISR, // 7.5 DMA channel 5
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DINTCH6_ISR, // 7.6 DMA channel 6
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rsvd_ISR, // 7.7
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rsvd_ISR, // 7.8
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// Group 8 PIE Vectors
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I2CINT1A_ISR, // 8.1 I2C
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I2CINT2A_ISR, // 8.2 I2C
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rsvd_ISR, // 8.3
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rsvd_ISR, // 8.4
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SCIRXINTC_ISR, // 8.5 SCI-C
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SCITXINTC_ISR, // 8.6 SCI-C
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rsvd_ISR, // 8.7
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rsvd_ISR, // 8.8
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// Group 9 PIE Vectors
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SCIRXINTA_ISR, // 9.1 SCI-A
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SCITXINTA_ISR, // 9.2 SCI-A
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SCIRXINTB_ISR, // 9.3 SCI-B
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SCITXINTB_ISR, // 9.4 SCI-B
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ECAN0INTA_ISR, // 9.5 eCAN-A
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ECAN1INTA_ISR, // 9.6 eCAN-A
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ECAN0INTB_ISR, // 9.7 eCAN-B
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ECAN1INTB_ISR, // 9.8 eCAN-B
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// Group 10 PIE Vectors
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rsvd_ISR, // 10.1
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rsvd_ISR, // 10.2
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rsvd_ISR, // 10.3
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rsvd_ISR, // 10.4
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rsvd_ISR, // 10.5
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rsvd_ISR, // 10.6
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rsvd_ISR, // 10.7
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rsvd_ISR, // 10.8
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// Group 11 PIE Vectors
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rsvd_ISR, // 11.1
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rsvd_ISR, // 11.2
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rsvd_ISR, // 11.3
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rsvd_ISR, // 11.4
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rsvd_ISR, // 11.5
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rsvd_ISR, // 11.6
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rsvd_ISR, // 11.7
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rsvd_ISR, // 11.8
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// Group 12 PIE Vectors
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XINT3_ISR, // 12.1
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XINT4_ISR, // 12.2
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XINT5_ISR, // 12.3
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XINT6_ISR, // 12.4
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XINT7_ISR, // 12.5
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rsvd_ISR, // 12.6
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LVF_ISR, // 12.7
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LUF_ISR, // 12.8
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};
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//---------------------------------------------------------------------------
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// InitPieVectTable:
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//---------------------------------------------------------------------------
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// This function initializes the PIE vector table to a known state.
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// This function must be executed after boot time.
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//
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void InitPieVectTable(void)
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{
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int16 i;
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Uint32 *Source = (void *) &PieVectTableInit;
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Uint32 *Dest = (void *) &PieVectTable;
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EALLOW;
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for(i=0; i < 128; i++)
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*Dest++ = *Source++;
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EDIS;
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// Enable the PIE Vector Table
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PieCtrlRegs.PIECTRL.bit.ENPIE = 1;
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}
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//===========================================================================
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// End of file.
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//===========================================================================
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