177 lines
6.9 KiB
Batchfile
177 lines
6.9 KiB
Batchfile
/*
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// TI File $Revision: /main/9 $
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// Checkin $Date: July 9, 2008 13:43:25 $
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//###########################################################################
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//
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// FILE: 28332_RAM_lnk.cmd
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//
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// TITLE: Linker Command File For 28332 examples that run out of RAM
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//
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// This ONLY includes all SARAM blocks on the 28332 device.
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// This does not include flash or OTP.
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//
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// Keep in mind that L0 and L1 are protected by the code
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// security module.
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//
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// What this means is in most cases you will want to move to
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// another memory map file which has more memory defined.
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//
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//###########################################################################
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// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
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// $Release Date: August 1, 2008 $
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//###########################################################################
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*/
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/* ======================================================
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// For Code Composer Studio V2.2 and later
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// ---------------------------------------
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// In addition to this memory linker command file,
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// add the header linker command file directly to the project.
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// The header linker command file is required to link the
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// peripheral structures to the proper locations within
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// the memory map.
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//
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// The header linker files are found in <base>\DSP2833x_Headers\cmd
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//
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// For BIOS applications add: DSP2833x_Headers_BIOS.cmd
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// For nonBIOS applications add: DSP2833x_Headers_nonBIOS.cmd
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========================================================= */
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/* ======================================================
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// For Code Composer Studio prior to V2.2
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// --------------------------------------
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// 1) Use one of the following -l statements to include the
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// header linker command file in the project. The header linker
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// file is required to link the peripheral structures to the proper
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// locations within the memory map */
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/* Uncomment this line to include file only for non-BIOS applications */
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/* -l DSP2833x_Headers_nonBIOS.cmd */
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/* Uncomment this line to include file only for BIOS applications */
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/* -l DSP2833x_Headers_BIOS.cmd */
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/* 2) In your project add the path to <base>\DSP2833x_headers\cmd to the
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library search path under project->build options, linker tab,
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library search path (-i).
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/*========================================================= */
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/* Define the memory block start/length for the F28332
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PAGE 0 will be used to organize program sections
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PAGE 1 will be used to organize data sections
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Notes:
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Memory blocks on F28332 are uniform (ie same
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physical memory) in both PAGE 0 and PAGE 1.
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That is the same memory region should not be
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defined for both PAGE 0 and PAGE 1.
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Doing so will result in corruption of program
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and/or data.
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L0/L1/L2 and L3 memory blocks are mirrored - that is
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they can be accessed in high memory or low memory.
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For simplicity only one instance is used in this
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linker file.
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Contiguous SARAM memory blocks can be combined
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if required to create a larger memory block.
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*/
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MEMORY
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{
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PAGE 0 :
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/* BEGIN is used for the "boot to SARAM" bootloader mode */
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/* BOOT_RSVD is used by the boot ROM for stack. */
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/* This section is only reserved to keep the BOOT ROM from */
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/* corrupting this area during the debug process */
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BEGIN : origin = 0x000000, length = 0x000002 /* Boot to M0 will go here */
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BOOT_RSVD : origin = 0x000002, length = 0x00004E /* Part of M0, BOOT rom will use this for stack */
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RAMM0 : origin = 0x000050, length = 0x0003B0
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RAML0 : origin = 0x008000, length = 0x001000
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RAML1 : origin = 0x009000, length = 0x001000
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RAML2 : origin = 0x00A000, length = 0x001000
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RAML3 : origin = 0x00B000, length = 0x001000
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ZONE7A : origin = 0x200000, length = 0x00FC00 /* XINTF zone 7 - program space */
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CSM_RSVD : origin = 0x33FF80, length = 0x000076 /* Part of FLASHA. Program with all 0x0000 when CSM is in use. */
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CSM_PWL : origin = 0x33FFF8, length = 0x000008 /* Part of FLASHA. CSM password locations in FLASHA */
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ADC_CAL : origin = 0x380080, length = 0x000009
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RESET : origin = 0x3FFFC0, length = 0x000002
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IQTABLES : origin = 0x3FE000, length = 0x000b50
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IQTABLES2 : origin = 0x3FEB50, length = 0x00008c
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FPUTABLES : origin = 0x3FEBDC, length = 0x0006A0
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BOOTROM : origin = 0x3FF27C, length = 0x000D44
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PAGE 1 :
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RAMM1 : origin = 0x000400, length = 0x000400 /* on-chip RAM block M1 */
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RAML4 : origin = 0x00C000, length = 0x001000
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RAML5 : origin = 0x00D000, length = 0x001000
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ZONE7B : origin = 0x20FC00, length = 0x000400 /* XINTF zone 7 - data space */
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}
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SECTIONS
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{
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/* Setup for "boot to SARAM" mode:
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The codestart section (found in DSP28_CodeStartBranch.asm)
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re-directs execution to the start of user code. */
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codestart : > BEGIN, PAGE = 0
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ramfuncs : > RAML0, PAGE = 0
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.text : > RAML1, PAGE = 0
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.cinit : > RAML0, PAGE = 0
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.pinit : > RAML0, PAGE = 0
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.switch : > RAML0, PAGE = 0
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.stack : > RAMM1, PAGE = 1
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.ebss : > RAML4, PAGE = 1
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.econst : > RAML5, PAGE = 1
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.esysmem : > RAMM1, PAGE = 1
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IQmath : > RAML1, PAGE = 0
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IQmathTables : > IQTABLES, PAGE = 0, TYPE = NOLOAD
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/* Uncomment the section below if calling the IQNexp() or IQexp()
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functions from the IQMath.lib library in order to utilize the
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relevant IQ Math table in Boot ROM (This saves space and Boot ROM
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is 1 wait-state). If this section is not uncommented, IQmathTables2
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will be loaded into other memory (SARAM, Flash, etc.) and will take
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up space, but 0 wait-state is possible.
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*/
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/*
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IQmathTables2 : > IQTABLES2, PAGE = 0, TYPE = NOLOAD
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{
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IQmath.lib<IQNexpTable.obj> (IQmathTablesRam)
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}
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*/
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FPUmathTables : > FPUTABLES, PAGE = 0, TYPE = NOLOAD
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DMARAML4 : > RAML4, PAGE = 1
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DMARAML5 : > RAML5, PAGE = 1
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ZONE7DATA : > ZONE7B, PAGE = 1
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.reset : > RESET, PAGE = 0, TYPE = DSECT /* not used */
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csm_rsvd : > CSM_RSVD PAGE = 0, TYPE = DSECT /* not used for SARAM examples */
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csmpasswds : > CSM_PWL PAGE = 0, TYPE = DSECT /* not used for SARAM examples */
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/* Allocate ADC_cal function (pre-programmed by factory into TI reserved memory) */
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.adc_cal : load = ADC_CAL, PAGE = 0, TYPE = NOLOAD
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}
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/*
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//===========================================================================
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// End of file.
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//===========================================================================
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*/
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