143 lines
4.1 KiB
C
143 lines
4.1 KiB
C
#include "DSP28x_Project.h" // Device Headerfile and Examples Include File
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#include "i2c.h" // Device Headerfile and Examples Include File
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void InitI2CGpio()
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{
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EALLOW;
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/* Enable internal pull-up for the selected pins */
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// Pull-ups can be enabled or disabled disabled by the user.
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// This will enable the pullups for the specified pins.
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// Comment out other unwanted lines.
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GpioCtrlRegs.GPBPUD.bit.GPIO32 = 0; // Enable pull-up for GPIO32 (SDAA)
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GpioCtrlRegs.GPBPUD.bit.GPIO33 = 0; // Enable pull-up for GPIO33 (SCLA)
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/* Set qualification for selected pins to asynch only */
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// This will select asynch (no qualification) for the selected pins.
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// Comment out other unwanted lines.
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GpioCtrlRegs.GPBQSEL1.bit.GPIO32 = 3; // Asynch input GPIO32 (SDAA)
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GpioCtrlRegs.GPBQSEL1.bit.GPIO33 = 3; // Asynch input GPIO33 (SCLA)
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/* Configure SCI pins using GPIO regs*/
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// This specifies which of the possible GPIO pins will be I2C functional pins.
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// Comment out other unwanted lines.
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GpioCtrlRegs.GPBMUX1.bit.GPIO32 = 1; // Configure GPIO32 for SDAA operation
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GpioCtrlRegs.GPBMUX1.bit.GPIO33 = 1; // Configure GPIO33 for SCLA operation
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EDIS;
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}
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void I2CA_Init(void)
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{
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InitI2CGpio();
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// Initialize I2C
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I2caRegs.I2CSAR = 0x0050; // Slave address - EEPROM control code
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I2caRegs.I2CMDR.bit.IRS = 0; // IPSC must be initialized while the I2C module is in reset (IRS = 0 in I2CMDR).
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#if (CPU_FRQ_150MHZ) // Default - For 150MHz SYSCLKOUT
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I2caRegs.I2CPSC.all = 14; // Prescaler - need 7-12 Mhz on module clk (150/15 = 10MHz)
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#endif
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#if (CPU_FRQ_100MHZ) // For 100 MHz SYSCLKOUT
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I2caRegs.I2CPSC.all = 9; // Prescaler - need 7-12 Mhz on module clk (100/10 = 10MHz)
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#endif
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I2caRegs.I2CCLKL = 10; // NOTE: must be non zero
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I2caRegs.I2CCLKH = 5; // NOTE: must be non zero
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I2caRegs.I2CMDR.all = 0x0000;
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I2caRegs.I2CMDR.bit.MST = 1;
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I2caRegs.I2CMDR.bit.IRS = 1; // Take I2C out of reset
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// Stop I2C when suspended
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return;
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}
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Uint16 I2CA_WriteData(unsigned int Addr, int Data)
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{
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// Wait until the STP bit is cleared from any previous master communication.
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// Clearing of this bit by the module is delayed until after the SCD bit is
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// set. If this bit is not checked prior to initiating a new message, the
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// I2C could get confused.
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if (I2caRegs.I2CMDR.bit.STP == 1)
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{
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return I2C_STP_NOT_READY_ERROR;
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}
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// Check if bus busy
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if (I2caRegs.I2CSTR.bit.BB == 1)
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{
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return I2C_BUS_BUSY_ERROR;
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}
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// Setup number of bytes to send
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// MsgBuffer + Address
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I2caRegs.I2CCNT = 4;
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// Send start as master transmitter
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I2caRegs.I2CMDR.all = 0x6E20;
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// Setup data to send
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I2caRegs.I2CDXR = (Addr*2)>>8;
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while(!I2caRegs.I2CSTR.bit.XRDY);
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I2caRegs.I2CDXR = (Addr*2);
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while(!I2caRegs.I2CSTR.bit.XRDY);
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I2caRegs.I2CDXR = Data>>8;
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while(!I2caRegs.I2CSTR.bit.XRDY);
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I2caRegs.I2CDXR = Data;
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while(!I2caRegs.I2CSTR.bit.XRDY);
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while(I2caRegs.I2CMDR.bit.STP == 1);
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while(I2caRegs.I2CSTR.bit.BB == 1);
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return I2C_SUCCESS;
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}
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int I2CA_ReadData(unsigned int Addr)
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{
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WORDE data;
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// Wait until the STP bit is cleared from any previous master communication.
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// Clearing of this bit by the module is delayed until after the SCD bit is
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// set. If this bit is not checked prior to initiating a new message, the
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// I2C could get confused.
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if (I2caRegs.I2CMDR.bit.STP == 1)
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{
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return I2C_STP_NOT_READY_ERROR;
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}
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// Check if bus busy
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if (I2caRegs.I2CSTR.bit.BB == 1)
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{
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return I2C_BUS_BUSY_ERROR;
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}
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I2caRegs.I2CCNT = 2;
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I2caRegs.I2CMDR.all = 0x6E20; // Send data to setup EEPROM address 0x6620
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I2caRegs.I2CDXR = (Addr*2)>>8;
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while(!I2caRegs.I2CSTR.bit.XRDY);
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I2caRegs.I2CDXR = (Addr*2);
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while(I2caRegs.I2CMDR.bit.STP == 1);
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I2caRegs.I2CCNT = 2;
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I2caRegs.I2CMDR.all = 0x6C20; // Send restart as master receiver
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while(!I2caRegs.I2CSTR.bit.RRDY);
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data.byt.byte_1 = I2caRegs.I2CDRR;
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while(!I2caRegs.I2CSTR.bit.RRDY);
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data.byt.byte_0 = I2caRegs.I2CDRR;
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return data.all;
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}
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//===========================================================================
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// No more.
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//===========================================================================
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