84 lines
2.2 KiB
C
84 lines
2.2 KiB
C
// TI File $Revision: /main/1 $
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// Checkin $Date: August 18, 2006 13:52:39 $
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//###########################################################################
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//
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// FILE: DSP2833x_XIntrupt.h
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//
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// TITLE: DSP2833x Device External Interrupt Register Definitions.
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//
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//###########################################################################
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// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
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// $Release Date: August 1, 2008 $
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//###########################################################################
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#ifndef DSP2833x_XINTRUPT_H
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#define DSP2833x_XINTRUPT_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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//---------------------------------------------------------------------------
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struct XINTCR_BITS {
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Uint16 ENABLE:1; // 0 enable/disable
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Uint16 rsvd1:1; // 1 reserved
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Uint16 POLARITY:2; // 3:2 pos/neg, both triggered
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Uint16 rsvd2:12; //15:4 reserved
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};
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union XINTCR_REG {
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Uint16 all;
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struct XINTCR_BITS bit;
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};
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struct XNMICR_BITS {
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Uint16 ENABLE:1; // 0 enable/disable
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Uint16 SELECT:1; // 1 Timer 1 or XNMI connected to int13
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Uint16 POLARITY:2; // 3:2 pos/neg, or both triggered
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Uint16 rsvd2:12; // 15:4 reserved
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};
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union XNMICR_REG {
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Uint16 all;
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struct XNMICR_BITS bit;
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};
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//---------------------------------------------------------------------------
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// External Interrupt Register File:
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//
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struct XINTRUPT_REGS {
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union XINTCR_REG XINT1CR;
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union XINTCR_REG XINT2CR;
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union XINTCR_REG XINT3CR;
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union XINTCR_REG XINT4CR;
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union XINTCR_REG XINT5CR;
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union XINTCR_REG XINT6CR;
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union XINTCR_REG XINT7CR;
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union XNMICR_REG XNMICR;
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Uint16 XINT1CTR;
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Uint16 XINT2CTR;
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Uint16 rsvd[5];
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Uint16 XNMICTR;
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};
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//---------------------------------------------------------------------------
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// External Interrupt References & Function Declarations:
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//
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extern volatile struct XINTRUPT_REGS XIntruptRegs;
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#ifdef __cplusplus
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}
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#endif /* extern "C" */
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#endif // end of DSP2833x_XINTF_H definition
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//===========================================================================
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// End of file.
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//===========================================================================
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