459 lines
20 KiB
C
459 lines
20 KiB
C
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// TI File $Revision: /main/9 $
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// Checkin $Date: April 21, 2008 15:42:38 $
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//###########################################################################
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//
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// FILE: Example_2833xGpioSetup.c
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//
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// TITLE: DSP2833x Device GPIO Setup
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//
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// ASSUMPTIONS:
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//
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// This program requires the DSP2833x header files.
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//
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// Two different examples are included. Select the example
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// to execute before compiling using the #define statements
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// found at the top of the code.
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//
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// As supplied, this project is configured for "boot to SARAM"
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// operation. The 2833x Boot Mode table is shown below.
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// For information on configuring the boot mode of an eZdsp,
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// please refer to the documentation included with the eZdsp,
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//
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// $Boot_Table:
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//
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// GPIO87 GPIO86 GPIO85 GPIO84
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// XA15 XA14 XA13 XA12
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// PU PU PU PU
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// ==========================================
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// 1 1 1 1 Jump to Flash
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// 1 1 1 0 SCI-A boot
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// 1 1 0 1 SPI-A boot
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// 1 1 0 0 I2C-A boot
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// 1 0 1 1 eCAN-A boot
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// 1 0 1 0 McBSP-A boot
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// 1 0 0 1 Jump to XINTF x16
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// 1 0 0 0 Jump to XINTF x32
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// 0 1 1 1 Jump to OTP
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// 0 1 1 0 Parallel GPIO I/O boot
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// 0 1 0 1 Parallel XINTF boot
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// 0 1 0 0 Jump to SARAM <- "boot to SARAM"
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// 0 0 1 1 Branch to check boot mode
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// 0 0 1 0 Boot to flash, bypass ADC cal
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// 0 0 0 1 Boot to SARAM, bypass ADC cal
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// 0 0 0 0 Boot to SCI-A, bypass ADC cal
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// Boot_Table_End$
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//
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// DESCRIPTION:
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//
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//
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// Configures the 2833x GPIO into two different configurations
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// This code is verbose to illustrate how the GPIO could be setup.
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// In a real application, lines of code can be combined for improved
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// code size and efficency.
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//
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// This example only sets-up the GPIO.. nothing is actually done with
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// the pins after setup.
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//
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// In general:
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//
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// All pullup resistors are enabled. For ePWMs this may not be desired.
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// Input qual for communication ports (eCAN, SPI, SCI, I2C) is asynchronous
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// Input qual for Trip pins (TZ) is asynchronous
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// Input qual for eCAP and eQEP signals is synch to SYSCLKOUT
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// Input qual for some I/O's and interrupts may have a sampling window
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//
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//
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//###########################################################################
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// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
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// $Release Date: August 1, 2008 $
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//###########################################################################
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#include "DSP28x_Project.h" // Device Headerfile and Examples Include File
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// Select the example to compile in. Only one example should be set as 1
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// the rest should be set as 0.
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#define EXAMPLE1 1 // Basic pinout configuration example
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#define EXAMPLE2 0 // Communication pinout example
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// Prototype statements for functions found within this file.
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void Gpio_setup1(void);
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void Gpio_setup2(void);
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void main(void)
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{
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// Step 1. Initialize System Control:
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// PLL, WatchDog, enable Peripheral Clocks
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// This example function is found in the DSP2833x_SysCtrl.c file.
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InitSysCtrl();
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// Step 2. Initalize GPIO:
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// This example function is found in the DSP2833x_Gpio.c file and
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// illustrates how to set the GPIO to it's default state.
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// InitGpio(); Skipped for this example
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// Step 3. Clear all interrupts and initialize PIE vector table:
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// Disable CPU interrupts
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DINT;
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// Initialize PIE control registers to their default state.
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// The default state is all PIE interrupts disabled and flags
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// are cleared.
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// This function is found in the DSP2833x_PieCtrl.c file.
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InitPieCtrl();
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// Disable CPU interrupts and clear all CPU interrupt flags:
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IER = 0x0000;
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IFR = 0x0000;
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// Initialize the PIE vector table with pointers to the shell Interrupt
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// Service Routines (ISR).
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// This will populate the entire table, even if the interrupt
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// is not used in this example. This is useful for debug purposes.
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// The shell ISR routines are found in DSP2833x_DefaultIsr.c.
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// This function is found in DSP2833x_PieVect.c.
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InitPieVectTable();
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// Step 4. Initialize all the Device Peripherals:
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// This function is found in DSP2833x_InitPeripherals.c
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// InitPeripherals(); // Not required for this example
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// Step 5. User specific code:
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#if EXAMPLE1
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// This example is a basic pinout
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Gpio_setup1();
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#endif // - EXAMPLE1
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#if EXAMPLE2
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// This example is a communications pinout
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Gpio_setup2();
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#endif
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}
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void Gpio_setup1(void)
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{
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// Example 1:
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// Basic Pinout.
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// This basic pinout includes:
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// PWM1-3, ECAP1, ECAP2, TZ1-TZ4, SPI-A, EQEP1, SCI-A, I2C
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// and a number of I/O pins
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// These can be combined into single statements for improved
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// code efficiency.
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// Enable PWM1-3 on GPIO0-GPIO5
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EALLOW;
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GpioCtrlRegs.GPAPUD.bit.GPIO0 = 0; // Enable pullup on GPIO0
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GpioCtrlRegs.GPAPUD.bit.GPIO1 = 0; // Enable pullup on GPIO1
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GpioCtrlRegs.GPAPUD.bit.GPIO2 = 0; // Enable pullup on GPIO2
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GpioCtrlRegs.GPAPUD.bit.GPIO3 = 0; // Enable pullup on GPIO3
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GpioCtrlRegs.GPAPUD.bit.GPIO4 = 0; // Enable pullup on GPIO4
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GpioCtrlRegs.GPAPUD.bit.GPIO5 = 0; // Enable pullup on GPIO5
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GpioCtrlRegs.GPAMUX1.bit.GPIO0 = 1; // GPIO0 = PWM1A
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GpioCtrlRegs.GPAMUX1.bit.GPIO1 = 1; // GPIO1 = PWM1B
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GpioCtrlRegs.GPAMUX1.bit.GPIO2 = 1; // GPIO2 = PWM2A
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GpioCtrlRegs.GPAMUX1.bit.GPIO3 = 1; // GPIO3 = PWM2B
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GpioCtrlRegs.GPAMUX1.bit.GPIO4 = 1; // GPIO4 = PWM3A
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GpioCtrlRegs.GPAMUX1.bit.GPIO5 = 1; // GPIO5 = PWM3B
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// Enable an GPIO output on GPIO6, set it high
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GpioCtrlRegs.GPAPUD.bit.GPIO6 = 0; // Enable pullup on GPIO6
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GpioDataRegs.GPASET.bit.GPIO6 = 1; // Load output latch
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GpioCtrlRegs.GPAMUX1.bit.GPIO6 = 0; // GPIO6 = GPIO6
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GpioCtrlRegs.GPADIR.bit.GPIO6 = 1; // GPIO6 = output
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// Enable eCAP1 on GPIO7
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GpioCtrlRegs.GPAPUD.bit.GPIO7 = 0; // Enable pullup on GPIO7
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GpioCtrlRegs.GPAQSEL1.bit.GPIO7 = 0; // Synch to SYSCLOUT
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GpioCtrlRegs.GPAMUX1.bit.GPIO7 = 3; // GPIO7 = ECAP2
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// Enable GPIO outputs on GPIO8 - GPIO11, set it high
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GpioCtrlRegs.GPAPUD.bit.GPIO8 = 0; // Enable pullup on GPIO8
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GpioDataRegs.GPASET.bit.GPIO8 = 1; // Load output latch
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GpioCtrlRegs.GPAMUX1.bit.GPIO8 = 0; // GPIO8 = GPIO8
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GpioCtrlRegs.GPADIR.bit.GPIO8 = 1; // GPIO8 = output
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GpioCtrlRegs.GPAPUD.bit.GPIO9 = 0; // Enable pullup on GPIO9
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GpioDataRegs.GPASET.bit.GPIO9 = 1; // Load output latch
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GpioCtrlRegs.GPAMUX1.bit.GPIO9 = 0; // GPIO9 = GPIO9
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GpioCtrlRegs.GPADIR.bit.GPIO9 = 1; // GPIO9 = output
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GpioCtrlRegs.GPAPUD.bit.GPIO10 = 0; // Enable pullup on GPIO10
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GpioDataRegs.GPASET.bit.GPIO10 = 1; // Load output latch
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GpioCtrlRegs.GPAMUX1.bit.GPIO10 = 0; // GPIO10 = GPIO10
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GpioCtrlRegs.GPADIR.bit.GPIO6 = 1; // GPIO10 = output
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GpioCtrlRegs.GPAPUD.bit.GPIO11 = 0; // Enable pullup on GPIO11
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GpioCtrlRegs.GPAMUX1.bit.GPIO11 = 0; // GPIO11 = GPIO11
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GpioCtrlRegs.GPADIR.bit.GPIO11 = 1; // GPIO11 = output
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// Enable Trip Zone inputs on GPIO12 - GPIO15
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GpioCtrlRegs.GPAPUD.bit.GPIO12 = 0; // Enable pullup on GPIO12
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GpioCtrlRegs.GPAPUD.bit.GPIO13 = 0; // Enable pullup on GPIO13
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GpioCtrlRegs.GPAPUD.bit.GPIO14 = 0; // Enable pullup on GPIO14
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GpioCtrlRegs.GPAPUD.bit.GPIO15 = 0; // Enable pullup on GPIO15
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GpioCtrlRegs.GPAQSEL1.bit.GPIO12 = 3; // asynch input
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GpioCtrlRegs.GPAQSEL1.bit.GPIO13 = 3; // asynch input
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GpioCtrlRegs.GPAQSEL1.bit.GPIO14 = 3; // asynch input
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GpioCtrlRegs.GPAQSEL1.bit.GPIO15 = 3; // asynch input
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GpioCtrlRegs.GPAMUX1.bit.GPIO12 = 1; // GPIO12 = TZ1
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GpioCtrlRegs.GPAMUX1.bit.GPIO13 = 1; // GPIO13 = TZ2
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GpioCtrlRegs.GPAMUX1.bit.GPIO14 = 1; // GPIO14 = TZ3
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GpioCtrlRegs.GPAMUX1.bit.GPIO15 = 1; // GPIO15 = TZ4
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// Enable SPI-A on GPIO16 - GPIO19
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GpioCtrlRegs.GPAPUD.bit.GPIO16 = 0; // Enable pullup on GPIO16
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GpioCtrlRegs.GPAPUD.bit.GPIO17 = 0; // Enable pullup on GPIO17
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GpioCtrlRegs.GPAPUD.bit.GPIO18 = 0; // Enable pullup on GPIO18
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GpioCtrlRegs.GPAPUD.bit.GPIO19 = 0; // Enable pullup on GPIO19
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GpioCtrlRegs.GPAQSEL2.bit.GPIO16 = 3; // asynch input
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GpioCtrlRegs.GPAQSEL2.bit.GPIO17 = 3; // asynch input
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GpioCtrlRegs.GPAQSEL2.bit.GPIO18 = 3; // asynch input
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GpioCtrlRegs.GPAQSEL2.bit.GPIO19 = 3; // asynch input
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GpioCtrlRegs.GPAMUX2.bit.GPIO16 = 1; // GPIO16 = SPICLKA
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GpioCtrlRegs.GPAMUX2.bit.GPIO17 = 1; // GPIO17 = SPIS0MIA
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GpioCtrlRegs.GPAMUX2.bit.GPIO18 = 1; // GPIO18 = SPICLKA
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GpioCtrlRegs.GPAMUX2.bit.GPIO19 = 1; // GPIO19 = SPISTEA
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// Enable EQEP1 on GPIO20 - GPIO23
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GpioCtrlRegs.GPAPUD.bit.GPIO20 = 0; // Enable pullup on GPIO20
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GpioCtrlRegs.GPAPUD.bit.GPIO21 = 0; // Enable pullup on GPIO21
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GpioCtrlRegs.GPAPUD.bit.GPIO22 = 0; // Enable pullup on GPIO22
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GpioCtrlRegs.GPAPUD.bit.GPIO23 = 0; // Enable pullup on GPIO23
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GpioCtrlRegs.GPAQSEL2.bit.GPIO20 = 0; // Synch to SYSCLKOUT
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GpioCtrlRegs.GPAQSEL2.bit.GPIO21 = 0; // Synch to SYSCLKOUT
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GpioCtrlRegs.GPAQSEL2.bit.GPIO22 = 0; // Synch to SYSCLKOUT
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GpioCtrlRegs.GPAQSEL2.bit.GPIO23 = 0; // Synch to SYSCLKOUT
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GpioCtrlRegs.GPAMUX2.bit.GPIO20 = 1; // GPIO20 = EQEP1A
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GpioCtrlRegs.GPAMUX2.bit.GPIO21 = 1; // GPIO21 = EQEP1B
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GpioCtrlRegs.GPAMUX2.bit.GPIO22 = 1; // GPIO22 = EQEP1S
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GpioCtrlRegs.GPAMUX2.bit.GPIO23 = 1; // GPIO23 = EQEP1I
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// Enable eCAP1 on GPIO24
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GpioCtrlRegs.GPAPUD.bit.GPIO24 = 0; // Enable pullup on GPIO24
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GpioCtrlRegs.GPAQSEL2.bit.GPIO24 = 0; // Synch to SYSCLKOUT
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GpioCtrlRegs.GPAMUX2.bit.GPIO24 = 1; // GPIO24 = ECAP1
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// Set input qualifcation period for GPIO25 & GPIO26
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GpioCtrlRegs.GPACTRL.bit.QUALPRD3=1; // Qual period = SYSCLKOUT/2
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GpioCtrlRegs.GPAQSEL2.bit.GPIO25=2; // 6 samples
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GpioCtrlRegs.GPAQSEL2.bit.GPIO26=2; // 6 samples
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// Make GPIO25 the input source for Xint1
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GpioCtrlRegs.GPAMUX2.bit.GPIO25 = 0; // GPIO25 = GPIO25
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GpioCtrlRegs.GPADIR.bit.GPIO25 = 0; // GPIO25 = input
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GpioIntRegs.GPIOXINT1SEL.all = 25; // Xint1 connected to GPIO25
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// Make GPIO26 the input source for XINT2
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GpioCtrlRegs.GPAMUX2.bit.GPIO26 = 0; // GPIO26 = GPIO26
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GpioCtrlRegs.GPADIR.bit.GPIO26 = 0; // GPIO26 = input
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GpioIntRegs.GPIOXINT2SEL.all = 26; // XINT2 connected to GPIO26
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// Make GPIO27 wakeup from HALT/STANDBY Low Power Modes
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GpioCtrlRegs.GPAMUX2.bit.GPIO27 = 0; // GPIO27 = GPIO27
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GpioCtrlRegs.GPADIR.bit.GPIO27 = 0; // GPIO27 = input
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GpioIntRegs.GPIOLPMSEL.bit.GPIO27=1; // GPIO27 will wake the device
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SysCtrlRegs.LPMCR0.bit.QUALSTDBY=2; // Qualify GPIO27 by 2 OSCCLK
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// cycles before waking the device
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// from STANDBY
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// Enable SCI-A on GPIO28 - GPIO29
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GpioCtrlRegs.GPAPUD.bit.GPIO28 = 0; // Enable pullup on GPIO28
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GpioCtrlRegs.GPAQSEL2.bit.GPIO28 = 3; // Asynch input
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GpioCtrlRegs.GPAMUX2.bit.GPIO28 = 1; // GPIO28 = SCIRXDA
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GpioCtrlRegs.GPAPUD.bit.GPIO29 = 0; // Enable pullup on GPIO29
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GpioCtrlRegs.GPAMUX2.bit.GPIO29 = 1; // GPIO29 = SCITXDA
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// Enable CAN-A on GPIO30 - GPIO31
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GpioCtrlRegs.GPAPUD.bit.GPIO30 = 0; // Enable pullup on GPIO30
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GpioCtrlRegs.GPAMUX2.bit.GPIO30 = 1; // GPIO30 = CANTXA
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GpioCtrlRegs.GPAPUD.bit.GPIO31 = 0; // Enable pullup on GPIO31
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GpioCtrlRegs.GPAQSEL2.bit.GPIO31 = 3; // Asynch input
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GpioCtrlRegs.GPAMUX2.bit.GPIO31 = 1; // GPIO31 = CANRXA
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// Enable I2C-A on GPIO32 - GPIO33
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GpioCtrlRegs.GPBPUD.bit.GPIO32 = 0; // Enable pullup on GPIO32
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GpioCtrlRegs.GPBMUX1.bit.GPIO32 = 1; // GPIO32 = SDAA
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GpioCtrlRegs.GPBQSEL1.bit.GPIO33 = 3; // Asynch input
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GpioCtrlRegs.GPBPUD.bit.GPIO33 = 0; // Enable pullup on GPIO33
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GpioCtrlRegs.GPBQSEL1.bit.GPIO33 = 3; // Asynch input
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GpioCtrlRegs.GPBMUX1.bit.GPIO33 = 1; // GPIO33 = SCLA
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// Make GPIO34 an input
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GpioCtrlRegs.GPBPUD.bit.GPIO34 = 0; // Enable pullup on GPIO34
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GpioCtrlRegs.GPBMUX1.bit.GPIO34 = 0; // GPIO34 = GPIO34
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GpioCtrlRegs.GPBDIR.bit.GPIO34 = 0; // GPIO34 = input
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EDIS;
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}
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void Gpio_setup2(void)
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{
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// Example 1:
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// Communications Pinout.
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// This basic communications pinout includes:
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// PWM1-3, CAP1, CAP2, SPI-A, SPI-B, CAN-A, SCI-A and I2C
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// and a number of I/O pins
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// Enable PWM1-3 on GPIO0-GPIO5
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EALLOW;
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GpioCtrlRegs.GPAPUD.bit.GPIO0 = 0; // Enable pullup on GPIO0
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GpioCtrlRegs.GPAPUD.bit.GPIO1 = 0; // Enable pullup on GPIO1
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GpioCtrlRegs.GPAPUD.bit.GPIO2 = 0; // Enable pullup on GPIO2
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GpioCtrlRegs.GPAPUD.bit.GPIO3 = 0; // Enable pullup on GPIO3
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GpioCtrlRegs.GPAPUD.bit.GPIO4 = 0; // Enable pullup on GPIO4
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GpioCtrlRegs.GPAPUD.bit.GPIO5 = 0; // Enable pullup on GPIO5
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GpioCtrlRegs.GPAMUX1.bit.GPIO0 = 1; // GPIO0 = PWM1A
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GpioCtrlRegs.GPAMUX1.bit.GPIO1 = 1; // GPIO1 = PWM1B
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GpioCtrlRegs.GPAMUX1.bit.GPIO2 = 1; // GPIO2 = PWM2A
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GpioCtrlRegs.GPAMUX1.bit.GPIO3 = 1; // GPIO3 = PWM2B
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GpioCtrlRegs.GPAMUX1.bit.GPIO4 = 1; // GPIO4 = PWM3A
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GpioCtrlRegs.GPAMUX1.bit.GPIO5 = 1; // GPIO5 = PWM3B
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// Enable an GPIO output on GPIO6
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GpioCtrlRegs.GPAPUD.bit.GPIO6 = 0; // Enable pullup on GPIO6
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GpioDataRegs.GPASET.bit.GPIO6 = 1; // Load output latch
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GpioCtrlRegs.GPAMUX1.bit.GPIO6 = 0; // GPIO6 = GPIO6
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GpioCtrlRegs.GPADIR.bit.GPIO6 = 1; // GPIO6 = output
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// Enable eCAP1 on GPIO7
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GpioCtrlRegs.GPAPUD.bit.GPIO7 = 0; // Enable pullup on GPIO7
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GpioCtrlRegs.GPAQSEL1.bit.GPIO7 = 0; // Synch to SYSCLKOUT
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GpioCtrlRegs.GPAMUX1.bit.GPIO7 = 3; // GPIO7 = ECAP2
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// Enable GPIO outputs on GPIO8 - GPIO11
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GpioCtrlRegs.GPAPUD.bit.GPIO8 = 0; // Enable pullup on GPIO8
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GpioDataRegs.GPASET.bit.GPIO8 = 1; // Load output latch
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GpioCtrlRegs.GPAMUX1.bit.GPIO8 = 0; // GPIO8 = GPIO8
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GpioCtrlRegs.GPADIR.bit.GPIO8 = 1; // GPIO8 = output
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GpioCtrlRegs.GPAPUD.bit.GPIO9 = 0; // Enable pullup on GPIO9
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GpioDataRegs.GPASET.bit.GPIO9 = 1; // Load output latch
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GpioCtrlRegs.GPAMUX1.bit.GPIO9 = 0; // GPIO9 = GPIO9
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GpioCtrlRegs.GPADIR.bit.GPIO9 = 1; // GPIO9 = output
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GpioCtrlRegs.GPAPUD.bit.GPIO10 = 0; // Enable pullup on GPIO10
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GpioDataRegs.GPASET.bit.GPIO10 = 1; // Load output latch
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GpioCtrlRegs.GPAMUX1.bit.GPIO10 = 0; // GPIO10 = GPIO10
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GpioCtrlRegs.GPADIR.bit.GPIO10 = 1; // GPIO10 = output
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GpioCtrlRegs.GPAPUD.bit.GPIO11 = 0; // Enable pullup on GPIO11
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GpioDataRegs.GPASET.bit.GPIO11 = 1; // Load output latch
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GpioCtrlRegs.GPAMUX1.bit.GPIO11 = 0; // GPIO11 = GPIO11
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GpioCtrlRegs.GPADIR.bit.GPIO11 = 1; // GPIO11 = output
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// Enable SPI-B on GPIO12 - GPIO15
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GpioCtrlRegs.GPAPUD.bit.GPIO12 = 0; // Enable pullup on GPIO12 (SPISIMOB)
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GpioCtrlRegs.GPAPUD.bit.GPIO12 = 0; // Enable pullup on GPIO13 (SPISOMIB)
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GpioCtrlRegs.GPAPUD.bit.GPIO14 = 0; // Enable pullup on GPIO14 (SPICLKB)
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GpioCtrlRegs.GPAPUD.bit.GPIO15 = 0; // Enable pullup on GPIO15 (SPISTEB)
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GpioCtrlRegs.GPAQSEL1.bit.GPIO12 = 3; // asynch input
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GpioCtrlRegs.GPAQSEL1.bit.GPIO13 = 3; // asynch input
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GpioCtrlRegs.GPAQSEL1.bit.GPIO14 = 3; // asynch input
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GpioCtrlRegs.GPAQSEL1.bit.GPIO15 = 3; // asynch input
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GpioCtrlRegs.GPAMUX1.bit.GPIO12 = 3; // GPIO12 = SPISIMOB
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GpioCtrlRegs.GPAMUX1.bit.GPIO13 = 3; // GPIO13 = SPISOMIB
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GpioCtrlRegs.GPAMUX1.bit.GPIO14 = 3; // GPIO14 = SPICLKB
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GpioCtrlRegs.GPAMUX1.bit.GPIO15 = 3; // GPIO15 = SPISTEB
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// Enable SPI-A on GPIO16 - GPIO19
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GpioCtrlRegs.GPAPUD.bit.GPIO16 = 0; // Enable pullup on GPIO16 (SPICLKA)
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GpioCtrlRegs.GPAPUD.bit.GPIO17 = 0; // Enable pullup on GPIO17 (SPIS0MIA)
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GpioCtrlRegs.GPAPUD.bit.GPIO18 = 0; // Enable pullup on GPIO18 (SPICLKA)
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GpioCtrlRegs.GPAPUD.bit.GPIO19 = 0; // Enable pullup on GPIO19 (SPISTEA)
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GpioCtrlRegs.GPAQSEL2.bit.GPIO16 = 3; // asynch input
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GpioCtrlRegs.GPAQSEL2.bit.GPIO17 = 3; // asynch input
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GpioCtrlRegs.GPAQSEL2.bit.GPIO18 = 3; // asynch input
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GpioCtrlRegs.GPAQSEL2.bit.GPIO19 = 3; // asynch input
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GpioCtrlRegs.GPAMUX2.bit.GPIO16 = 1; // GPIO16 = SPICLKA
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GpioCtrlRegs.GPAMUX2.bit.GPIO17 = 1; // GPIO17 = SPIS0MIA
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GpioCtrlRegs.GPAMUX2.bit.GPIO18 = 1; // GPIO18 = SPICLKA
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GpioCtrlRegs.GPAMUX2.bit.GPIO19 = 1; // GPIO19 = SPISTEA
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// Enable EQEP1 on GPIO20 - GPIO23
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GpioCtrlRegs.GPAPUD.bit.GPIO20 = 0; // Enable pullup on GPIO20 (EQEP1A)
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GpioCtrlRegs.GPAPUD.bit.GPIO21 = 0; // Enable pullup on GPIO21 (EQEP1B)
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GpioCtrlRegs.GPAPUD.bit.GPIO22 = 0; // Enable pullup on GPIO22 (EQEP1S)
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GpioCtrlRegs.GPAPUD.bit.GPIO23 = 0; // Enable pullup on GPIO23 (EQEP1I)
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GpioCtrlRegs.GPAQSEL2.bit.GPIO20 = 0; // Synch to SYSCLKOUT
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GpioCtrlRegs.GPAQSEL2.bit.GPIO21 = 0; // Synch to SYSCLKOUT
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GpioCtrlRegs.GPAQSEL2.bit.GPIO22 = 0; // Synch to SYSCLKOUT
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GpioCtrlRegs.GPAQSEL2.bit.GPIO23 = 0; // Synch to SYSCLKOUT
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GpioCtrlRegs.GPAMUX2.bit.GPIO20 = 1; // GPIO20 = EQEP1A
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GpioCtrlRegs.GPAMUX2.bit.GPIO21 = 1; // GPIO21 = EQEP1B
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GpioCtrlRegs.GPAMUX2.bit.GPIO22 = 1; // GPIO22 = EQEP1S
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GpioCtrlRegs.GPAMUX2.bit.GPIO23 = 1; // GPIO23 = EQEP1I
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// Enable eCAP1 on GPIO24
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GpioCtrlRegs.GPAPUD.bit.GPIO24 = 0; // Enable pullup on GPIO24 (ECAP1)
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GpioCtrlRegs.GPAQSEL2.bit.GPIO24 = 0; // Synch to SYSCLKOUT
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GpioCtrlRegs.GPAMUX2.bit.GPIO24 = 1; // GPIO24 = ECAP1
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// Set input qualifcation period for GPIO25 & GPIO26 inputs
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GpioCtrlRegs.GPACTRL.bit.QUALPRD3=1; // Qual period = SYSCLKOUT/2
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GpioCtrlRegs.GPAQSEL2.bit.GPIO25=2; // 6 samples
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GpioCtrlRegs.GPAQSEL2.bit.GPIO26=1; // 3 samples
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// Make GPIO25 the input source for Xint1
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GpioCtrlRegs.GPAMUX2.bit.GPIO25 = 0; // GPIO25 = GPIO25
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GpioCtrlRegs.GPADIR.bit.GPIO25 = 0; // GPIO25 = input
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GpioIntRegs.GPIOXINT1SEL.all = 25; // Xint1 connected to GPIO25
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// Make GPIO26 the input source for XINT2
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GpioCtrlRegs.GPAMUX2.bit.GPIO26 = 0; // GPIO26 = GPIO26
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GpioCtrlRegs.GPADIR.bit.GPIO26 = 0; // GPIO26 = input
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GpioIntRegs.GPIOXINT2SEL.all = 26; // XINT2 connected to GPIO26
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// Make GPIO27 wakeup from HALT/STANDBY Low Power Modes
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GpioCtrlRegs.GPAMUX2.bit.GPIO27 = 0; // GPIO27 = GPIO27
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GpioCtrlRegs.GPADIR.bit.GPIO27 = 0; // GPIO27 = input
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GpioIntRegs.GPIOLPMSEL.bit.GPIO27=1; // GPIO27 will wake the device
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SysCtrlRegs.LPMCR0.bit.QUALSTDBY=2; // Qualify GPIO27 by 2 OSCCLK
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// cycles before waking the device
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// from STANDBY
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// Enable SCI-A on GPIO28 - GPIO29
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GpioCtrlRegs.GPAPUD.bit.GPIO28 = 0; // Enable pullup on GPIO28
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GpioCtrlRegs.GPAQSEL2.bit.GPIO28 = 3; // asynch input
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GpioCtrlRegs.GPAMUX2.bit.GPIO28 = 1; // GPIO28 = SCIRXDA
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GpioCtrlRegs.GPAPUD.bit.GPIO29 = 0; // Enable pullup on GPIO29
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GpioCtrlRegs.GPAMUX2.bit.GPIO29 = 1; // GPIO29 = SCITXDA
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// Enable CAN-A on GPIO30 - GPIO31
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GpioCtrlRegs.GPAPUD.bit.GPIO30 = 0; // Enable pullup on GPIO30
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GpioCtrlRegs.GPAMUX2.bit.GPIO30 = 1; // GPIO30 = CANTXA
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GpioCtrlRegs.GPAPUD.bit.GPIO31 = 0; // Enable pullup on GPIO31
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GpioCtrlRegs.GPAQSEL2.bit.GPIO31 = 3; // asynch input
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GpioCtrlRegs.GPAMUX2.bit.GPIO31 = 1; // GPIO31 = CANRXA
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// Enable I2C-A on GPIO32 - GPIO33
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GpioCtrlRegs.GPBPUD.bit.GPIO32 = 0; // Enable pullup on GPIO32
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GpioCtrlRegs.GPBPUD.bit.GPIO33 = 0; // Enable pullup on GPIO33
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GpioCtrlRegs.GPBQSEL1.bit.GPIO32 = 3; // asynch input
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GpioCtrlRegs.GPBQSEL1.bit.GPIO32 = 3; // asynch input
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GpioCtrlRegs.GPBMUX1.bit.GPIO32 = 1; // GPIO32 = SDAA
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GpioCtrlRegs.GPBMUX1.bit.GPIO33 = 1; // GPIO33 = SCLA
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// Make GPIO34 an input
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GpioCtrlRegs.GPBPUD.bit.GPIO32 = 0; // Enable pullup on GPIO34
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GpioCtrlRegs.GPBMUX1.bit.GPIO34 = 0; // GPIO34 = GPIO34
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GpioCtrlRegs.GPBDIR.bit.GPIO34 = 0; // GPIO34 = input
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EDIS;
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}
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//===========================================================================
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// No more.
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//===========================================================================
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