204 lines
7.0 KiB
C
204 lines
7.0 KiB
C
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// TI File $Revision: /main/11 $
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// Checkin $Date: April 21, 2008 15:41:01 $
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//###########################################################################
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//
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// FILE: Example_2833xAdc.c
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//
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// TITLE: DSP2833x ADC Example Program.
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//
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// ASSUMPTIONS:
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//
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// This program requires the DSP2833x header files.
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//
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// Make sure the CPU clock speed is properly defined in
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// DSP2833x_Examples.h before compiling this example.
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//
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// Connect signals to be converted to A2 and A3.
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//
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// As supplied, this project is configured for "boot to SARAM"
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// operation. The 2833x Boot Mode table is shown below.
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// For information on configuring the boot mode of an eZdsp,
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// please refer to the documentation included with the eZdsp,
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//
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// $Boot_Table:
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//
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// GPIO87 GPIO86 GPIO85 GPIO84
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// XA15 XA14 XA13 XA12
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// PU PU PU PU
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// ==========================================
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// 1 1 1 1 Jump to Flash
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// 1 1 1 0 SCI-A boot
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// 1 1 0 1 SPI-A boot
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// 1 1 0 0 I2C-A boot
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// 1 0 1 1 eCAN-A boot
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// 1 0 1 0 McBSP-A boot
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// 1 0 0 1 Jump to XINTF x16
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// 1 0 0 0 Jump to XINTF x32
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// 0 1 1 1 Jump to OTP
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// 0 1 1 0 Parallel GPIO I/O boot
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// 0 1 0 1 Parallel XINTF boot
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// 0 1 0 0 Jump to SARAM <- "boot to SARAM"
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// 0 0 1 1 Branch to check boot mode
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// 0 0 1 0 Boot to flash, bypass ADC cal
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// 0 0 0 1 Boot to SARAM, bypass ADC cal
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// 0 0 0 0 Boot to SCI-A, bypass ADC cal
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// Boot_Table_End$
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//
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// DESCRIPTION:
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//
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// This example sets up the PLL in x10/2 mode.
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//
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// For 150 MHz devices (default)
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// divides SYSCLKOUT by six to reach a 25.0Mhz HSPCLK
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// (assuming a 30Mhz XCLKIN).
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//
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// For 100 MHz devices:
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// divides SYSCLKOUT by four to reach a 25.0Mhz HSPCLK
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// (assuming a 20Mhz XCLKIN).
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//
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// Interrupts are enabled and the ePWM1 is setup to generate a periodic
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// ADC SOC on SEQ1. Two channels are converted, ADCINA3 and ADCINA2.
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//
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// Watch Variables:
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//
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// Voltage1[10] Last 10 ADCRESULT0 values
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// Voltage2[10] Last 10 ADCRESULT1 values
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// ConversionCount Current result number 0-9
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// LoopCount Idle loop counter
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//
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//
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//###########################################################################
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//
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// Original Author: D.F.
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//
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// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
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// $Release Date: August 1, 2008 $
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//###########################################################################
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#include "DSP28x_Project.h" // Device Headerfile and Examples Include File
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// Prototype statements for functions found within this file.
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interrupt void adc_isr(void);
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// Global variables used in this example:
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Uint16 LoopCount;
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Uint16 ConversionCount;
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Uint16 Voltage1[10];
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Uint16 Voltage2[10];
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main()
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{
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// Step 1. Initialize System Control:
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// PLL, WatchDog, enable Peripheral Clocks
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// This example function is found in the DSP2833x_SysCtrl.c file.
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InitSysCtrl();
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EALLOW;
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#if (CPU_FRQ_150MHZ) // Default - 150 MHz SYSCLKOUT
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#define ADC_MODCLK 0x3 // HSPCLK = SYSCLKOUT/2*ADC_MODCLK2 = 150/(2*3) = 25.0 MHz
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#endif
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#if (CPU_FRQ_100MHZ)
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#define ADC_MODCLK 0x2 // HSPCLK = SYSCLKOUT/2*ADC_MODCLK2 = 100/(2*2) = 25.0 MHz
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#endif
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EDIS;
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// Step 2. Initialize GPIO:
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// This example function is found in the DSP2833x_Gpio.c file and
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// illustrates how to set the GPIO to it's default state.
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// InitGpio(); // Skipped for this example
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// Step 3. Clear all interrupts and initialize PIE vector table:
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// Disable CPU interrupts
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DINT;
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// Initialize the PIE control registers to their default state.
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// The default state is all PIE interrupts disabled and flags
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// are cleared.
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// This function is found in the DSP2833x_PieCtrl.c file.
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InitPieCtrl();
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// Disable CPU interrupts and clear all CPU interrupt flags:
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IER = 0x0000;
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IFR = 0x0000;
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// Initialize the PIE vector table with pointers to the shell Interrupt
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// Service Routines (ISR).
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// This will populate the entire table, even if the interrupt
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// is not used in this example. This is useful for debug purposes.
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// The shell ISR routines are found in DSP2833x_DefaultIsr.c.
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// This function is found in DSP2833x_PieVect.c.
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InitPieVectTable();
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// Interrupts that are used in this example are re-mapped to
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// ISR functions found within this file.
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EALLOW; // This is needed to write to EALLOW protected register
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PieVectTable.ADCINT = &adc_isr;
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EDIS; // This is needed to disable write to EALLOW protected registers
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// Step 4. Initialize all the Device Peripherals:
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// This function is found in DSP2833x_InitPeripherals.c
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// InitPeripherals(); // Not required for this example
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InitAdc(); // For this example, init the ADC
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// Step 5. User specific code, enable interrupts:
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// Enable ADCINT in PIE
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PieCtrlRegs.PIEIER1.bit.INTx6 = 1;
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IER |= M_INT1; // Enable CPU Interrupt 1
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EINT; // Enable Global interrupt INTM
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ERTM; // Enable Global realtime interrupt DBGM
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LoopCount = 0;
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ConversionCount = 0;
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// Configure ADC
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AdcRegs.ADCMAXCONV.all = 0x0001; // Setup 2 conv's on SEQ1
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AdcRegs.ADCCHSELSEQ1.bit.CONV00 = 0x3; // Setup ADCINA3 as 1st SEQ1 conv.
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AdcRegs.ADCCHSELSEQ1.bit.CONV01 = 0x2; // Setup ADCINA2 as 2nd SEQ1 conv.
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AdcRegs.ADCTRL2.bit.EPWM_SOCA_SEQ1 = 1;// Enable SOCA from ePWM to start SEQ1
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AdcRegs.ADCTRL2.bit.INT_ENA_SEQ1 = 1; // Enable SEQ1 interrupt (every EOS)
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// Assumes ePWM1 clock is already enabled in InitSysCtrl();
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EPwm1Regs.ETSEL.bit.SOCAEN = 1; // Enable SOC on A group
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EPwm1Regs.ETSEL.bit.SOCASEL = 4; // Select SOC from from CPMA on upcount
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EPwm1Regs.ETPS.bit.SOCAPRD = 1; // Generate pulse on 1st event
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EPwm1Regs.CMPA.half.CMPA = 0x0080; // Set compare A value
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EPwm1Regs.TBPRD = 0xFFFF; // Set period for ePWM1
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EPwm1Regs.TBCTL.bit.CTRMODE = 0; // count up and start
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// Wait for ADC interrupt
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for(;;)
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{
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LoopCount++;
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}
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}
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interrupt void adc_isr(void)
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{
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Voltage1[ConversionCount] = AdcRegs.ADCRESULT0 >>4;
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Voltage2[ConversionCount] = AdcRegs.ADCRESULT1 >>4;
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// If 40 conversions have been logged, start over
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if(ConversionCount == 9)
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{
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ConversionCount = 0;
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}
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else ConversionCount++;
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// Reinitialize for next ADC sequence
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AdcRegs.ADCTRL2.bit.RST_SEQ1 = 1; // Reset SEQ1
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AdcRegs.ADCST.bit.INT_SEQ1_CLR = 1; // Clear INT SEQ1 bit
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PieCtrlRegs.PIEACK.all = PIEACK_GROUP1; // Acknowledge interrupt to PIE
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return;
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}
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