152 lines
5.8 KiB
C
152 lines
5.8 KiB
C
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// TI File $Revision: /main/1 $
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// Checkin $Date: August 18, 2006 13:52:07 $
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//###########################################################################
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//
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// FILE: DSP2833x_ECap.h
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//
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// TITLE: DSP2833x Enhanced Capture Module Register Bit Definitions.
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//
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//###########################################################################
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// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
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// $Release Date: August 1, 2008 $
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//###########################################################################
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#ifndef DSP2833x_ECAP_H
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#define DSP2833x_ECAP_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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//----------------------------------------------------
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// Capture control register 1 bit definitions */
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struct ECCTL1_BITS { // bits description
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Uint16 CAP1POL:1; // 0 Capture Event 1 Polarity select
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Uint16 CTRRST1:1; // 1 Counter Reset on Capture Event 1
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Uint16 CAP2POL:1; // 2 Capture Event 2 Polarity select
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Uint16 CTRRST2:1; // 3 Counter Reset on Capture Event 2
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Uint16 CAP3POL:1; // 4 Capture Event 3 Polarity select
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Uint16 CTRRST3:1; // 5 Counter Reset on Capture Event 3
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Uint16 CAP4POL:1; // 6 Capture Event 4 Polarity select
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Uint16 CTRRST4:1; // 7 Counter Reset on Capture Event 4
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Uint16 CAPLDEN:1; // 8 Enable Loading CAP1-4 regs on a Cap Event
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Uint16 PRESCALE:5; // 13:9 Event Filter prescale select
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Uint16 FREE_SOFT:2; // 15:14 Emulation mode
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};
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union ECCTL1_REG {
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Uint16 all;
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struct ECCTL1_BITS bit;
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};
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// In V1.1 the STOPVALUE bit field was changed to
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// STOP_WRAP. This correlated to a silicon change from
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// F2833x Rev 0 to Rev A.
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//----------------------------------------------------
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// Capture control register 2 bit definitions */
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struct ECCTL2_BITS { // bits description
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Uint16 CONT_ONESHT:1; // 0 Continuous or one-shot
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Uint16 STOP_WRAP:2; // 2:1 Stop value for one-shot, Wrap for continuous
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Uint16 REARM:1; // 3 One-shot re-arm
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Uint16 TSCTRSTOP:1; // 4 TSCNT counter stop
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Uint16 SYNCI_EN:1; // 5 Counter sync-in select
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Uint16 SYNCO_SEL:2; // 7:6 Sync-out mode
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Uint16 SWSYNC:1; // 8 SW forced counter sync
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Uint16 CAP_APWM:1; // 9 CAP/APWM operating mode select
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Uint16 APWMPOL:1; // 10 APWM output polarity select
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Uint16 rsvd1:5; // 15:11
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};
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union ECCTL2_REG {
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Uint16 all;
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struct ECCTL2_BITS bit;
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};
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//----------------------------------------------------
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// ECAP interrupt enable register bit definitions */
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struct ECEINT_BITS { // bits description
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Uint16 rsvd1:1; // 0 reserved
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Uint16 CEVT1:1; // 1 Capture Event 1 Interrupt Enable
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Uint16 CEVT2:1; // 2 Capture Event 2 Interrupt Enable
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Uint16 CEVT3:1; // 3 Capture Event 3 Interrupt Enable
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Uint16 CEVT4:1; // 4 Capture Event 4 Interrupt Enable
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Uint16 CTROVF:1; // 5 Counter Overflow Interrupt Enable
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Uint16 CTR_EQ_PRD:1; // 6 Period Equal Interrupt Enable
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Uint16 CTR_EQ_CMP:1; // 7 Compare Equal Interrupt Enable
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Uint16 rsvd2:8; // 15:8 reserved
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};
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union ECEINT_REG {
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Uint16 all;
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struct ECEINT_BITS bit;
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};
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//----------------------------------------------------
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// ECAP interrupt flag register bit definitions */
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struct ECFLG_BITS { // bits description
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Uint16 INT:1; // 0 Global Flag
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Uint16 CEVT1:1; // 1 Capture Event 1 Interrupt Flag
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Uint16 CEVT2:1; // 2 Capture Event 2 Interrupt Flag
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Uint16 CEVT3:1; // 3 Capture Event 3 Interrupt Flag
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Uint16 CEVT4:1; // 4 Capture Event 4 Interrupt Flag
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Uint16 CTROVF:1; // 5 Counter Overflow Interrupt Flag
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Uint16 CTR_EQ_PRD:1; // 6 Period Equal Interrupt Flag
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Uint16 CTR_EQ_CMP:1; // 7 Compare Equal Interrupt Flag
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Uint16 rsvd2:8; // 15:8 reserved
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};
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union ECFLG_REG {
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Uint16 all;
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struct ECFLG_BITS bit;
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};
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//----------------------------------------------------
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struct ECAP_REGS {
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Uint32 TSCTR; // Time stamp counter
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Uint32 CTRPHS; // Counter phase
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Uint32 CAP1; // Capture 1
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Uint32 CAP2; // Capture 2
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Uint32 CAP3; // Capture 3
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Uint32 CAP4; // Capture 4
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Uint16 rsvd1[8]; // reserved
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union ECCTL1_REG ECCTL1; // Capture Control Reg 1
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union ECCTL2_REG ECCTL2; // Capture Control Reg 2
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union ECEINT_REG ECEINT; // ECAP interrupt enable
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union ECFLG_REG ECFLG; // ECAP interrupt flags
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union ECFLG_REG ECCLR; // ECAP interrupt clear
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union ECEINT_REG ECFRC; // ECAP interrupt force
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Uint16 rsvd2[6]; // reserved
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};
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//---------------------------------------------------------------------------
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// GPI/O External References & Function Declarations:
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//
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extern volatile struct ECAP_REGS ECap1Regs;
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extern volatile struct ECAP_REGS ECap2Regs;
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extern volatile struct ECAP_REGS ECap3Regs;
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extern volatile struct ECAP_REGS ECap4Regs;
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extern volatile struct ECAP_REGS ECap5Regs;
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extern volatile struct ECAP_REGS ECap6Regs;
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#ifdef __cplusplus
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}
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#endif /* extern "C" */
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#endif // end of DSP2833x_ECAP_H definition
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//===========================================================================
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// End of file.
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//===========================================================================
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