361 lines
12 KiB
C
361 lines
12 KiB
C
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// TI File $Revision: /main/9 $
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// Checkin $Date: April 21, 2008 15:41:38 $
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//###########################################################################
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//
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// FILE: Example_2833xEPwmTimerInt.c
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//
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// TITLE: DSP2833x ePWM Timer Interrupt example.
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//
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// ASSUMPTIONS:
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//
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// This program requires the DSP2833x header files.
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//
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// Other then boot mode configuration, no other hardware configuration
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// is required.
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//
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// As supplied, this project is configured for "boot to SARAM"
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// operation. The 2833x Boot Mode table is shown below.
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// For information on configuring the boot mode of an eZdsp,
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// please refer to the documentation included with the eZdsp,
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//
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// $Boot_Table:
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//
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// GPIO87 GPIO86 GPIO85 GPIO84
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// XA15 XA14 XA13 XA12
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// PU PU PU PU
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// ==========================================
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// 1 1 1 1 Jump to Flash
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// 1 1 1 0 SCI-A boot
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// 1 1 0 1 SPI-A boot
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// 1 1 0 0 I2C-A boot
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// 1 0 1 1 eCAN-A boot
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// 1 0 1 0 McBSP-A boot
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// 1 0 0 1 Jump to XINTF x16
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// 1 0 0 0 Jump to XINTF x32
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// 0 1 1 1 Jump to OTP
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// 0 1 1 0 Parallel GPIO I/O boot
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// 0 1 0 1 Parallel XINTF boot
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// 0 1 0 0 Jump to SARAM <- "boot to SARAM"
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// 0 0 1 1 Branch to check boot mode
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// 0 0 1 0 Boot to flash, bypass ADC cal
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// 0 0 0 1 Boot to SARAM, bypass ADC cal
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// 0 0 0 0 Boot to SCI-A, bypass ADC cal
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// Boot_Table_End$
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//
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// DESCRIPTION:
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//
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// This example configures the ePWM Timers and increments
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// a counter each time an interrupt is taken.
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//
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// As supplied:
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//
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// All ePWM's are initalized. Note that not all devices in the 2833x
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// family have all 6 ePWMs.
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//
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// All timers have the same period
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// The timers are started sync'ed
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// An interrupt is taken on a zero event for each ePWM timer
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//
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// ePWM1: takes an interrupt every event
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// ePWM2: takes an interrupt every 2nd event
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// ePWM3: takes an interrupt every 3rd event
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// ePWM4-ePWM6: take an interrupt every event
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//
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// Thus the Interrupt count for ePWM1, ePWM4-ePWM6 should be equal
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// The interrupt count for ePWM2 should be about half that of ePWM1
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// and the interrupt count for ePWM3 should be about 1/3 that of ePWM1
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//
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// Watch Variables:
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// EPwm1TimerIntCount
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// EPwm2TimerIntCount
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// EPwm3TimerIntCount
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// EPwm4TimerIntCount
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// EPwm5TimerIntCount
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// EPwm6TimerIntCount
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//
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//###########################################################################
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// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
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// $Release Date: August 1, 2008 $
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//###########################################################################
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#include "DSP28x_Project.h" // Device Headerfile and Examples Include File
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// Configure which ePWM timer interrupts are enabled at the PIE level:
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// 1 = enabled, 0 = disabled
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#define PWM1_INT_ENABLE 1
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#define PWM2_INT_ENABLE 1
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#define PWM3_INT_ENABLE 1
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#define PWM4_INT_ENABLE 1
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#define PWM5_INT_ENABLE 1
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#define PWM6_INT_ENABLE 1
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// Configure the period for each timer
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#define PWM1_TIMER_TBPRD 0x1FFF
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#define PWM2_TIMER_TBPRD 0x1FFF
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#define PWM3_TIMER_TBPRD 0x1FFF
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#define PWM4_TIMER_TBPRD 0x1FFF
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#define PWM5_TIMER_TBPRD 0x1FFF
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#define PWM6_TIMER_TBPRD 0x1FFF
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// Prototype statements for functions found within this file.
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interrupt void epwm1_timer_isr(void);
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interrupt void epwm2_timer_isr(void);
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interrupt void epwm3_timer_isr(void);
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interrupt void epwm4_timer_isr(void);
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interrupt void epwm5_timer_isr(void);
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interrupt void epwm6_timer_isr(void);
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void InitEPwmTimer(void);
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// Global variables used in this example
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Uint32 EPwm1TimerIntCount;
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Uint32 EPwm2TimerIntCount;
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Uint32 EPwm3TimerIntCount;
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Uint32 EPwm4TimerIntCount;
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Uint32 EPwm5TimerIntCount;
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Uint32 EPwm6TimerIntCount;
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void main(void)
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{
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int i;
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// Step 1. Initialize System Control:
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// PLL, WatchDog, enable Peripheral Clocks
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// This example function is found in the DSP2833x_SysCtrl.c file.
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InitSysCtrl();
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// Step 2. Initalize GPIO:
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// This example function is found in the DSP2833x_Gpio.c file and
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// illustrates how to set the GPIO to it's default state.
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// InitGpio(); // Skipped for this example
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// Step 3. Clear all interrupts and initialize PIE vector table:
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// Disable CPU interrupts
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DINT;
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// Initialize the PIE control registers to their default state.
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// The default state is all PIE interrupts disabled and flags
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// are cleared.
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// This function is found in the DSP2833x_PieCtrl.c file.
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InitPieCtrl();
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// Disable CPU interrupts and clear all CPU interrupt flags:
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IER = 0x0000;
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IFR = 0x0000;
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// Initialize the PIE vector table with pointers to the shell Interrupt
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// Service Routines (ISR).
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// This will populate the entire table, even if the interrupt
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// is not used in this example. This is useful for debug purposes.
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// The shell ISR routines are found in DSP2833x_DefaultIsr.c.
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// This function is found in DSP2833x_PieVect.c.
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InitPieVectTable();
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// Interrupts that are used in this example are re-mapped to
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// ISR functions found within this file.
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EALLOW; // This is needed to write to EALLOW protected registers
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PieVectTable.EPWM1_INT = &epwm1_timer_isr;
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PieVectTable.EPWM2_INT = &epwm2_timer_isr;
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PieVectTable.EPWM3_INT = &epwm3_timer_isr;
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PieVectTable.EPWM4_INT = &epwm4_timer_isr;
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PieVectTable.EPWM5_INT = &epwm5_timer_isr;
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PieVectTable.EPWM6_INT = &epwm6_timer_isr;
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EDIS; // This is needed to disable write to EALLOW protected registers
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// Step 4. Initialize all the Device Peripherals:
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// This function is found in DSP2833x_InitPeripherals.c
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// InitPeripherals(); // Not required for this example
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InitEPwmTimer(); // For this example, only initialize the ePWM Timers
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// Step 5. User specific code, enable interrupts:
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// Initalize counters:
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EPwm1TimerIntCount = 0;
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EPwm2TimerIntCount = 0;
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EPwm3TimerIntCount = 0;
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EPwm4TimerIntCount = 0;
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EPwm5TimerIntCount = 0;
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EPwm6TimerIntCount = 0;
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// Enable CPU INT3 which is connected to EPWM1-6 INT:
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IER |= M_INT3;
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// Enable EPWM INTn in the PIE: Group 3 interrupt 1-6
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PieCtrlRegs.PIEIER3.bit.INTx1 = PWM1_INT_ENABLE;
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PieCtrlRegs.PIEIER3.bit.INTx2 = PWM2_INT_ENABLE;
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PieCtrlRegs.PIEIER3.bit.INTx3 = PWM3_INT_ENABLE;
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PieCtrlRegs.PIEIER3.bit.INTx4 = PWM4_INT_ENABLE;
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PieCtrlRegs.PIEIER3.bit.INTx5 = PWM5_INT_ENABLE;
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PieCtrlRegs.PIEIER3.bit.INTx6 = PWM6_INT_ENABLE;
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// Enable global Interrupts and higher priority real-time debug events:
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EINT; // Enable Global interrupt INTM
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ERTM; // Enable Global realtime interrupt DBGM
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// Step 6. IDLE loop. Just sit and loop forever (optional):
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for(;;)
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{
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asm(" NOP");
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for(i=1;i<=10;i++)
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{}
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}
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}
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void InitEPwmTimer()
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{
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EALLOW;
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SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 0; // Stop all the TB clocks
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EDIS;
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// Setup Sync
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EPwm1Regs.TBCTL.bit.SYNCOSEL = TB_SYNC_IN; // Pass through
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EPwm2Regs.TBCTL.bit.SYNCOSEL = TB_SYNC_IN; // Pass through
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EPwm3Regs.TBCTL.bit.SYNCOSEL = TB_SYNC_IN; // Pass through
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EPwm4Regs.TBCTL.bit.SYNCOSEL = TB_SYNC_IN; // Pass through
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EPwm5Regs.TBCTL.bit.SYNCOSEL = TB_SYNC_IN; // Pass through
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EPwm6Regs.TBCTL.bit.SYNCOSEL = TB_SYNC_IN; // Pass through
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// Allow each timer to be sync'ed
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EPwm1Regs.TBCTL.bit.PHSEN = TB_ENABLE;
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EPwm2Regs.TBCTL.bit.PHSEN = TB_ENABLE;
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EPwm3Regs.TBCTL.bit.PHSEN = TB_ENABLE;
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EPwm4Regs.TBCTL.bit.PHSEN = TB_ENABLE;
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EPwm5Regs.TBCTL.bit.PHSEN = TB_ENABLE;
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EPwm6Regs.TBCTL.bit.PHSEN = TB_ENABLE;
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EPwm1Regs.TBPHS.half.TBPHS = 100;
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EPwm2Regs.TBPHS.half.TBPHS = 200;
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EPwm3Regs.TBPHS.half.TBPHS = 300;
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EPwm4Regs.TBPHS.half.TBPHS = 400;
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EPwm5Regs.TBPHS.half.TBPHS = 500;
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EPwm6Regs.TBPHS.half.TBPHS = 600;
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EPwm1Regs.TBPRD = PWM1_TIMER_TBPRD;
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EPwm1Regs.TBCTL.bit.CTRMODE = TB_COUNT_UP; // Count up
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EPwm1Regs.ETSEL.bit.INTSEL = ET_CTR_ZERO; // Select INT on Zero event
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EPwm1Regs.ETSEL.bit.INTEN = PWM1_INT_ENABLE; // Enable INT
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EPwm1Regs.ETPS.bit.INTPRD = ET_1ST; // Generate INT on 1st event
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EPwm2Regs.TBPRD = PWM2_TIMER_TBPRD;
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EPwm2Regs.TBCTL.bit.CTRMODE = TB_COUNT_UP; // Count up
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EPwm2Regs.ETSEL.bit.INTSEL = ET_CTR_ZERO; // Enable INT on Zero event
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EPwm2Regs.ETSEL.bit.INTEN = PWM2_INT_ENABLE; // Enable INT
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EPwm2Regs.ETPS.bit.INTPRD = ET_2ND; // Generate INT on 2nd event
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EPwm3Regs.TBPRD = PWM3_TIMER_TBPRD;
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EPwm3Regs.TBCTL.bit.CTRMODE = TB_COUNT_UP; // Count up
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EPwm3Regs.ETSEL.bit.INTSEL = ET_CTR_ZERO; // Enable INT on Zero event
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EPwm3Regs.ETSEL.bit.INTEN = PWM3_INT_ENABLE; // Enable INT
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EPwm3Regs.ETPS.bit.INTPRD = ET_3RD; // Generate INT on 3rd event
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EPwm4Regs.TBPRD = PWM4_TIMER_TBPRD;
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EPwm4Regs.TBCTL.bit.CTRMODE = TB_COUNT_UP; // Count up
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EPwm4Regs.ETSEL.bit.INTSEL = ET_CTR_ZERO; // Enable INT on Zero event
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EPwm4Regs.ETSEL.bit.INTEN = PWM4_INT_ENABLE; // Enable INT
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EPwm4Regs.ETPS.bit.INTPRD = ET_1ST; // Generate INT on 1st event
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EPwm5Regs.TBPRD = PWM5_TIMER_TBPRD;
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EPwm5Regs.TBCTL.bit.CTRMODE= TB_COUNT_UP; // Count up
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EPwm5Regs.ETSEL.bit.INTSEL = ET_CTR_ZERO; // Enable INT on Zero event
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EPwm5Regs.ETSEL.bit.INTEN = PWM5_INT_ENABLE; // Enable INT
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EPwm5Regs.ETPS.bit.INTPRD = ET_1ST; // Generate INT on 1st event
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EPwm6Regs.TBPRD = PWM6_TIMER_TBPRD;
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EPwm6Regs.TBCTL.bit.CTRMODE = TB_COUNT_UP; // Count up
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EPwm6Regs.ETSEL.bit.INTSEL = ET_CTR_ZERO; // Enable INT on Zero event
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EPwm6Regs.ETSEL.bit.INTEN = PWM6_INT_ENABLE; // Enable INT
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EPwm6Regs.ETPS.bit.INTPRD = ET_1ST; // Generate INT on 1st event
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EALLOW;
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SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 1; // Start all the timers synced
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EDIS;
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}
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// Interrupt routines uses in this example:
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interrupt void epwm1_timer_isr(void)
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{
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EPwm1TimerIntCount++;
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// Clear INT flag for this timer
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EPwm1Regs.ETCLR.bit.INT = 1;
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// Acknowledge this interrupt to receive more interrupts from group 3
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PieCtrlRegs.PIEACK.all = PIEACK_GROUP3;
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}
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interrupt void epwm2_timer_isr(void)
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{
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EPwm2TimerIntCount++;
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// Clear INT flag for this timer
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EPwm2Regs.ETCLR.bit.INT = 1;
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// Acknowledge this interrupt to receive more interrupts from group 3
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PieCtrlRegs.PIEACK.all = PIEACK_GROUP3;
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}
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interrupt void epwm3_timer_isr(void)
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{
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EPwm3TimerIntCount++;
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// Clear INT flag for this timer
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EPwm3Regs.ETCLR.bit.INT = 1;
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// Acknowledge this interrupt to receive more interrupts from group 3
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PieCtrlRegs.PIEACK.all = PIEACK_GROUP3;
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}
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interrupt void epwm4_timer_isr(void)
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{
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EPwm4TimerIntCount++;
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// Clear INT flag for this timer
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EPwm4Regs.ETCLR.bit.INT = 1;
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// Acknowledge this interrupt to receive more interrupts from group 3
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PieCtrlRegs.PIEACK.all = PIEACK_GROUP3;
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}
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interrupt void epwm5_timer_isr(void)
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{
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EPwm5TimerIntCount++;
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// Clear INT flag for this timer
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EPwm5Regs.ETCLR.bit.INT = 1;
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// Acknowledge this interrupt to receive more interrupts from group 3
|
||
|
|
PieCtrlRegs.PIEACK.all = PIEACK_GROUP3;
|
||
|
|
}
|
||
|
|
|
||
|
|
interrupt void epwm6_timer_isr(void)
|
||
|
|
{
|
||
|
|
EPwm6TimerIntCount++;
|
||
|
|
|
||
|
|
// Clear INT flag for this timer
|
||
|
|
EPwm6Regs.ETCLR.bit.INT = 1;
|
||
|
|
|
||
|
|
// Acknowledge this interrupt to receive more interrupts from group 3
|
||
|
|
PieCtrlRegs.PIEACK.all = PIEACK_GROUP3;
|
||
|
|
}
|
||
|
|
|
||
|
|
|
||
|
|
|
||
|
|
|
||
|
|
//===========================================================================
|
||
|
|
// No more.
|
||
|
|
//===========================================================================
|